It has been observed that between PG1.0 and PG2.0/2.1 depending on
which device we boot from, we may see a different value here than is
documented in the TRM. Update the values for NAND and MMC1 based on
real life usage on each revision.
Ken Ma [Thu, 22 Jun 2017 09:13:36 +0000 (17:13 +0800)]
pinctrl: a3700: Fix the issue that gpio controller is registered with wrong node id
In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.
Signed-off-by: Ken Ma <make@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Thu, 22 Jun 2017 09:13:35 +0000 (17:13 +0800)]
pinctrl: a3700: Fix uart2 group selection register mask
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for both "gpio" and "uart" functions of uart2 group.
Signed-off-by: Ken Ma <make@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Bin Meng [Thu, 22 Jun 2017 06:42:40 +0000 (14:42 +0800)]
x86: Remove CONFIG_USB_MAX_CONTROLLER_COUNT
As all x86 boards have been switched over to use DM USB, remove
CONFIG_USB_MAX_CONTROLLER_COUNT which is not used by DM USB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
Bin Meng [Fri, 16 Jun 2017 13:31:46 +0000 (06:31 -0700)]
x86: minnowmax: Configure GPIO pins to turn on USB ports VBUS
GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
VBUS on/off. Let's configure them in the misc_init_r().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 21 Jun 2017 11:54:46 +0000 (07:54 -0400)]
sunxi: Correct select's of SPL_STACK_R and SPL_SYS_MALLOC_SIMPLE
On ARCH_SUNXI we've been selecting these targets for a long time if
SUPPORT_SPL is set. However, Lichee Pi Zero is the first platform we've
added that does support SPL but does not build SPL and has exposed a
latent bug. Both of these symbols depend on SPL not SUPPORT_SPL, so we
need to update our select here otherwise we get a Kconfig warning.
Fixes: f02abb0608fe ("sunxi: add support for Lichee Pi Zero") Signed-off-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Tue, 20 Jun 2017 13:17:19 +0000 (15:17 +0200)]
ARM: rmobile: Add missing config bits
The commit "fb82fe385173 configs: Resync defconfigs" resynced all config
files. This exposed two latent issues with the Gen3 boards in that we
had not been setting CONFIG_DEFAULT_FDT_FILE correctly and had not been
setting CONFIG_CMD_MMC. Fix both of these.
Fixes: fb82fe385173 ("configs: Resync defconfigs") Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Emmanuel Vadot [Tue, 20 Jun 2017 07:02:29 +0000 (09:02 +0200)]
bch: Fix build on FreeBSD host
endian.h on FreeBSD system exist in sys/ subdirectory.
FreeBSD already have a fls function defined in strings.h which is included
in string.h if __BSD_VISIBLE is defined, as a check for this.
Simon Glass [Thu, 8 Jun 2017 03:11:48 +0000 (21:11 -0600)]
tegra: mmc: Set the bus width correctly
The driver currently does not reset bit 5 of the hostctl register even if
the MMC stack requests it. Then means that once a bus width of 8 is
selected it is not possible to change it back to 1. This breaks
'mmc rescan' which needs to start off with a bus width of 1.
The problem was surfaced by enabling CONFIG_DM_MMC_OPS on tegra. Without
this option the MMC stack fully reinits the driver on a 'mmc rescan'.
But with this option driver model does not re-probe a driver once it has
been probed once.
Fix the driver to honour the request.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Chubb <peter.chubb@data61.csiro.au> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Michal Simek [Tue, 7 Feb 2017 13:32:26 +0000 (14:32 +0100)]
arm64: zynqmp: Check pmufw version
If PMUFW version is not v0.3 then panic.
ZynqMP switch to CCF based clock driver which requires
PMUFW to be present at certain version.
This patch ensure that you use correct and tested PMUFW
binary.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Define routines for mmio write and read
Define routines of mmio write and read functionalities
for zynqmp platform.
Also do not call SMC from SPL because SPL is running before ATF in EL3
that's why SMCs can't be called because there is nothing to call.
zynqmp_mmio*() are doing direct read/write accesses and this patch does
the same. PMUFW is up and running at this time and there is a way to talk
to pmufw via IPI but there is no reason to implement IPI stuff in SPL if
we need just simple read for getting clock driver to work.
Also make invoke_smc as global so that it can be reused in
multile places where ever possible.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm: zynq: Add Kconfig option for any DDR specific initialization
Add Kconfig option for ddr init as this might be required
in cases like ddr less systems where we want to skip ddrc
init and this option is useful for it.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 2 Mar 2017 10:02:55 +0000 (11:02 +0100)]
arm64: zynqmp: Add comment about level shifter mode v1
Silicon v1 didn't support SD boot mode with level shifter.
Because system can't boot any error message is not shown
that's why comment is just a record if someone tries to debug it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 25 May 2017 14:08:43 +0000 (16:08 +0200)]
arm64: zynqmp: Add empty sleep.h file for psu_init* compilation
psu_init* contain sleep.h header which is not present in u-boot.
Instead of keep comment sleep.h in psu_init* it is easier to add empty
file which is included.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 14 Oct 2016 12:06:28 +0000 (14:06 +0200)]
arm64: zynqmp: Decrease MALLOC size for SPL
Decrease malloc size to 1MB from 256MB. Huge malloc
space is adding huge delay in mem_malloc_init() because
we are enabling CONFIG_SYS_MALLOC_CLEAR_ON_INIT
which clear the whole malloc space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: spl: fix dual SD controller support
When enabling both SDHCI controllers, spl_mmc.c would actually choose
device sdhci0 even if booted from sdhci1 (boot_device). This is because
spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in
order to return index 1 instead of 0.
The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c
So the key to properly enabling both controllers as boot sources is
defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's
include/configs/*.h.
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Feb 2017 07:22:04 +0000 (08:22 +0100)]
microblaze: Build only DTBs for selected target
Adding more targets to repository requires some additional
changes not simply just adding config file, defconfig and dts.
This patch makes this process easier by building only
particular DTB which is selected via defconfig
that Makefile doesn't need to contain all dts files in the repository.
Reported-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 3 May 2017 14:22:30 +0000 (16:22 +0200)]
arm64: zynqmp: Remove CPU_RELEASE_ADDR macro
CPU_RELEASE_ADDR is used only when CONFIG_ARMV8_MULTIENTRY
is enabled. ZynqMP is running ATF which takes care about this
that's why no need to have this macro.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Alexey Brodkin [Mon, 5 Jun 2017 19:31:51 +0000 (22:31 +0300)]
drivers/usb/ehci: Use platform-specific accessors
Current implementation doesn't allow utilization of platform-specific
reads and writes.
But some arches or platforms may want to use their accessors that do
some extra work like adding barriers for data serialization etc.
Interesting enough OHCI accessors already do that so just aligning
EHCI to it now.
This is a resend of http://patchwork.ozlabs.org/patch/726714/
Back in the day this patch broke some PPC and Sandbox boards
as they we missing inclusion of "asm/io.h". Those missing items were
fixed with:
1) http://patchwork.ozlabs.org/patch/751397/
2) http://patchwork.ozlabs.org/patch/771099/
So now it should be safe to apply this patch.
FWIW TravisCI builds everything with all 3 patches in place,
see https://travis-ci.org/abrodkin/u-boot/builds/239563813
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
Meng Dongyang [Thu, 8 Jun 2017 07:34:20 +0000 (15:34 +0800)]
usb: dwc2: force to host mode if not support HNP/SRP
In current code, after running the command of "usb start", the controller
will keep in otg mode and can't switch to host mode if not support
SNP/SRP capability. So add the property of "hnp-srp-disable" in the DTS
to config the contrller work in force mode of host.
Heiko Schocher [Wed, 14 Jun 2017 03:49:40 +0000 (05:49 +0200)]
powerpc, 5xxx, 512x: remove support for mpc5xxx and mpc512x
There was for long time no activity in the mpx5xxx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in mpc5xxx,
so remove it.
Andrew F. Davis [Tue, 13 Jun 2017 20:04:59 +0000 (15:04 -0500)]
arm: mach-omap2: Generate MLO file from SD boot capable targets
Secure boot targets that can be loaded from an SD card FAT partition
need to be called "MLO" on the filesystem, make a copy with this name
to clarify the correct image for SD card booting.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
York Sun [Tue, 13 Jun 2017 16:50:41 +0000 (09:50 -0700)]
cmd: ethsw: Fix out-of-bounds error
The for loop in cmd_keywords_opt_check() seems to use wrong array to
set boundary, reported by Coverity analysis.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Tom Rini <trini@konsulko.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Coverity (CID: 163251) Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Mon, 23 Jan 2017 22:04:34 +0000 (16:04 -0600)]
include: nand: move endif to end of file
The terminator endif of ifdef _NAND_H_ should be at the
end of file as a fail safe.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Stephen Warren [Thu, 13 Apr 2017 18:57:21 +0000 (12:57 -0600)]
ARM: tegra: remove Whistler support
Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
York Sun [Tue, 6 Jun 2017 16:22:40 +0000 (09:22 -0700)]
net: phy: marvell: Fix init function for m88e1145
Commit a058052c changed the generic phy_reset() to clear all bits in
BMCR. This inevitably clears the ANEG bit. m88e1145 requires any
change to ANEG bit to be followed by a software reset. This seems to
be different from other PHYs. Implement read-modify-write procedure
for this PHY init.
Signed-off-by: York Sun <york.sun@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Lokesh Vutla [Sat, 10 Jun 2017 07:52:56 +0000 (13:22 +0530)]
board: ti: am335x: Fix scale_vcore for beaglebones
commit 0650798824 ("board: am335x: Introduce scale_vcores")
updated voltages of each board based on efuse. It updated
beagle bone specific voltages under the condition board_is_bone().
But this is true only for BeagleBoneWhite. Due to which voltages
are not configured for BBB, BBW as wrong device is being probed.
So create a common function board_is_beaglebonex() which includes
am335x based beagle family. Use this for updating voltages.
Also remove extra if condition for selecting voltages which is
done later using a switch case and match usb current limit as
before the commit 0650798824.
ARM: dts: keystone-k2hk-evm: Add U-boot specific dtsi file
With Davinci I2C switching to device model, K2HK requires U-boot specific
device tree entries. This is only required for I2C 1 which is needed
extremely early during the boot process.
Fixes: 1743d040b1df ("ARM: keystone: Enable DM_I2C by default") Reported-by: Yan Liu <yan-liu@ti.com> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Lothar Waßmann [Thu, 8 Jun 2017 12:16:14 +0000 (14:16 +0200)]
cmd: nvedit: bring error message in sync with condition under which it appears
The list of symbols listed in the error message for missing Kconfig
symbols is out of sync with the symbols actually tested.
Add the missing symbols and reorder their appearance to be in sync
with the #if statement for easier checking.
Lothar Waßmann [Thu, 8 Jun 2017 12:04:03 +0000 (14:04 +0200)]
cmd: mtdparts: fix uninitialized variable warning
commit 06a040a31bcf ("cmd: mtdparts: fix null pointer dereference in parse_mtdparts")
removed the initialization of a pointer variable, which is
subsequently used in a debug() call. This produces an uninitialized
variable warning, when compiling with DEBUG defined.
Lothar Waßmann [Thu, 8 Jun 2017 08:18:25 +0000 (10:18 +0200)]
board_f: fix calculation of reloc_off
relocate_code() calculates the relocation offset wrt. the symbol
__image_copy_start which happens to have the same value as
CONFIG_TEXT_BASE on most systems.
When creating an i.MX boot image with an integrated IVT it is
convenient to have CONFIG_TEXT_BASE point to the start of the IVT
that is prepended to the actual code. Thus CONFIG_TEXT_BASE will
differ from __image_copy_start, while the calculation
'gd->relocaddr - __image_copy_start' still gives the right relocation
offset.
Lothar Waßmann [Thu, 8 Jun 2017 07:52:33 +0000 (09:52 +0200)]
arm: adjust PC displayed in exception handlers to point to the failing instruction
Adjust the program counter register to point to the failing
instruction depending on the exeption type.
This makes it easier to localize the offending instruction leading to
a fatal exception.
Lothar Waßmann [Thu, 8 Jun 2017 07:48:41 +0000 (09:48 +0200)]
ARM: remove bogus cp_delay() function
The cp_delay() function was introduced because of a missing 'volatile'
attribute to the 'asm' statement in get_cr() which led to the 'mrc'
instruction in get_cr() being optimised out eventually.
This has been fixed in commit 53fd4b8c22bb ("arm: mmu: Add missing volatile for reading SCTLR register")
but the bogus cp_delay() function which was introduced as a workaround
for the malfunctioning get_cr() was never removed.
Simplify baud rate register formula and use the oversampling
uart feature.
This code is aligned with what is implemented in kernel driver
drivers/tty/serial/stm32-usart.c since kernel v4.9.
Patrice Chotard [Thu, 8 Jun 2017 07:26:54 +0000 (09:26 +0200)]
serial: stm32x7: align compatible with kernel one
stm32x7.c driver is dedicated for STM32F7.
In kernel, "st,stm32-usart" and "st,stm32-uart" compatible
strings are dedicated for STM32F4.
To keep U-boot and kernel aligned, replace the serial compatible
string from "st,stm32-usart", "st,stm32-uart" to
"st,stm32f7-usart", "st,stm32f7-uart" specific for STM32F7.
Simon Glass [Wed, 7 Jun 2017 16:28:47 +0000 (10:28 -0600)]
rkcommon.c: Drop pointless assignment
Assigning a variable to itself is not necessary. Drop this and also add a
check for malloc() failure.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Coverity (CID: 161418) Fixes: 111bcc4 (rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399)
Simon Glass [Wed, 7 Jun 2017 16:28:46 +0000 (10:28 -0600)]
board_f: Use IS_ENABLED instead of #ifdef in initf_bootstage()
The current implementation makes it look like the 'if (from_spl)' part is
dead code because these features are not enabled for sandbox. We could
enable it for sandbox_spl, but this is not done yet (it requires sharing
memory between SPL and U-Boot proper which is in fact supported).
It is probably nicer to avoid #ifdef anyway. Change it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Coverity (CID: 163244) Fixes: 824bb1b (bootstage: Support SPL)
projects / u-boot / log