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7 years agoARM: DRA7: AMxx: Make sure that the SPL always reads the configuration EEPROM
Jean-Jacques Hiblot [Thu, 1 Dec 2016 09:37:03 +0000 (10:37 +0100)]
ARM: DRA7: AMxx: Make sure that the SPL always reads the configuration EEPROM

The bootrom may corrupt the area of SRAM used to store the ti_common_eeprom
structure. This patch makes sure that it's always read after a reset, even
if a valid MAGIC number is found in the SRAM.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodm: spl: mmc: Fix EXT SPL support
Michal Simek [Thu, 1 Dec 2016 10:09:01 +0000 (11:09 +0100)]
dm: spl: mmc: Fix EXT SPL support

The patch
"dm: spl: mmc: Support CONFIG_BLK in SPL MMC"
(sha1: 87bce4e5c0b55452d70830928b2d7b98fa24d4e3)
converted FAT part of spl_mmc_do_fs_boot() but forget to update also EXT
part by 's/&mmc->block_dev/mmc_get_blk_desc(mmc)/'.
This patch is fixing compilation error when CONFIG_SPL_EXT_SUPPORT
is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://www.denx.de/git/u-boot-i2c
Tom Rini [Mon, 5 Dec 2016 16:02:01 +0000 (11:02 -0500)]
Merge git://www.denx.de/git/u-boot-i2c

7 years agosata: sata_mv: Fix misaligned cache warnings
Stefan Roese [Fri, 18 Nov 2016 16:21:51 +0000 (17:21 +0100)]
sata: sata_mv: Fix misaligned cache warnings

This patch fixes the warnings about misaligned cache on Armada XP:

CACHE: Misaligned operation at range [7facb4007facb460]

Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Restrict memory size to a usable maximum
Stefan Roese [Fri, 11 Nov 2016 07:18:44 +0000 (08:18 +0100)]
arm64: mvebu: Restrict memory size to a usable maximum

Not all memory is mapped in the MMU. So we need to restrict the memory
size so that U-Boot does not try to access it. Also, the internal
registers are located at 0xf000.0000 - 0xffff.ffff. Currently only 2GiB
are mapped for system memory. This is what we pass to the U-Boot
subsystem here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add PCI support to DB-88F8040 board
Stefan Roese [Thu, 27 Oct 2016 11:36:45 +0000 (13:36 +0200)]
arm64: mvebu: Add PCI support to DB-88F8040 board

This patch adds PCI support to the Marvell Armada-8K devel board.
Additionally the Intel E1000 ethernet driver is enabled so that
network support is available on this board, even without the
internal network interfaces being supported (yet).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add regions for PCI spaces to the memory map
Stefan Roese [Thu, 27 Oct 2016 11:34:03 +0000 (13:34 +0200)]
arm64: mvebu: Add regions for PCI spaces to the memory map

To use the PCIe driver, its controller memory and the PCIe regions need
to get mapped in the MMU. Otherwise these areas can't be accessed.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agopci: mvebu: Add PCIe driver for Armada-8K
Shadi Ammouri [Thu, 27 Oct 2016 11:29:41 +0000 (13:29 +0200)]
pci: mvebu: Add PCIe driver for Armada-8K

This patch adds a driver for the PCIe controller integrated in the
Marvell Armada-8K SoC. This controller is based on the DesignWare
IP core.

The original version was written by Shadi and Yehuda. I ported this
driver to the latest mainline U-Boot version with DM support.

Tested on the Marvell DB-88F8040 Armada-8K eval board.

Signed-off-by: Shadi Ammouri <shadi@marvell.com>
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agodrivers/phy: marvell: Add support for the slave CP COMPHY device
Stefan Roese [Tue, 25 Oct 2016 16:16:25 +0000 (18:16 +0200)]
drivers/phy: marvell: Add support for the slave CP COMPHY device

With the support for the Armada 8k, a 2nd COMPHY controller now needs
to get supported from the CP110 slave controller. This patch adds support
for this 2nd contoller in the COMPHY driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Init COMPHY from the slave-CP on the A8k
Stefan Roese [Tue, 25 Oct 2016 16:12:40 +0000 (18:12 +0200)]
arm64: mvebu: Init COMPHY from the slave-CP on the A8k

The Armada8k implements 2 CPs (communication processors) and the 2nd
CP also is equipped with a COMPHY controller. This patch now loops
over all enabled MISC devices (CP110) enabled in the DT to initialize
all CPs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-8040-db.dts: Add I2C and SPI aliases
Stefan Roese [Tue, 25 Oct 2016 16:11:44 +0000 (18:11 +0200)]
arm64: mvebu: armada-8040-db.dts: Add I2C and SPI aliases

Add I2C and SPI aliases to enable usage in U-Boot. Otherwise U-Boot will
not be able to use the SPI NOR chip for environment storage and use
"i2c dev 0" to select this I2C bus.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-8040-db.dts: Add COMPHY configuration
Stefan Roese [Tue, 25 Oct 2016 15:43:25 +0000 (17:43 +0200)]
arm64: mvebu: armada-8040-db.dts: Add COMPHY configuration

This patch adds the COMPHY device tree configuration to the DT file for
the Marvell DB-88F8040 devel board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-cp110-slave.dtsi: Add COMPHY / UTMI device tree nodes
Stefan Roese [Tue, 25 Oct 2016 15:41:12 +0000 (17:41 +0200)]
arm64: mvebu: armada-cp110-slave.dtsi: Add COMPHY / UTMI device tree nodes

This patch adds the COMPHY and UTMI device tree nodes to the cp110-slave
dtsi file for the Armada 8K.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-cp110-master.dtsi: Rename comphy DT node names
Stefan Roese [Tue, 25 Oct 2016 15:35:55 +0000 (17:35 +0200)]
arm64: mvebu: armada-cp110-master.dtsi: Rename comphy DT node names

Since the cp110 slave also has comphy DT nodes, the names need to be
renamed to avoid a name clash. Lets use the common naming scheme:
"cpm_xxx" for master and "cps_xxx" for slave.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add support for the DB-88F8040 Armada 8k devel board
Stefan Roese [Tue, 25 Oct 2016 09:47:51 +0000 (11:47 +0200)]
arm64: mvebu: Add support for the DB-88F8040 Armada 8k devel board

This patch adds the necessary files to support the Marvell Armada 8k
devel board. Most board specfic files are shared with the Armada 7k
boards under the name "armada-8k*". So only minimal changes are
necessary to add this basic board support (except the DT files of
course).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add slave CP area to the memory map
Stefan Roese [Tue, 25 Oct 2016 16:14:29 +0000 (18:14 +0200)]
arm64: mvebu: Add slave CP area to the memory map

To enable access to the slave CP its memory needs to be added to the
MMU memory map.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-8k: Only configure xHCI power on DB-88F7040 board
Stefan Roese [Tue, 25 Oct 2016 10:41:45 +0000 (12:41 +0200)]
arm64: mvebu: armada-8k: Only configure xHCI power on DB-88F7040 board

This patch uses of_machine_is_compatible() to detect the board at runtime
and only configured the I2C IO expander for the xHCI power / reset on
the DB-88F7040 board. As this code will be used by other Armada-7k/8k
ports, its necessary to use this runtime detection here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add Armada-80x0 dts/dtsi files
Stefan Roese [Tue, 25 Oct 2016 08:10:32 +0000 (10:10 +0200)]
arm64: mvebu: Add Armada-80x0 dts/dtsi files

Add the latest version of the DT files from the Linux kernel.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Rename db-88f7040 files to armada-8k
Stefan Roese [Tue, 25 Oct 2016 08:56:19 +0000 (10:56 +0200)]
arm64: mvebu: Rename db-88f7040 files to armada-8k

This moves some of the Armada DB-88F7040 board specific files to a more
generic name: armada-8k. This is in preparation for the Armada-8k
support which will be added soon. And since both platforms share
most devices, lets also share most source files to not duplicate
the code here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agodm: Add timeline and guide for porting I2C drivers
Simon Glass [Wed, 23 Nov 2016 13:34:45 +0000 (06:34 -0700)]
dm: Add timeline and guide for porting I2C drivers

Add a README with a brief guide to porting i2c drivers over to use driver
model.

Add a timeline also. All I2C drivers should be converted by the end
of June 2017.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agodm: i2c: Add a note to I2C drivers which need conversion
Simon Glass [Wed, 23 Nov 2016 13:34:44 +0000 (06:34 -0700)]
dm: i2c: Add a note to I2C drivers which need conversion

Maintainers need to be notified more directly of the need to convert these
drivers. Add a note to the top each affected file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agosamsung: i2c: Split the high-speed I2C code into a new driver
Simon Glass [Wed, 23 Nov 2016 13:34:43 +0000 (06:34 -0700)]
samsung: i2c: Split the high-speed I2C code into a new driver

Now that driver model is used for I2C on all boards, we can split the
high-speed code into its own driver. There is virtually no common code,
and this significantly reduces confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agosamsung: i2c: Drop old code from I2C driver
Simon Glass [Wed, 23 Nov 2016 13:34:42 +0000 (06:34 -0700)]
samsung: i2c: Drop old code from I2C driver

Now that all boards use DM_I2C we can drop the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoarm: samsung: Convert s5p_goni and smdkc100 to DM_I2C
Simon Glass [Wed, 23 Nov 2016 13:34:41 +0000 (06:34 -0700)]
arm: samsung: Convert s5p_goni and smdkc100 to DM_I2C

These are the last two samsung boards that don't use DM_I2C. Move them
over, leaving #ifdefs to allow the maintainer to complete this work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoarm: exynos: i2c: Convert exynos boards to use DM_I2C
Simon Glass [Wed, 23 Nov 2016 13:34:40 +0000 (06:34 -0700)]
arm: exynos: i2c: Convert exynos boards to use DM_I2C

Three boards are still not converting to use DM_I2C. They are also using
the old PMIC framework. Rather than removing them, add #ifdefs to allow
them to continue to build. This will give the maintainers a little more
time to decide whether to convert them or not.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Sun, 4 Dec 2016 18:55:15 +0000 (13:55 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx

7 years agodefconfig: am43xx_evm: Enable DM_SPI and DM_SPI_FLASH
Vignesh R [Tue, 22 Nov 2016 09:12:56 +0000 (14:42 +0530)]
defconfig: am43xx_evm: Enable DM_SPI and DM_SPI_FLASH

Commit 4c4e3b37750f3("ARM: AM43xx: Enable FIT") accidentally disabled
DM_SPI and DM_SPI_FLASH. Add back DM_SPI and DM_SPI_FLASH to
am43xx_evm_defconfig in order to make use of DM framework for QSPI.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
7 years agocommon: image: Remove FIT header update from image post-processing
Andrew F. Davis [Mon, 21 Nov 2016 20:37:09 +0000 (14:37 -0600)]
common: image: Remove FIT header update from image post-processing

After an image is selected out of a FIT blob for further processing we
run an optional, platform specific, post-processing function on this
component. This post-processing may modify the position and size of the
image, so after post-processing we update the location and size for this
image in the FIT header. This can cause problems as the position of
subsequent components in the FIT blob are only referenced by relative
position to the end of the last component. When we resize or move a
component the following components position will be calculated
incorrectly. To fix this, we do not update the FIT header but instead
only update our local understanding of the image data. This also allows
us to re-run post-processing steps if needed.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Carlos Hernandez <ceh@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agousb: gadget: remove unused shortname variable
Andre Przywara [Wed, 16 Nov 2016 00:50:16 +0000 (00:50 +0000)]
usb: gadget: remove unused shortname variable

The shortname variable isn't referenced anywhere in the code, so just
remove it.

Pointed out by a GCC 6.2 default warning option.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
7 years agodavinci: da8xxevm: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:12 +0000 (00:50 +0000)]
davinci: da8xxevm: fix indentation

Apparently the indentation is wrong in this case, as the second message
should be printed indepdently of the if statement.

Fix this indentation to avoid both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
7 years agousb: eth: r8152_fw: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:11 +0000 (00:50 +0000)]
usb: eth: r8152_fw: fix indentation

Apparently the indentation is wrong here, fix this to avoid compiler
warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agomarvell: comphy_a3700: fix bitmask
Andre Przywara [Wed, 16 Nov 2016 00:50:10 +0000 (00:50 +0000)]
marvell: comphy_a3700: fix bitmask

Obviously the mask for the rx and tx select field cannot be right,
as it would overlap in one and exceed the 32-bit register in the other
case. From looking at the neighbouring bits it looks like the mask
should be really 4 bits wide instead of 8.

Pointed out by a GCC 6.2 (default) warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agonet: rtl8169: remove unneeded definition
Andre Przywara [Wed, 16 Nov 2016 00:50:09 +0000 (00:50 +0000)]
net: rtl8169: remove unneeded definition

The rtl8169_intr_mask variable isn't used anywhere in the code, so
just remove it to avoid a GCC 6.2 compiler warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: e1000: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:07 +0000 (00:50 +0000)]
net: e1000: fix indentation

Apparently the indentation is off here, for the IGB model just want to
bail out early.
Fix this to avoid both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agomtd: cfi_flash: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:06 +0000 (00:50 +0000)]
mtd: cfi_flash: fix indentation

The indentation is misleading here and suggests that the write command
will be only executed in the else clause.
It seems like this is not intended, so fix the indentation to avoid
both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoserial: Drop the s3c24x0 serial driver
Simon Glass [Wed, 23 Nov 2016 13:01:32 +0000 (06:01 -0700)]
serial: Drop the s3c24x0 serial driver

This is not used by any boards. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Müller <d.mueller@elsoft.ch>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarm: Remove VCMA9 board
Simon Glass [Wed, 23 Nov 2016 13:01:31 +0000 (06:01 -0700)]
arm: Remove VCMA9 board

This board has not been converted to DM_SERIAL by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Müller <d.mueller@elsoft.ch>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarm: Remove smdk2410 board
Simon Glass [Wed, 23 Nov 2016 13:01:30 +0000 (06:01 -0700)]
arm: Remove smdk2410 board

This board has not been converted to DM_SERIAL by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Müller <d.mueller@elsoft.ch>
7 years agoserial: Update docs to indicate mcfuart supports DM_SERIAL
Simon Glass [Wed, 23 Nov 2016 13:01:29 +0000 (06:01 -0700)]
serial: Update docs to indicate mcfuart supports DM_SERIAL

This driver was converted so we should remove it from the list.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopost: cosmetic: fix typo
Niko Mauno [Wed, 23 Nov 2016 12:52:32 +0000 (14:52 +0200)]
post: cosmetic: fix typo

Change 'date' to 'data'.

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
7 years agoCosmetic api: api_storage.c Spelling correction
Walt Feasel [Wed, 23 Nov 2016 06:26:14 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Spelling correction

Make spelling correction for 'from'

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Comment style
Walt Feasel [Wed, 23 Nov 2016 06:26:13 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Comment style

Make comment style modifications

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Line over 80 char
Walt Feasel [Wed, 23 Nov 2016 06:26:12 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Line over 80 char

Make checkpatch style modification for
WARNING: line over 80 characters

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Blank line after {
Walt Feasel [Wed, 23 Nov 2016 06:26:11 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Blank line after {

Make checkpatch style modification for
CHECK: Blank lines aren't necessary after
an open brace '{'

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Align parenthesis
Walt Feasel [Wed, 23 Nov 2016 06:26:10 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Align parenthesis

Make checkpatch style modification for
CHECK: Alignment should match open parenthesis

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoti_armv7_common: env: Increase IO buffer size
Lokesh Vutla [Fri, 25 Nov 2016 05:44:26 +0000 (11:14 +0530)]
ti_armv7_common: env: Increase IO buffer size

There are certain environment variables whose length is greater than
the defined IO buffer size. So, increase the IO buffer size to print the
entire variables.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: dts: AM571x-IDK Initial Support
Schuyler Patton [Fri, 25 Nov 2016 05:44:25 +0000 (11:14 +0530)]
ARM: dts: AM571x-IDK Initial Support

Add initial DTS support for AM571-IDK evm.

Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Add support for the am571x idk
Steve Kipisz [Fri, 25 Nov 2016 05:44:24 +0000 (11:14 +0530)]
board: ti: am57xx: Add support for the am571x idk

The AM571x Industrial Development Kit (IDK) is a board based on TI's
AM571x SoC which has a single core 1.5GHz Cortex-A15processor. This
board is a development platform for the Industrial Market with:

- 1GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI
- PRU-ICSS
- uSD
- 16GB eMMC
- CAN
- RS-485
- PCIe
- USB3.0
- Video Input Port
- Industrial IO port and expansion connector

The PRU/ICSS will be supported by 3rd party software for EtherCat,
Profibus, and other Industrial protocols.

The link to the data sheet and TRM can be found here:
http://www.ti.com/product/AM5718

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am572x-idk: Update pinmux using latest PMT
Lokesh Vutla [Fri, 25 Nov 2016 05:44:23 +0000 (11:14 +0530)]
board: ti: am572x-idk: Update pinmux using latest PMT

Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
board files named am572x_idk_v1p3b_sr2p0 that were autogenerated on
20th October, 2016 by "Steve Kipisz <s-kipisz2@ti.com>" and
"Tom Johnson <thjohnson@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am572x: Add pinmux for X15/GPEVM SR2.0 using latest PMT
Nishanth Menon [Fri, 25 Nov 2016 05:44:22 +0000 (11:14 +0530)]
board: ti: am572x: Add pinmux for X15/GPEVM SR2.0 using latest PMT

Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
board files named am572x_gp_evm_A3a_sr2p0 that were autogenerated on
19th October, 2016 by "Ahmad Rashed<a-rashed@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Update SR1.1 RGMII0 iodelay timings for x15/GPEVM
Nishanth Menon [Fri, 25 Nov 2016 05:44:21 +0000 (11:14 +0530)]
board: ti: am57xx: Update SR1.1 RGMII0 iodelay timings for x15/GPEVM

Update the timing for RGMII0 interface based on
PCT_DRA75x_DRA74x_SR1.1_v1.3.10 version (Jan 2016). This update
is for SR1.1

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Add support for detection of X15 revb1
Lokesh Vutla [Fri, 25 Nov 2016 05:44:20 +0000 (11:14 +0530)]
board: ti: am57xx: Add support for detection of X15 revb1

BeagleBoard-X15 Rev B1 with SR1.1 platform have incompatible changes for HDMI
GPIO requiring new dtb support. This implies we have to properly identify
the platform now as well. Hence provide a different board name for the
Rev B1 variants.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Add support for detection of reva3 variations for GPEVM
Nishanth Menon [Fri, 25 Nov 2016 05:44:19 +0000 (11:14 +0530)]
board: ti: am57xx: Add support for detection of reva3 variations for GPEVM

AM57xx evm Rev A3 with SR2.0 platform have incompatible changes for HDMI
GPIO requiring new dtb support. This implies we have to properly identify
the platform now as well. Hence provide a different board name for the
Rev A3 variations.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: dts: am57xx: sync DT with latest Linux
Lokesh Vutla [Fri, 25 Nov 2016 05:44:18 +0000 (11:14 +0530)]
ARM: dts: am57xx: sync DT with latest Linux

Sync all am57xx based dts files with latest Linux

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: dra7xx: Enable lp873x options
Keerthy [Wed, 23 Nov 2016 07:55:34 +0000 (13:25 +0530)]
configs: dra7xx: Enable lp873x options

DRA71-evm uses LP873x regulator. Enable lp873x PMIC config options.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: dra7xx: Enable pmic/regulator options
Lokesh Vutla [Wed, 23 Nov 2016 07:55:33 +0000 (13:25 +0530)]
configs: dra7xx: Enable pmic/regulator options

Enable pmic/regulator config options.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: dra7xx: hs: Enable DM_ETH
Lokesh Vutla [Wed, 23 Nov 2016 07:55:32 +0000 (13:25 +0530)]
configs: dra7xx: hs: Enable DM_ETH

Enable DM_ETH for hs boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: ti_omap5_common: Select dtb name for dra71x
Nishanth Menon [Wed, 23 Nov 2016 07:55:31 +0000 (13:25 +0530)]
configs: ti_omap5_common: Select dtb name for dra71x

Select dtb name for dra71x-evm.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: dts: dra71x-evm: Add DT support
Lokesh Vutla [Wed, 23 Nov 2016 07:55:30 +0000 (13:25 +0530)]
ARM: dts: dra71x-evm: Add DT support

Add DT support for dra71-evm and built it as part of FIT image.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: dts: dra7xx: sync DT with latest Linux
Lokesh Vutla [Wed, 23 Nov 2016 07:55:29 +0000 (13:25 +0530)]
ARM: dts: dra7xx: sync DT with latest Linux

Sync all dra7xx based dts files with latest Linux

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: OMAP4+: Add support for getting pbias info from board
Lokesh Vutla [Wed, 23 Nov 2016 07:55:28 +0000 (13:25 +0530)]
ARM: OMAP4+: Add support for getting pbias info from board

Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based
boards to enable mmc regulator. This is not true always like in case of
DRA71x-evm. So get this information based on the board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Delete omap4_vmmc_pbias_config from omap_hsmmc.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: dra71x-evm: Add PMIC support
Keerthy [Wed, 23 Nov 2016 07:55:27 +0000 (13:25 +0530)]
board: ti: dra71x-evm: Add PMIC support

Add the pmic_data for LP873x PMIC which is used to power
up dra71x-evm.

Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating
the efuse registers only to use OPP_NOM irrespective of any
CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined.

[1] http://www.ti.com/product/DRA718/technicaldocuments

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: dra72: Introduce optimization for rgmii timing for rev C
Nishanth Menon [Wed, 23 Nov 2016 07:55:26 +0000 (13:25 +0530)]
board: ti: dra72: Introduce optimization for rgmii timing for rev C

Rev C version of EVM does require IODelay to be configured for RGMII
pins in MANUAL_1 configuration. Update the same based on PG2.0 initial
simulation values.
Data based on PCT_DRA72x_SR2.0_SR1.0_v1.3.0.7

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: dra71x-evm: Add mux settings
Lokesh Vutla [Wed, 23 Nov 2016 07:55:25 +0000 (13:25 +0530)]
board: ti: dra71x-evm: Add mux settings

Add mux and iodelay settings for dra71x-evm.
Data generated using PCT_DRA71x_SR2.0_v1.0.0.0 version (June 2016).

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: dra71x-evm: Add epprom support
Lokesh Vutla [Wed, 23 Nov 2016 07:55:24 +0000 (13:25 +0530)]
board: ti: dra71x-evm: Add epprom support

The dra71x-evm is a board based on TI's DRA718 processor targeting BOM-optimized
entry infotainment systems such as display audio and is a software compatible
derivative of the highly successful DRA74 and DRA72 processor families.
More information can be found here[1].

Add epprom detection for dra71-evm.

[1] http://www.ti.com/product/dra718

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP
Suman Anna [Wed, 23 Nov 2016 07:24:41 +0000 (12:54 +0530)]
ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP

This patch adds support to update the device-tree blob to adjust the
DSP and IVA DPLL clocks pertinent to the selected OPP choice, with
the default being OPP_NOM. The voltage settings are done in u-boot,
but the actual clock configuration itself is done in kernel because
of the following reasons:
1. SoC definition constraints us to NOT to do dynamic voltage
   scaling ever after the initial avs0 setting in bootloader
   - so the voltage must be set in bootloader.
2. The voltage level must be set even if the IP blocks like
   GPU/DSP are unused.
3. The IVA, GPU and DSP DPLLs are not essential for u-boot functionality,
   and similar DPLL clock configuration code has been cleaned up in
   v2014.10 u-boot release. See commit, 02c41535b6a4 ("ARM: OMAP4/5:
   Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL").

The non-essential DPLLs are configured within the kernel during
the clock init step when parsing the device tree and creating
the clock devices. This approach meets both the u-boot and kernel
needs.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: DRA7: Redefine voltage and efuse macros per OPP using Kconfig
Suman Anna [Wed, 23 Nov 2016 07:24:40 +0000 (12:54 +0530)]
ARM: DRA7: Redefine voltage and efuse macros per OPP using Kconfig

Redefine the macros used to define the voltage values and the
efuse register offsets based on OPP for all the voltage domains.
This is done using Kconfig macros that can be set in a defconfig
or selected during a config step. This allows a voltage domain
to be configured/set to a corresponding voltage value depending
on the OPP selection choice.

The Kconfig choices have been added for MPU, DSPEVE, IVA and GPU
voltage domains, with the MPU domain restricted to OPP_NOM. The
OPP_OD and OPP_HIGH options will be added when the support for
configuring the MPU clock frequency is added. The clock
configuration for other voltage domains is out of scope in
u-boot code.

The CORE voltage domain does not have separate voltage values
and efuse register offset at different OPPs, while the MPU
voltage domain only has different efuse register offsets for
different OPPs, but uses the same voltage value. Any different
choices of OPPs for voltage domains on common ganged-rails
is automatically taken care to select the corresponding
highest OPP voltage value.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: OMAP4+: Add support for dynamically selecting OPPs
Lokesh Vutla [Wed, 23 Nov 2016 07:24:39 +0000 (12:54 +0530)]
ARM: OMAP4+: Add support for dynamically selecting OPPs

It can be expected that different paper spins of a SoC can have
different definitions for OPP and can have their own constraints
on the boot up OPP for each voltage rail. In order to have this
flexibility, add support for dynamically selecting the OPP voltage
based on the board to handle any such exceptions.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoomap4_sdp4430: Disable SPL_OS_BOOT
Tom Rini [Sun, 4 Dec 2016 18:54:19 +0000 (13:54 -0500)]
omap4_sdp4430: Disable SPL_OS_BOOT

We are tight on space on this board so drop SPL_OS_BOOT

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agopowerpc: mpc86xx: Convert CONFIG_SYS_FSL_NUM_LAWS to Kconfig option
York Sun [Thu, 1 Dec 2016 22:10:47 +0000 (14:10 -0800)]
powerpc: mpc86xx: Convert CONFIG_SYS_FSL_NUM_LAWS to Kconfig option

Use Kconfig instead of defining this macro in header file.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-dm
Tom Rini [Sun, 4 Dec 2016 00:43:51 +0000 (19:43 -0500)]
Merge branch 'master' of git://www.denx.de/git/u-boot-dm

7 years agocmd: move CMD_PXE to Kconfig
Yann E. MORIN [Sun, 13 Nov 2016 20:59:52 +0000 (21:59 +0100)]
cmd: move CMD_PXE to Kconfig

Currently, CMD_PXE is forcibly enabled in config_distro_defaults.h, so
that general purpose distributions can rely on it being defined. This
header is included, under conditions or not, by various archs or
famillies of archs / SoCs.

However, it is very possible that boards based on those SoCs will not
have a physical ethernet connector at all, even if the have a MAC; for
example, the Nanopi Neo AIR (sunxi H3) does not. It is also possible
that network booting is absolutely not necessary for a device.

However, it is not possible to disable the PXE command, as it is
forcibly enabled and is non-configurable.

But it turns out we already have a config option to build a distro-ready
image, in the name of DISTRO_DEFAULTS.

Move CMD_PXE out of the hard-coded config_distro_defaults.h into a
Kconfig option, that gets selected by DISTRO_DEFAULTS when it is set.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Joe Hershberger <joe.hershberger@ni.com>
[trini: Make it select MENU, run moveconfig.py]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoEnable DISTRO_DEFAULT on platforms that missed it before
Tom Rini [Tue, 29 Nov 2016 14:14:57 +0000 (09:14 -0500)]
Enable DISTRO_DEFAULT on platforms that missed it before

A number of platforms had been using the distro default feature before
it was moved to Kconfig but did not enable the new Kconfig option when
it was enabled.  This caused a regression in terms of features and this
introduces breakage when more things move to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agocmd: Convert CMD_BOOTMENU
Tom Rini [Tue, 29 Nov 2016 14:14:56 +0000 (09:14 -0500)]
cmd: Convert CMD_BOOTMENU

Also convert MENU while we're in here.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: add FIT image TEE processing
Andrew F. Davis [Tue, 29 Nov 2016 22:33:26 +0000 (16:33 -0600)]
board: ti: am57xx: add FIT image TEE processing

Populate the corresponding TEE image processing call to be
performed during FIT loadable processing.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: dra7xx: add FIT image TEE processing
Andrew F. Davis [Tue, 29 Nov 2016 22:33:25 +0000 (16:33 -0600)]
board: ti: dra7xx: add FIT image TEE processing

Populate the corresponding TEE image processing call to be
performed during FIT loadable processing.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarm: omap5: Add OPTEE node to fdt
Andrew F. Davis [Tue, 29 Nov 2016 22:33:24 +0000 (16:33 -0600)]
arm: omap5: Add OPTEE node to fdt

Add an OPTEE node to the FDT when TEE installation has completed
successfully. This informs the kernel of the presence of OPTEE.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarm: omap5: Add TEE loading support
Harinarayan Bhatta [Tue, 29 Nov 2016 22:33:23 +0000 (16:33 -0600)]
arm: omap5: Add TEE loading support

secure_tee_install is used to install and initialize a secure TEE OS such as
Linaro OP-TEE into the secure world. This function takes in the address
where the signed TEE image is loaded as an argument. The signed TEE image
consists of a header (struct tee_header), TEE code+data followed by the
signature generated using image signing tool from TI security development
package (SECDEV). Refer to README.ti-secure for more information.

This function uses 2 new secure APIs.

1. PPA_SERV_HAL_TEE_LOAD_MASTER - Must be called on CPU Core 0. Protected
   memory for TEE must be reserved before calling this function. This API
   needs arguments filled into struct ppa_tee_load_info. The TEE image is
   authenticated and if there are no errors, the control passes to the TEE
   entry point.

2. PPA_SERV_HAL_TEE_LOAD_SLAVE - Called on other CPU cores only after
   a TEE_LOAD_MASTER call. Takes no arguments. Checks if TEE was
   successfully loaded (on core 0) and transfers control to the same TEE
   entry point.

The code at TEE entry point is expected perform OS initialization steps
and return back to non-secure world (U-Boot).

Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarm: omap5: Add function to make an SMC call on cpu1
Harinarayan Bhatta [Tue, 29 Nov 2016 22:33:22 +0000 (16:33 -0600)]
arm: omap5: Add function to make an SMC call on cpu1

On DRA7xx platform, CPU Core 1 is not used in u-boot. However, in some
cases it is need to make secure API calls from Core 1. This patch adds
an assembly function to make a secure (SMC) call from CPU Core #1.

Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoimage: Add Trusted Execution Environment image type
Andrew F. Davis [Tue, 29 Nov 2016 22:33:21 +0000 (16:33 -0600)]
image: Add Trusted Execution Environment image type

Add a new image type representing Trusted Execution Environment (TEE)
image types. For example, an OP-TEE OS binary image.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoimage: Add FIT image loadable section custom processing
Andrew F. Davis [Tue, 29 Nov 2016 22:33:20 +0000 (16:33 -0600)]
image: Add FIT image loadable section custom processing

To help automate the loading of custom image types we add the ability
to define custom handlers for the loadable section types. When we find
a compatible type while loading a "loadable" image from a FIT image we
run its associated handlers to perform any additional steps needed for
loading this image.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodavinci: omapl138_lcdk: add DT support for EMMC boot
Fabien Parent [Tue, 29 Nov 2016 16:15:03 +0000 (17:15 +0100)]
davinci: omapl138_lcdk: add DT support for EMMC boot

When booting from EMMC, load the DTB and pass it to the kernel.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: improve readability of boot command
Fabien Parent [Tue, 29 Nov 2016 16:15:02 +0000 (17:15 +0100)]
davinci: omapl138_lcdk: improve readability of boot command

Improve the readability of the boot command. This will help a later
commit that adds DT support.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: add NAND SPL boot support
Fabien Parent [Tue, 29 Nov 2016 13:31:34 +0000 (14:31 +0100)]
davinci: omapl138_lcdk: add NAND SPL boot support

NAND SPL boot was missing. Add it. The README specific to omapl138-lcdk
is also removed because its content does not apply anymore, i.e. the
generated AIS image can be flashed directly to the NAND without
using any external tool to create and bootable AIS image.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lck: remove obsolete define
Fabien Parent [Tue, 29 Nov 2016 13:31:33 +0000 (14:31 +0100)]
davinci: omapl138_lck: remove obsolete define

NAND_MAX_CHIPS is not used anymore and has been replaced by
CONFIG_SYS_MAX_NAND_DEVICE. There is no need to keep the former
define.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: use correct name for CONFIG_SYS_NAND_MASK_ALE
Fabien Parent [Tue, 29 Nov 2016 13:31:32 +0000 (14:31 +0100)]
davinci: omapl138_lcdk: use correct name for CONFIG_SYS_NAND_MASK_ALE

CONFIG_SYS_ALE_MASK is not used anywhere. It has probably been
renamed to CONFIG_SYS_NAND_MASK_ALE. Rename it and remove the former
from the config_whitelist.txt file.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: use correct name for CONFIG_SYS_NAND_MASK_CLE
Fabien Parent [Tue, 29 Nov 2016 13:31:31 +0000 (14:31 +0100)]
davinci: omapl138_lcdk: use correct name for CONFIG_SYS_NAND_MASK_CLE

CONFIG_SYS_CLE_MASK is not used anywhere. It has probably been
renamed to CONFIG_SYS_NAND_MASK_CLE. Rename it and remove the former
from the config_whitelist.txt file.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: use correct define for 16 bit NAND chips
Fabien Parent [Tue, 29 Nov 2016 13:31:30 +0000 (14:31 +0100)]
davinci: omapl138_lcdk: use correct define for 16 bit NAND chips

The omapl138_lcdk header defines CONFIG_SYS_NAND_BUSWIDTH_16_BIT while
the correct name is CONFIG_SYS_NAND_BUSWIDTH_16BIT.
While renaming the only occurrence of CONFIG_SYS_NAND_BUSWIDTH_16_BIT,
let's also remove it from the config_whitelist.txt file.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoNAND: davinci: add support for NAND chips with 16 bits bus
Fabien Parent [Tue, 29 Nov 2016 13:31:29 +0000 (14:31 +0100)]
NAND: davinci: add support for NAND chips with 16 bits bus

The OMAPL138-LCD board uses a NAND chip with a 16 bits bus. Add
support into the davinci driver for 16 bit bus NAND chips.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: add u-boot sector for mmc/sd boot
Fabien Parent [Tue, 29 Nov 2016 13:23:41 +0000 (14:23 +0100)]
davinci: omapl138_lcdk: add u-boot sector for mmc/sd boot

Set the correct CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR value in order
to be able to boot from MMC/SD.

The SPL is stored at sector 0x75, while u-boot will follow at
sector 0xb5.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: da850evm: fix empty boot method list in the SPL
Fabien Parent [Tue, 29 Nov 2016 13:23:40 +0000 (14:23 +0100)]
davinci: da850evm: fix empty boot method list in the SPL

The list of available boot method is not part of the binary which
prevent the SPL from booting u-boot or Linux.

Add the missing .u_boot_list* sections to the binary to fix it.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: configure ddr2
Fabien Parent [Tue, 29 Nov 2016 13:23:39 +0000 (14:23 +0100)]
davinci: omapl138_lcdk: configure ddr2

The SPL is unable to load u-boot because the DDR2 is not configured.
Configure the DDR2.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: configure pll0
Fabien Parent [Tue, 29 Nov 2016 13:23:38 +0000 (14:23 +0100)]
davinci: omapl138_lcdk: configure pll0

The SPL is not able to boot properly because the PLL0 is not
configured. Configure it.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: davinci: Move CONFIG_SYS_DA850_DDR_INIT to Kconfig
Fabien Parent [Tue, 29 Nov 2016 13:23:37 +0000 (14:23 +0100)]
ARM: davinci: Move CONFIG_SYS_DA850_DDR_INIT to Kconfig

Clean config headers by moving CONFIG_SYS_DA850_DDR_INIT away to a
Kconfig file.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: davinci: Move CONFIG_SYS_DA850_PLL_INIT to Kconfig
Fabien Parent [Tue, 29 Nov 2016 13:23:36 +0000 (14:23 +0100)]
ARM: davinci: Move CONFIG_SYS_DA850_PLL_INIT to Kconfig

Clean config headers by moving CONFIG_SYS_DA850_PLL_INIT away to a
Kconfig file.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: DRA7x/AM57xx: Get rid of CONFIG_AM57XX
Nishanth Menon [Tue, 29 Nov 2016 09:52:00 +0000 (15:22 +0530)]
ARM: DRA7x/AM57xx: Get rid of CONFIG_AM57XX

CONFIG_AM57XX is just an unnecessary macro that is redundant given So,
remove the same instead of spreading through out the u-boot source
code and getting in the way to maintain common code for DRA7x family.

Acked-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agousb: xhci: Remove assumption of DWC instance based on DRA7 SoC type
Nishanth Menon [Tue, 29 Nov 2016 09:51:59 +0000 (15:21 +0530)]
usb: xhci: Remove assumption of DWC instance based on DRA7 SoC type

Both AM57xx and DRA7xx share the same set of base addresses for DWC
controllers. The usage however differ with DWC2 instance used typically
in AM57xx evms while DWC1 instances used in DRA7x platforms.

Use TARGET_SOC config to differentiate so that CONFIG_AM57XX can be dropped.

Eventually, this needs to be dt-fied.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: K2G: DDR3: Fix up priv ID for MPU
Nishanth Menon [Tue, 29 Nov 2016 06:37:50 +0000 (12:07 +0530)]
ARM: K2G: DDR3: Fix up priv ID for MPU

For ECC enabled DDR, we use EDMA to reset all memory values to 0. For
K2E/L/H/K the priv ID of 8 was indicative of ARM, but that is not the
case for K2G, where it is 1.

Unfortunately, ddr3 code had hard coded the privID and had missed
identification previously. Fix the same, else unforeseen behavior can
be expected in our reset of DDR contents to 0 for ECC enablement.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: AMx3xx: Make FIT boot as default boot on HS devices
Lokesh Vutla [Tue, 29 Nov 2016 06:28:03 +0000 (11:58 +0530)]
ARM: AMx3xx: Make FIT boot as default boot on HS devices

Verification has to be done before booting any images on HS devices. So
default the boot to FIT on HS devices.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: AM57xx: Make FIT boot as default boot on HS devices
Lokesh Vutla [Tue, 29 Nov 2016 06:28:02 +0000 (11:58 +0530)]
ARM: AM57xx: Make FIT boot as default boot on HS devices

Verification has to be done before booting any images on HS devices. So
default the boot to FIT on HS devices.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>