Jon Loeliger [Tue, 9 May 2006 13:23:49 +0000 (08:23 -0500)]
Get MPC8641HPCN flash images working.
Enable the CFI driver.
Remove bogus LAWBAR7 cruft.
Use correct TEXT_BASE, Fixup load script.
Enable SPD EEPROM during DDR setup.
Use generic RFC 1918 IP addresses by default.
Wolfgang Denk [Tue, 18 Apr 2006 09:05:03 +0000 (11:05 +0200)]
MPC5200: enable snooping of DMA transactions on XLB even if no PCI
is configured; othrwise DMA accesses aren't cache coherent which
causes for example USB to fail.
* Fix dbau1x00 Board
- Fix dbau1x00 boards broken by dbau1550 patch
PLL:s were not set for boards other than 1550.
Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
Default boot is now bootp for cards other than 1550.
Patch by Thomas Lange Aug 10 2005
- fix some compiler/parser error, if using m68k tool chain
- optical fix for protect on/off all messages, if using more
then one bank
Patch by Jens Scharsig, 28 July 2005
Remove dependencies between DoC code and old legacy NAND driver.
Necessary defines and data structures were copied to DoC specific files
so that legacy NAND code could be entirely removed from u-boot tree
in the near future.
Stefan Roese [Sat, 1 Apr 2006 11:41:03 +0000 (13:41 +0200)]
* Changes/fixes for drivers/cfi_flash.c:
- Add Intel legacy lock/unlock support to common CFI driver
On some Intel flash's (e.g. Intel J3) legacy unlocking is
supported, meaning that unlocking of one sector will unlock
all sectors of this bank. Using this feature, unlocking
of all sectors upon startup (via env var "unlock=yes") will
get much faster.
- Fixed problem with multiple reads of envronment variable
"unlock" as pointed out by Reinhard Arlt & Anders Larsen.
- Removed unwanted linefeeds from "protect" command when
CFG_FLASH_PROTECTION is enabled.
- Changed p3p400 board to use CFG_FLASH_PROTECTION
Patch by Stefan Roese, 01 Apr 2006
* Changes/fixes for drivers/cfi_flash.c:
- Correctly handle the cases where CFG_HZ != 1000 (several
XScale-based boards)
- Fix the timeout calculation of buffered writes (off by a
factor of 1000)
Patch by Anders Larsen, 31 Mar 2006
Stefan Roese [Fri, 17 Mar 2006 09:28:24 +0000 (10:28 +0100)]
Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Wolfgang Denk [Mon, 13 Mar 2006 11:37:35 +0000 (12:37 +0100)]
Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and
cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories
Patch by Andreas Engel, 13 Mar 2006
Stefan Roese [Mon, 13 Mar 2006 10:16:36 +0000 (11:16 +0100)]
Change max size of uncompressed uImage's to 8MByte and add
CFG_BOOTM_LEN to adjust this setting.
As mentioned by Robin Getz on 2005-05-24 the size of uncompressed
uImages was restricted to 4MBytes. This default size is now
increased to 8Mbytes and can be overrided by setting CFG_BOOTM_LEN
in the board config file.
Wolfgang Denk [Sun, 12 Mar 2006 23:50:48 +0000 (00:50 +0100)]
Change the sequence of events in soft_i2c.c:send_ack() to keep from
incorrectly generating start/stop conditions on the bus.
Patch by Andrew Dyer, 26 Jul 2005
Wolfgang Denk [Sun, 12 Mar 2006 23:46:05 +0000 (00:46 +0100)]
Fix bug in [id]cache_status commands for MPC85xx processors;
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
Wolfgang Denk [Sun, 12 Mar 2006 01:10:00 +0000 (02:10 +0100)]
Add ADI Blackfin support
- add support for Analog Devices Blackfin BF533 CPU
- add support for the ADI BF533 Stamp uClinux board
- add support for the ADI BF533 EZKit board
Patches by Richard Klingler, June 11th 2005:
Wolfgang Denk [Sun, 12 Mar 2006 00:48:55 +0000 (01:48 +0100)]
RPXlite configuration fixes
- Use correct flash sector size
- Use correct memory test end address
- Add support for bzip2 compression
- Various small fixes
Patch by Yuli Barcohen, 05 Jun 2005
Wolfgang Denk [Sun, 12 Mar 2006 00:45:44 +0000 (01:45 +0100)]
Memory configuration changes for ZPC.1900 board
- Fix SDRAM timing on both local bus and 60x bus
- Add support for second flash bank (SIMM)
- Change boot flash base
Patch by Yuli Barcohen, 05 Jun 2005
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