i.MX31: Start the I2C clock on driver initialisation
i.MX31 powers on with most clocks running, so, after a power on this explicit
clock start up is not required. However, as Linux boots it disables most clocks
to save power. This includes the I2C clock. If we then soft reboot from Linux
the I2C clock stays off. This breaks the phycore, which has its environment in
I2C EEPROM. Fix the problem by explicitly starting the clock in I2C driver
initialisation routine.
Carolyn Smith [Thu, 12 Feb 2009 05:13:44 +0000 (06:13 +0100)]
ppc4xx: Fix initialization of the SDRAM_CODT register
This fixes the initialization of the SDRAM_CODT register in the ppc4xx DDR2
initialization code. It also removes use of the SDRAM_CODT_FEEDBACK_RCV_SINGLE_END
and SDRAM_CODT_FEEDBACK_DRV_SINGLE_END #define's since they are reserved bits.
Signed-off-by: Carolyn Smith <carolyn.smith@tektronix.com> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 11 Feb 2009 08:29:33 +0000 (09:29 +0100)]
ppc4xx: Fix problem with board_eth_init() vs cpu_eth_init() on AMCC boards
Some AMCC eval boards do have a board_eth_init() function calling
pci_eth_init(). These boards need to call cpu_eth_init() explicitly now
with the new eth_init rework.
Adam Graham [Mon, 9 Feb 2009 21:18:12 +0000 (13:18 -0800)]
ppc4xx: Autocalibration can set RDCC to over aggressive value.
The criteria of the AMCC SDRAM Controller DDR autocalibration
U-Boot code is to pick the largest passing write/read/compare
window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample
Cycle Select value.
On some Kilauea boards the DDR autocalibration algorithm can
find a large passing write/read/compare window with a small
SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select
value "T1 Sample".
This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of
"T1 Sample" proves to be to aggressive when later on U-Boot
relocates into DDR memory and executes.
The memory traces on the Kilauea board are short so on some
Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select
value of "T1 Sample" shows up as a potentially valid value for
the DDR autocalibratiion algorithm.
The fix is to define a weak default function which provides
the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value
to accept for DDR autocalibration. The default will be the
"T2 Sample" value. A board developer who has a well defined
board and chooses to be more aggressive can always provide
their own board specific string function with the more
aggressive "T1 Sample" value or stick with the default
minimum SDRAM_RDCC.[RDSS] value of "T2".
Also put in a autocalibration loop fix for case where current
write/read/compare passing window size is the same as a prior
window size, then in this case choose the write/read/compare
result that has the associated smallest RDCC T-Sample value.
Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
Heiko Schocher [Tue, 10 Feb 2009 08:31:47 +0000 (09:31 +0100)]
8xx serial, smc: add configurable SMC Rx buffer len
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN.
With this option it is possible to allow the receive
buffer for the SMC on 8xx to be greater then 1. In case
CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the
old version.
When defining CONFIG_SYS_SMC_RXBUFLEN also
CONFIG_SYS_MAXIDLE must be defined to setup the maximum
idle timeout for the SMC.
Mike Frysinger [Fri, 6 Feb 2009 02:04:36 +0000 (21:04 -0500)]
common/{hush, kgdb, serial}.c: build by COBJS-$(...) in Makefile
Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into
the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb
code in the process.
Jerry Van Baren [Fri, 6 Feb 2009 03:18:02 +0000 (22:18 -0500)]
Fix whitespace damage: double space changed to a tab
At some point an intentional double space at the end of the sentence
got changed into a tab in the GPL header line:
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
This patch fixes the damage.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Heiko Schocher [Tue, 10 Feb 2009 08:53:29 +0000 (09:53 +0100)]
cfi: make flash_get_info() non static
If on your board is more than one flash, you must know
the size of every single flash, for example, for updating
the DTS before booting Linux. So make this function
flash_get_info() extern, and you can have all info
about your flashes.
Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Andy Fleming [Wed, 4 Feb 2009 00:26:41 +0000 (18:26 -0600)]
tsec: Fix a bug in soft-resetting
SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30
clock cycles, so it's been mostly working. But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles). This
enforces a 2 microsecond gap between assertion and deassertion.
Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Heiko Schocher [Fri, 30 Jan 2009 11:55:38 +0000 (12:55 +0100)]
82xx serial, smc: add configurable SMC Rx buffer len
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN.
With this option it is possible to allow the receive
buffer for the SMC on 82xx to be greater then 1. In case
CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the
old version.
When defining CONFIG_SYS_SMC_RXBUFLEN also
CONFIG_SYS_MAXIDLE must be defined to setup the maximum
idle timeout for the SMC.
Kumar Gala [Fri, 6 Feb 2009 14:08:06 +0000 (08:08 -0600)]
ppc: Fix roll over bug in flush_cache()
If we call flush_cache(0xfffff000, 0x1000) it would never
terminate the loop since end = 0xffffffff and we'd roll over
our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Wed, 4 Feb 2009 00:10:56 +0000 (18:10 -0600)]
mpc8641hpcn: Change PCI MEM pci bus address
Now that the rest of u-boot can support it, change the PCI bus
address of the PCI MEM regions from 0x80000000 to 0xc0000000,
and use the same bus address for both PCI1 and PCI2. This will
maximize the amount of PCI address space left over to map RAM
on systems with large amounts of memory.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Becky Bruce [Wed, 4 Feb 2009 00:10:53 +0000 (18:10 -0600)]
mpc8641hpcn: Clean up PCI mapping concepts
Clean up PCI mapping concepts in the 8641 config - rename _BASE
to _BUS, as it's actually a PCI bus address, separate virtual
and physical addresses into _VIRT and _PHYS, and use each
appopriately.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Becky Bruce [Wed, 4 Feb 2009 00:10:51 +0000 (18:10 -0600)]
powerpc: Move duplicated BAT defines to mmu.h
The BAT fields are architected; there's no need for these to be in
cpu-specific files. Drop the duplication and move these to
include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only
used by the alaska board, and switch to using the BATU_BL_xxx defines
used by all the other boards. The BL_ defines previously in use
had to be shifted into the proper position for use, which was inefficient.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Becky Bruce [Wed, 4 Feb 2009 00:10:50 +0000 (18:10 -0600)]
drivers/pci: Create pci_map_bar function
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses. pci_map_bar()
is created to return the virtual address for a pci region.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Becky Bruce [Wed, 4 Feb 2009 00:10:49 +0000 (18:10 -0600)]
mpc8641hpcn: Set up outbound pci windows before inbound
Because the inbound pci windows are mapped generously, set up
the more specific outbound windows first. This way, when we
search the pci regions for something, we will hit on the more
specific region. This can actually be a problem on systems
with large amounts of RAM.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Peter Tyser [Wed, 4 Feb 2009 19:39:40 +0000 (13:39 -0600)]
NAND: Silence warning when CONFIG_SYS_NAND_QUIET_TEST
Commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b removed support
for disabling the "No NAND device found!!!" warning when
CONFIG_SYS_NAND_QUIET_TEST was defined. This re-adds support
for silencing the warning.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Coldfire: mcfmii: Allow non-autonegotiating PHYs to use mii command
Modified mii_init to support boards with PHYs that are not set to
autonegotiate, but still want to use u-boot's mii commands to probe
the smi bus. Such PHYs will not set the Autonegotiate-done bit.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Cleanup for M5271EVB:
Added clarification on the use of CONFIG_SYS_CLOCK.
Modified to use u-boot's HUSH parser.
Cleanup on environment settings.
Removed compiler warning by defining CONFIG_SYS_CS0_*
Dependencies:
Added the use of CONFIG_SYS_MCF_SYNCR for clock multiplier.
This depends on a patch to include/asm-m68k/m5271.h
that defines the multiplier and divider ratios.
Removed the definition of CONFIG_SYS_FECI2C.
This depends on a patch that removes the use of it in
cpu/mcf52x2/cpu_init.c
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Coldfire: Fix half-baud UART by adding M5271 to Coldfire v2 core list
Added the CONFIG_M5271 to the list of Coldfire V2 processor. This
was causing the bus clock (not CPU clock) to be declared twice as
fast as it actually is. This causes UARTS to operate at half the
specified baudrate.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Dirk Eibach [Tue, 3 Feb 2009 14:15:21 +0000 (15:15 +0100)]
ppc4xx: Make PCIE support selectable
On some platforms PCIE support is not required, but would be included
because the cpu supports it. To reduce fooprint it is now configurable
via CONFIG_PCI_DISABLE_PCIE.
Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Tue, 3 Feb 2009 21:13:16 +0000 (22:13 +0100)]
ppc4xx: Only fixup opb attached UARTs
This patch updates the fdt UART clock fixup code to
only touch CPU internal UARTs on 4xx systems.
Only these UARTs are definitely clocked by gd->uart_clk.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
Mike Frysinger [Wed, 10 Dec 2008 17:33:54 +0000 (12:33 -0500)]
Blackfin: dynamically update UART speed when initializing
Previously, booting over the UART required the baud rate to be known ahead
of time. Using a bit of tricky simple math, we can calculate the new board
rate based on the old divisors.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Mike Frysinger [Sun, 1 Jun 2008 05:29:57 +0000 (01:29 -0400)]
Blackfin: use on-chip syscontrol() rom function when available
Newer Blackfin's have an on-chip rom with a syscontrol() function that needs
to be used to properly program the memory and voltage settings as it will
include (possibly critical) factory tested bias values.
Stefan Roese [Thu, 5 Feb 2009 10:44:52 +0000 (11:44 +0100)]
cfi_flash: Fix typo in cfi_flash.c
Patch "flash/cfi_flash: Use virtual sector start address, not phys"
introduced a small typo and compilation warning for systems with CFI
legacy support (e.g. hcu4). This patch fixes it.
Stefan Roese [Thu, 29 Jan 2009 10:21:38 +0000 (11:21 +0100)]
jedec_flash: Only use manufacturer defines from common flash.h
This patch removes the double defined manufacturer defines from
jedec_flash.c. Since the common defines in flash.h are 32bit
we now need the (16) cast. This patch also removes the compilation
warning (e.g. seen on hcu5):
./MAKEALL hcu5
Configuring for hcu5 board...
jedec_flash.c:219: warning: large integer implicitly truncated to unsigned type
Becky Bruce [Mon, 2 Feb 2009 22:34:51 +0000 (16:34 -0600)]
flash/cfi_flash: Use virtual sector start address, not phys
include/flash.h was commented to say that the address in
flash_info->start was a physical address. However, from u-boot's
point of view, and looking at most flash code, it makes more
sense for this to be a virtual address. So I corrected the
comment to indicate that this was a virtual address.
The only flash driver that was actually treating the address
as physical was the mtd/cfi_flash driver. However, this code
was using it inconsistently as it actually directly dereferenced
the "start" element, while it used map_physmem to get a
virtual address in other places. I changed this driver so
that the code which initializes the info->start field calls
map_physmem to get a virtual address, eliminating the need for
further map_physmem calls. The code is now consistent.
The *only* place a physical address should be used is when defining the
flash banks list that is used to initialize the flash_info struct,
usually found in the board config file.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Stefan Roese <sr@denx.de>
Ralph Kondziella [Mon, 26 Jan 2009 19:34:36 +0000 (12:34 -0700)]
ADS5121 Add PATA support
Original patch from Ralph Kondziella
plus clean up by Wolfgang Denk
plus changes by John Rigby
use ips clock not lpc
port forward to current u-boot release
Signed-off-by: Ralph Kondziella <rk@argos-messtechnik.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: John Rigby <jrigby@freescale.com>
Martha Marx [Mon, 26 Jan 2009 17:45:07 +0000 (10:45 -0700)]
ADS5121 Add IC Ident Module (IIM) support
IIM (IC Identification Module) is the fusebox for the mpc5121.
Use #define CONFIG_IIM to turn on the clock for this module
use #define CONFIG_CMD_FUSE to add fusebox commands.
Fusebox commands include the ability to read
the status, read the register cache, override the register cache,
program the fuses and sense them.
Signed-off-by: Martha Marx <mmarx@silicontkx.com> Signed-off-by: John Rigby <jrigby@freescale.com>
Mike Frysinger [Wed, 5 Nov 2008 13:50:23 +0000 (08:50 -0500)]
Blackfin: only flag L1 instruction for DMA memcpy
The performance difference from doing an 8 bit DMA memcpy vs an optimized
core memcpy can be pretty big when you add in the overhead of setting up the
MDMA registers, cache flushes, etc... So only use dma_memcpy() when we
actually require it.
Mike Frysinger [Wed, 5 Nov 2008 12:20:37 +0000 (07:20 -0500)]
Blackfin: dma_memcpy(): fix random failures
We have to make sure the DMA channel is actually disabled in hardware before
attempting to reprogram it. Otherwise the new settings are ignored and we
end up with random hangs/failures.
Mike Frysinger [Sat, 25 Oct 2008 02:48:47 +0000 (22:48 -0400)]
Blackfin: cache core/system clock values
Calculating the clocks requires a bit of calls to gcc math functions, so
cache the values after the first run since they'll most likely never
change once U-Boot is up and running.
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