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7 years agoarm64: mvebu: Add pin control nodes to A8K family DTS files
Konstantin Porotchkin [Thu, 8 Dec 2016 10:22:30 +0000 (12:22 +0200)]
arm64: mvebu: Add pin control nodes to A8K family DTS files

Add pin control nodes to APN806, CP-master, CP-slave and
Armada-7040 and Armada-8040 boards DTS files

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: pinctrl: Add pin control driver for A8K family
Konstantin Porotchkin [Thu, 8 Dec 2016 10:22:29 +0000 (12:22 +0200)]
arm64: mvebu: pinctrl: Add pin control driver for A8K family

Add a DM port of Marvell pin control driver.
The A8K SoC family contains several silicone dies interconnected
in a single package. Every die is normally equipped with its own
pin controller unit.
There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Add bubt command for flash image burn
Konstantin Porotchkin [Thu, 8 Dec 2016 10:22:28 +0000 (12:22 +0200)]
arm64: mvebu: Add bubt command for flash image burn

Add support for mvebu bubt command for flash image
load, check and burn on boot device.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Modify the A8K SPI and I2C config in DTS
Konstantin Porotchkin [Thu, 8 Dec 2016 10:22:27 +0000 (12:22 +0200)]
arm64: mvebu: Modify the A8K SPI and I2C config in DTS

Align the Armada-8040-db and Armada-7040-db SPI and I2C
DTS settings with latest DB settings:
- 8040-db: disable i2c0 and spi0 on AP (MPPs are reserved for SDIO)
- 8040-db: disable cps_i2c0 on CP1
- 8040-db: enable spi1 on CP1 (the new location of the boot flash)
  The spi1 on CP1 is aliased as spi0 since this is the way
  the driver enumerates it.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoRevert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze"
Tom Rini [Fri, 9 Dec 2016 12:56:54 +0000 (07:56 -0500)]
Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze"

This reverts commit 3edc0c252257e4afed163a3a74aba24a5509b198, reversing
changes made to bb135a0180c31fbd7456021fb9700b49bba7f533.

7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Fri, 9 Dec 2016 12:10:39 +0000 (07:10 -0500)]
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

7 years agonet/phy/vitesse: Rework RGMII skew configuration for VSC8601
Alex [Tue, 22 Nov 2016 18:55:13 +0000 (10:55 -0800)]
net/phy/vitesse: Rework RGMII skew configuration for VSC8601

The VSC8601 config tried to add an RGMII skew based on #defines that
no config defines. That's quite an ugly way to do it. Since the skew
is only needed on RGMII interfaces, check the interface mode at
runtime, and apply the settings accordingly.

Tested on custom board with AM3352 SOC and VSC801 PHY.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: usb: r8152: Use ALLOC_CACHE_ALIGN_BUFFER() to allocate the buffers
Stefan Roese [Tue, 22 Nov 2016 15:14:23 +0000 (16:14 +0100)]
net: usb: r8152: Use ALLOC_CACHE_ALIGN_BUFFER() to allocate the buffers

Testing on theadorable (Armada XP) has shown, that using this driver
results in many cache misaligned warning, such as:

CACHE: Misaligned operation at range [7fabd8fc7fabd900]

This patch now uses the ALLOC_CACHE_ALIGN_BUFFER() macro to allocate the
buffers on a cache aligned boundary. This fixes all warnings seen on the
Armada XP platform.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ted Chen <tedchen@realtek.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: fman: fix 2.5G SGMII settings
shaohui xie [Tue, 15 Nov 2016 06:36:47 +0000 (14:36 +0800)]
net: fman: fix 2.5G SGMII settings

The settings for 2.5G SGMII are wrong, which the 2.5G case is missed in
set_if_mode(), and the serdes PCS configuration are wrong, this patch uses
the correct settings took from Linux.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: phy: realtek: Only force master mode on rtl8211b/c
oliver@schinagl.nl [Tue, 8 Nov 2016 16:38:59 +0000 (17:38 +0100)]
net: phy: realtek: Only force master mode on rtl8211b/c

Commit 525d187af ("net: phy: Optionally force master mode for RTL PHY")
added the define to force the PHY into master mode. Unfortunatly this is
an all or nothing switch. So it applies to either all PHY's or no PHY's.

The bug that define tried to solve was a buggy PLL in the RTL8211C only.

The Olimex OLinuXino Lime2 has gotten an upgrade where the PHY was
replaced with an RTL8211E. With this define however, both lime2 boards
are either forced to master mode or not. We could of course have a
binary for each board, but the following patch fixes this by adding a
'quirk' to the flags to the rtl8211b and rtl8211c only. It is now
possible to force master mode, but only have it apply to the rtl8211b
and rtl8211c.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: phy: realtek: make define more consistent
oliver@schinagl.nl [Tue, 8 Nov 2016 16:38:58 +0000 (17:38 +0100)]
net: phy: realtek: make define more consistent

All internal defines in the realtek phy are with a small X,
except MIIM_RTL8211X_CTRL1000T_MASTER. Make this more consistent

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: phy: realtek: Use the BIT() macro
oliver@schinagl.nl [Tue, 8 Nov 2016 16:38:57 +0000 (17:38 +0100)]
net: phy: realtek: Use the BIT() macro

The BIT macro is the preferred method to set bits.
This patch adds the bit macro and converts bit invocations.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: phy: micrel: Fix error handling
Marek Vasut [Mon, 14 Nov 2016 14:08:42 +0000 (15:08 +0100)]
net: phy: micrel: Fix error handling

Fix the following error, the $ret variable handling must
be part of the loop, while due to the missing parenthesis
it was not.

drivers/net/phy/micrel.c: In function ‘ksz9021_of_config’:
drivers/net/phy/micrel.c:303:2: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation]
  for (i = 0; i < ARRAY_SIZE(ofcfg); i++)
  ^~~
drivers/net/phy/micrel.c:305:3: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’
   if (ret)
   ^~
drivers/net/phy/micrel.c: In function ‘ksz9031_of_config’:
drivers/net/phy/micrel.c:411:2: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation]
  for (i = 0; i < ARRAY_SIZE(ofcfg); i++)
  ^~~
drivers/net/phy/micrel.c:413:3: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’
   if (ret)
   ^~

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: xilinx: Use mdio_register_seq() to support multiple instances
Michal Simek [Thu, 8 Dec 2016 09:25:44 +0000 (10:25 +0100)]
net: xilinx: Use mdio_register_seq() to support multiple instances

axi_emac, emaclite and gem have the same issue with registering
multiple instances with mdio busses. mdio bus name has to be uniq but
drivers are setting up only one name for all.
Use mdio_register_seq() and pass dev->seq number to allow multiple
mdio instances registration.

Reported-by: Phani Kiran Kara <phanikiran.kara@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: u-boot
Series-cc: Phani Kiran Kara <phanikiran.kara@gmail.com>

7 years agocommon: miiphyutil: Add helper function for mdio bus name
Michal Simek [Thu, 8 Dec 2016 09:06:26 +0000 (10:06 +0100)]
common: miiphyutil: Add helper function for mdio bus name

The most of ethernet drivers are using this mdio registration sequence.
strcpy(priv->bus->name, "emac");
mdio_register(priv->bus);
Where driver can be used only with one MDIO bus because only unique
name should be used.

Other drivers are using unique device name for MDIO registration to
support multiple instances.
snprintf(priv->bus->name, sizeof(bus->name), "%s", name);

With DM dev->seq is used more even in logs
(like random MAC address generation:
printf("\nWarning: %s (eth%d) using random MAC address - %pM\n",
       dev->name, dev->seq, pdata->enetaddr);
)
where eth%d prefix is used.

Simplify driver code to register mdio device with dev->seq number
to simplify mdio registration and reduce code duplication across
all drivers. With DM_SEQ_ALIAS enabled dev->seq reflects alias setting.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
For example:

Board: Xilinx Zynq
Net:   ZYNQ GEM: e000b000, phyaddr 7, interface rgmii-id

Warning: ethernet@e000b000 (eth0) using random MAC address -
7a:fc:90:53:6a:41
eth0: ethernet@e000b000ZYNQ GEM: e000c000, phyaddr ffffffff, interface
rgmii-id

Warning: ethernet@e000c000 (eth3) using random MAC address -
1a:ff:d7:1a:a1:b2
, eth3: ethernet@e000c000
** Bad device size - mmc 0 **
Checking if uenvcmd is set ...
Hit any key to stop autoboot:  0
Zynq> mdio list
eth0:
17 - Marvell 88E1111S <--> ethernet@e000b000
eth3:
17 - Marvell 88E1111S <--> ethernet@e000c000
Zynq>

7 years agoARM64: zynqmp: Add updated psu_init_gpl* files
Michal Simek [Wed, 30 Nov 2016 10:09:56 +0000 (11:09 +0100)]
ARM64: zynqmp: Add updated psu_init_gpl* files

With origin files there was an issue with serdes setting for SCSI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agozynqmp works
Michal Simek [Tue, 6 Dec 2016 15:31:53 +0000 (16:31 +0100)]
zynqmp works

7 years agoARM: zynq: Replace dram_init* functions with board_init_f safe ones
Nathan Rossi [Sun, 4 Dec 2016 09:33:22 +0000 (19:33 +1000)]
ARM: zynq: Replace dram_init* functions with board_init_f safe ones

The dram_init* functions for the zynq board are not safe for use from
the board_init_f stage due to its use of the 'tmp' static variable.

This incorrect use of a static variable was causing rare issues where
the dram_init function would overwrite some parts the __rel_dyn section
which caused obscure failures.

Using the zynq_zybo configuration, U-Boot would generate the following
error during image load. This was caused due to dram_init overwriting
the relocations for the "image" variable within the do_bootm function.
Out of coincidence the un-initialized memory has a compression type
which is the same as the value for the relocation type R_ARM_RELATIVE.

   Uncompressing Invalid Image ... Unimplemented compression type 23

It should be noted that this is just one way the issue could surface,
other cases my not be observed in normal boot flow.

This change removes the existing code and copies the implementation of
the dram_init and dram_init_banksize from the
arch/arm/mach-uniphier/dram_init.c source. This version of these
functions does not use static variables and behaves the same (reading
banks from fdt, and using the first bank as the ram_size).

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Fixes: 758f29d0f8 ("ARM: zynq: Support systems with more memory banks")
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agotravis-ci: Add zynq_zc702 target support
Michal Simek [Wed, 23 Nov 2016 09:56:00 +0000 (10:56 +0100)]
travis-ci: Add zynq_zc702 target support

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use embded option because of qemu

Use my repo till Stephen merge it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agotools: mkimage: Use fstat instead of stat to avoid malicious hacks
Michal Simek [Tue, 6 Dec 2016 15:38:13 +0000 (16:38 +0100)]
tools: mkimage: Use fstat instead of stat to avoid malicious hacks

The patch is fixing:
"tools: mkimage: Check if file is regular file"
(sha1: 56c7e8015509312240b1ee15f2ff74510939a45d)
which contains two issues reported by Coverity
Unchecked return value from stat and incorrect calling sequence where
attack can happen between calling stat and fopen.
Using pair in opposite order (fopen and fstat) is fixing this issue
because fstat is using the same file descriptor (FILE *).

Also fixing issue with:
"tools: mkimage: Add support for initialization table for Zynq and
ZynqMP" (sha1: 3b6460809c2a28360029c1c48247648fac4455c9)
where file wasn't checked that it is regular file.

Reported-by: Coverity (CID: 154711, 154712)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Series-to: trini
Series-cc: u-boot

7 years agoblock: Move ceva driver to DM
Michal Simek [Thu, 8 Sep 2016 13:06:22 +0000 (15:06 +0200)]
block: Move ceva driver to DM

This patch also includes ARM64 zynqmp changes:
- Remove platform non DM initialization
- Remove hardcoded sata base address

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Series-to: sjg, agraf@suse.de
Series-cc: uboot
Series-version: 4
Series-changes: 2
- make ceva_init_sata static
- Move SATA_CEVA to defconfig
- Initalized max_lun and max_id platdata

Series-changes: 3
- Extend Kconfig help description
- sort dm.h
- Remove SPL undefinition from board file
- Fix Kconfig dependecies

7 years agodm: Add support for scsi/sata based devices
Michal Simek [Thu, 8 Sep 2016 13:06:45 +0000 (15:06 +0200)]
dm: Add support for scsi/sata based devices

All sata based drivers are bind and corresponding block
device is created. Based on this find_scsi_device() is able
to get back block device based on scsi_curr_dev pointer.

intr_scsi() is commented now but it can be replaced by calling
find_scsi_device() and scsi_scan().

scsi_dev_desc[] is commented out but common/scsi.c heavily depends on
it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol
is reassigned to a block description allocated by uclass.
There is only one block description by device now but it doesn't need to
be correct when more devices are present.

scsi_bind() ensures corresponding block device creation.
uclass post_probe (scsi_post_probe()) is doing low level init.

SCSI/SATA DM based drivers requires to have 64bit base address as
the first entry in platform data structure to setup mmio_base.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Series-changes: 2
- Use CONFIG_DM_SCSI instead of mix of DM_SCSI and DM_SATA
  Ceva sata has never used sata commands that's why keep it in
  SCSI part only.
- Separate scsi_scan() for DM_SCSI and do not change cmd/scsi.c
- Extend platdata

Series-changes: 3
- Fix scsi_scan return path
- Fix header location uclass-internal.h
- Add scsi_max_devs under !DM_SCSI
- Add new header device-internal because of device_probe()
- Redesign block device creation algorithm
- Use device_unbind in error path
- Create block device with id and lun numbers (lun was there in v2)
- Cleanup dev_num initialization in block device description
  with fixing parameters in blk_create_devicef
- Create new Kconfig menu for SATA/SCSI drivers
- Extend description for DM_SCSI
- Fix Kconfig dependencies
- Fix kernel doc format in scsi_platdata
- Fix ahci_init_one - vendor variable

Series-changes: 4
- Fix Kconfig entry
- Remove SPL ifdef around SCSI uclass
- Clean ahci_print_info() ifdef logic

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Tue, 6 Dec 2016 13:07:20 +0000 (08:07 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

7 years agousb: xhci-pci: Add DM support
Stefan Roese [Mon, 18 Jul 2016 10:51:39 +0000 (12:51 +0200)]
usb: xhci-pci: Add DM support

This patch adds DM support to the xHCI PCI driver. Enabling its use
e.g. in x86 platforms.

Status: On the congatec BayTrail SoM, xHCI still does not work
correctly with this patch. Some internal timeouts lead to resets (BUG).
Additional work is needed here. I'm posting this version as WIP so that
other developers interested in this support might use it as a start.
I might get back to it in a few weeks as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMAINTAINERS: Fix ALTERA SOCFPGA Files
Jagan Teki [Fri, 25 Nov 2016 17:47:28 +0000 (23:17 +0530)]
MAINTAINERS: Fix ALTERA SOCFPGA Files

Replace arch/arm/cpu/armv7/socfpga/ path with
arch/arm/mach-socfpga/ and removed board file path
since board/altera has different boards with relevant
board maintainers.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>
7 years agoMAINTAINERS: socfpga: update email address for Dinh Nguyen
Dinh Nguyen [Tue, 29 Nov 2016 15:03:13 +0000 (09:03 -0600)]
MAINTAINERS: socfpga: update email address for Dinh Nguyen

With the acquisition of Altera by Intel, my Altera email may be going
away soon. Update the contact to a more reliable address.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
7 years agoqts-filter.sh: strip DOS line endings and handle continuation lines
Bill Randle [Sat, 19 Nov 2016 04:23:33 +0000 (20:23 -0800)]
qts-filter.sh: strip DOS line endings and handle continuation lines

Some Altera Quartus generated files have long lines that are split with a '\' at
the end of the line. It also wOn Windows, rites files in DOS format, which can
confuse some of the processing scripts in this file. This patch solves both issues.

Signed-off-by: Bill Randle <bill.randle@gmail.com>
Cc: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: Add boot0 hook to prevent SPL corruption
Marek Vasut [Wed, 16 Nov 2016 16:20:23 +0000 (17:20 +0100)]
ARM: socfpga: Add boot0 hook to prevent SPL corruption

Valid Altera SoCFPGA preloader image must contain special data at
offsets 0x40, 0x44, 0x48 and valid instructions at address 0x4c or
0x50. These addresses are by default used by U-Boot's vector table
and a piece of reset handler, thus a valid preloader corrupts those
addresses slightly. While this works most of the time, this can and
does prevent the board from rebooting sometimes and triggering this
issue may even depend on compiler.

The problem is that when SoCFPGA performs warm reset, it checks the
addresses 0x40..0x4b in SRAM for a valid preloader signature and
header checksum. If those are found, it jumps to address 0x4c or
0x50 (this is unclear). These addresses are populated by the first
few instructions of arch/arm/cpu/armv7/start.S:

ffff0040 <data_abort>:
ffff0040:       ebfffffe        bl      ffff0040 <data_abort>

ffff0044 <reset>:
ffff0044:       ea000012        b       ffff0094 <save_boot_params>

ffff0048 <save_boot_params_ret>:
ffff0048:       e10f0000        mrs     r0, CPSR
ffff004c:       e200101f        and     r1, r0, #31
ffff0050:       e331001a        teq     r1, #26

Without this patch, the CPU will enter the code at 0xffff004c or
0xffff0050 , at which point the value of r0 and r1 registers is
undefined. Moreover, jumping directly to the preloader entry point
at address 0xffff0000 will also fail, because address 0xffff004.
is invalid and contains the preloader magic.

Add BOOT0 hook which reserves the area at offset 0x40..0x5f and
populates offset 0x50 with jump to the entry point. This way, the
preloader signature is stored in reserved space and can not corrupt
the SPL code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Stefan Roese <sr@denx.de>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
7 years agosocfpga: add support for Terasic DE1-SoC board
Anatolij Gustschin [Mon, 14 Nov 2016 15:07:10 +0000 (16:07 +0100)]
socfpga: add support for Terasic DE1-SoC board

Add CycloneV based Terasic DE1-SoC board. The board boots
from SD/MMC. Ethernet and USB host is supported.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Marek Vasut <marex@denx.de>
7 years agoPrepare v2017.01-rc1 v2017.01-rc1
Tom Rini [Mon, 5 Dec 2016 23:36:23 +0000 (18:36 -0500)]
Prepare v2017.01-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Mon, 5 Dec 2016 22:00:23 +0000 (17:00 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

7 years agoarmv8: QSPI: Add AHB bus 16MB+ size support
Yuan Yao [Thu, 1 Dec 2016 02:13:52 +0000 (10:13 +0800)]
armv8: QSPI: Add AHB bus 16MB+ size support

The default configuration for QSPI AHB bus can't support 16MB+.
But some flash on NXP layerscape board are more than 16MB.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl/usb: enable the errata-a005697 for ls1012a
jerry.huang@nxp.com [Thu, 1 Dec 2016 03:44:25 +0000 (11:44 +0800)]
fsl/usb: enable the errata-a005697 for ls1012a

Enable the errata-a005697 for ls1012a

Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agols1021a: QSPI: update the node for QSPI support
Yuan Yao [Wed, 30 Nov 2016 03:26:20 +0000 (11:26 +0800)]
ls1021a: QSPI: update the node for QSPI support

Add the name for register space and memory space.
<0x1550000 0x10000 > is the QSPI register space.
<0x40000000 0x4000000> is the QSPI memory space.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: Add serdes1 protocol 0x3b support
Priyanka Jain [Tue, 29 Nov 2016 11:15:05 +0000 (16:45 +0530)]
armv8: ls2080a: Add serdes1 protocol 0x3b support

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
Shengzhou Liu [Mon, 21 Nov 2016 03:36:48 +0000 (11:36 +0800)]
fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum

- add additional function erratum_a009942_check_cpo to check if the
  board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
  fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
[YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500]
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl/ddr: Fix compiling warning
Shengzhou Liu [Mon, 21 Nov 2016 03:36:47 +0000 (11:36 +0800)]
fsl/ddr: Fix compiling warning

Fix following warning in case multiple erratum macro was not defined.
warning: unused variable 'tmp'
warning: unused variable 'ddr_freq'

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agotravis-ci: Build mvebu boards (arm & aarch64) in separate job
Stefan Roese [Thu, 1 Dec 2016 12:52:08 +0000 (13:52 +0100)]
travis-ci: Build mvebu boards (arm & aarch64) in separate job

Its easier to watch the output of the build process when the platforms
specific boards are grouped in a separate job. This patch adds a job
for all mvebu boards (arm and aarch64).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: increase PLL0 frequency
Bartosz Golaszewski [Thu, 1 Dec 2016 11:07:43 +0000 (12:07 +0100)]
davinci: omapl138_lcdk: increase PLL0 frequency

The LCDC controller on the lcdk board has high memory throughput
requirements. Even with the kernel-side tweaks to master peripheral
and peripheral bus burst priorities, the default PLL0 frquency of
300 MHz is not enough to service the LCD controller and causes
DMA FIFO underflows.

Increment the PLL0 multiplier to 37, resulting in PLL0 frequency of
456 MHz - the same value that downstream reference u-boot from Texas
Instruments uses.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarm: baltos: enable booting from USB
Yegor Yefremov [Thu, 1 Dec 2016 11:52:18 +0000 (12:52 +0100)]
arm: baltos: enable booting from USB

First of all U-Boot would search for a USB mass storage device
with either uEnv.txt or kernel-fit.itb and boot.

If USB mass storage device is not available or doesn't provide
these files then MMC will be tried.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarm: baltos: active mPCIe slot
Yegor Yefremov [Thu, 1 Dec 2016 11:52:17 +0000 (12:52 +0100)]
arm: baltos: active mPCIe slot

Baltos devices provide a mPCIe slot, whose power is turned off by
default. This patch activates mPCIe slot in U-Boot, so that for example
GSM modem can be already available in user space.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarm: baltos: remove TI board leftover
Yegor Yefremov [Thu, 1 Dec 2016 11:52:16 +0000 (12:52 +0100)]
arm: baltos: remove TI board leftover

Remove unneeded pinmux configurations and TI EEPROM struct.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: DRA7: AMxx: Make sure that the SPL always reads the configuration EEPROM
Jean-Jacques Hiblot [Thu, 1 Dec 2016 09:37:03 +0000 (10:37 +0100)]
ARM: DRA7: AMxx: Make sure that the SPL always reads the configuration EEPROM

The bootrom may corrupt the area of SRAM used to store the ti_common_eeprom
structure. This patch makes sure that it's always read after a reset, even
if a valid MAGIC number is found in the SRAM.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodm: spl: mmc: Fix EXT SPL support
Michal Simek [Thu, 1 Dec 2016 10:09:01 +0000 (11:09 +0100)]
dm: spl: mmc: Fix EXT SPL support

The patch
"dm: spl: mmc: Support CONFIG_BLK in SPL MMC"
(sha1: 87bce4e5c0b55452d70830928b2d7b98fa24d4e3)
converted FAT part of spl_mmc_do_fs_boot() but forget to update also EXT
part by 's/&mmc->block_dev/mmc_get_blk_desc(mmc)/'.
This patch is fixing compilation error when CONFIG_SPL_EXT_SUPPORT
is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://www.denx.de/git/u-boot-i2c
Tom Rini [Mon, 5 Dec 2016 16:02:01 +0000 (11:02 -0500)]
Merge git://www.denx.de/git/u-boot-i2c

7 years agosata: sata_mv: Fix misaligned cache warnings
Stefan Roese [Fri, 18 Nov 2016 16:21:51 +0000 (17:21 +0100)]
sata: sata_mv: Fix misaligned cache warnings

This patch fixes the warnings about misaligned cache on Armada XP:

CACHE: Misaligned operation at range [7facb4007facb460]

Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Restrict memory size to a usable maximum
Stefan Roese [Fri, 11 Nov 2016 07:18:44 +0000 (08:18 +0100)]
arm64: mvebu: Restrict memory size to a usable maximum

Not all memory is mapped in the MMU. So we need to restrict the memory
size so that U-Boot does not try to access it. Also, the internal
registers are located at 0xf000.0000 - 0xffff.ffff. Currently only 2GiB
are mapped for system memory. This is what we pass to the U-Boot
subsystem here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add PCI support to DB-88F8040 board
Stefan Roese [Thu, 27 Oct 2016 11:36:45 +0000 (13:36 +0200)]
arm64: mvebu: Add PCI support to DB-88F8040 board

This patch adds PCI support to the Marvell Armada-8K devel board.
Additionally the Intel E1000 ethernet driver is enabled so that
network support is available on this board, even without the
internal network interfaces being supported (yet).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add regions for PCI spaces to the memory map
Stefan Roese [Thu, 27 Oct 2016 11:34:03 +0000 (13:34 +0200)]
arm64: mvebu: Add regions for PCI spaces to the memory map

To use the PCIe driver, its controller memory and the PCIe regions need
to get mapped in the MMU. Otherwise these areas can't be accessed.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agopci: mvebu: Add PCIe driver for Armada-8K
Shadi Ammouri [Thu, 27 Oct 2016 11:29:41 +0000 (13:29 +0200)]
pci: mvebu: Add PCIe driver for Armada-8K

This patch adds a driver for the PCIe controller integrated in the
Marvell Armada-8K SoC. This controller is based on the DesignWare
IP core.

The original version was written by Shadi and Yehuda. I ported this
driver to the latest mainline U-Boot version with DM support.

Tested on the Marvell DB-88F8040 Armada-8K eval board.

Signed-off-by: Shadi Ammouri <shadi@marvell.com>
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agodrivers/phy: marvell: Add support for the slave CP COMPHY device
Stefan Roese [Tue, 25 Oct 2016 16:16:25 +0000 (18:16 +0200)]
drivers/phy: marvell: Add support for the slave CP COMPHY device

With the support for the Armada 8k, a 2nd COMPHY controller now needs
to get supported from the CP110 slave controller. This patch adds support
for this 2nd contoller in the COMPHY driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Init COMPHY from the slave-CP on the A8k
Stefan Roese [Tue, 25 Oct 2016 16:12:40 +0000 (18:12 +0200)]
arm64: mvebu: Init COMPHY from the slave-CP on the A8k

The Armada8k implements 2 CPs (communication processors) and the 2nd
CP also is equipped with a COMPHY controller. This patch now loops
over all enabled MISC devices (CP110) enabled in the DT to initialize
all CPs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-8040-db.dts: Add I2C and SPI aliases
Stefan Roese [Tue, 25 Oct 2016 16:11:44 +0000 (18:11 +0200)]
arm64: mvebu: armada-8040-db.dts: Add I2C and SPI aliases

Add I2C and SPI aliases to enable usage in U-Boot. Otherwise U-Boot will
not be able to use the SPI NOR chip for environment storage and use
"i2c dev 0" to select this I2C bus.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-8040-db.dts: Add COMPHY configuration
Stefan Roese [Tue, 25 Oct 2016 15:43:25 +0000 (17:43 +0200)]
arm64: mvebu: armada-8040-db.dts: Add COMPHY configuration

This patch adds the COMPHY device tree configuration to the DT file for
the Marvell DB-88F8040 devel board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-cp110-slave.dtsi: Add COMPHY / UTMI device tree nodes
Stefan Roese [Tue, 25 Oct 2016 15:41:12 +0000 (17:41 +0200)]
arm64: mvebu: armada-cp110-slave.dtsi: Add COMPHY / UTMI device tree nodes

This patch adds the COMPHY and UTMI device tree nodes to the cp110-slave
dtsi file for the Armada 8K.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-cp110-master.dtsi: Rename comphy DT node names
Stefan Roese [Tue, 25 Oct 2016 15:35:55 +0000 (17:35 +0200)]
arm64: mvebu: armada-cp110-master.dtsi: Rename comphy DT node names

Since the cp110 slave also has comphy DT nodes, the names need to be
renamed to avoid a name clash. Lets use the common naming scheme:
"cpm_xxx" for master and "cps_xxx" for slave.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add support for the DB-88F8040 Armada 8k devel board
Stefan Roese [Tue, 25 Oct 2016 09:47:51 +0000 (11:47 +0200)]
arm64: mvebu: Add support for the DB-88F8040 Armada 8k devel board

This patch adds the necessary files to support the Marvell Armada 8k
devel board. Most board specfic files are shared with the Armada 7k
boards under the name "armada-8k*". So only minimal changes are
necessary to add this basic board support (except the DT files of
course).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add slave CP area to the memory map
Stefan Roese [Tue, 25 Oct 2016 16:14:29 +0000 (18:14 +0200)]
arm64: mvebu: Add slave CP area to the memory map

To enable access to the slave CP its memory needs to be added to the
MMU memory map.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: armada-8k: Only configure xHCI power on DB-88F7040 board
Stefan Roese [Tue, 25 Oct 2016 10:41:45 +0000 (12:41 +0200)]
arm64: mvebu: armada-8k: Only configure xHCI power on DB-88F7040 board

This patch uses of_machine_is_compatible() to detect the board at runtime
and only configured the I2C IO expander for the xHCI power / reset on
the DB-88F7040 board. As this code will be used by other Armada-7k/8k
ports, its necessary to use this runtime detection here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Add Armada-80x0 dts/dtsi files
Stefan Roese [Tue, 25 Oct 2016 08:10:32 +0000 (10:10 +0200)]
arm64: mvebu: Add Armada-80x0 dts/dtsi files

Add the latest version of the DT files from the Linux kernel.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agoarm64: mvebu: Rename db-88f7040 files to armada-8k
Stefan Roese [Tue, 25 Oct 2016 08:56:19 +0000 (10:56 +0200)]
arm64: mvebu: Rename db-88f7040 files to armada-8k

This moves some of the Armada DB-88F7040 board specific files to a more
generic name: armada-8k. This is in preparation for the Armada-8k
support which will be added soon. And since both platforms share
most devices, lets also share most source files to not duplicate
the code here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
7 years agodm: Add timeline and guide for porting I2C drivers
Simon Glass [Wed, 23 Nov 2016 13:34:45 +0000 (06:34 -0700)]
dm: Add timeline and guide for porting I2C drivers

Add a README with a brief guide to porting i2c drivers over to use driver
model.

Add a timeline also. All I2C drivers should be converted by the end
of June 2017.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agodm: i2c: Add a note to I2C drivers which need conversion
Simon Glass [Wed, 23 Nov 2016 13:34:44 +0000 (06:34 -0700)]
dm: i2c: Add a note to I2C drivers which need conversion

Maintainers need to be notified more directly of the need to convert these
drivers. Add a note to the top each affected file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agosamsung: i2c: Split the high-speed I2C code into a new driver
Simon Glass [Wed, 23 Nov 2016 13:34:43 +0000 (06:34 -0700)]
samsung: i2c: Split the high-speed I2C code into a new driver

Now that driver model is used for I2C on all boards, we can split the
high-speed code into its own driver. There is virtually no common code,
and this significantly reduces confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agosamsung: i2c: Drop old code from I2C driver
Simon Glass [Wed, 23 Nov 2016 13:34:42 +0000 (06:34 -0700)]
samsung: i2c: Drop old code from I2C driver

Now that all boards use DM_I2C we can drop the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoarm: samsung: Convert s5p_goni and smdkc100 to DM_I2C
Simon Glass [Wed, 23 Nov 2016 13:34:41 +0000 (06:34 -0700)]
arm: samsung: Convert s5p_goni and smdkc100 to DM_I2C

These are the last two samsung boards that don't use DM_I2C. Move them
over, leaving #ifdefs to allow the maintainer to complete this work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoarm: exynos: i2c: Convert exynos boards to use DM_I2C
Simon Glass [Wed, 23 Nov 2016 13:34:40 +0000 (06:34 -0700)]
arm: exynos: i2c: Convert exynos boards to use DM_I2C

Three boards are still not converting to use DM_I2C. They are also using
the old PMIC framework. Rather than removing them, add #ifdefs to allow
them to continue to build. This will give the maintainers a little more
time to decide whether to convert them or not.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Sun, 4 Dec 2016 18:55:15 +0000 (13:55 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx

7 years agodefconfig: am43xx_evm: Enable DM_SPI and DM_SPI_FLASH
Vignesh R [Tue, 22 Nov 2016 09:12:56 +0000 (14:42 +0530)]
defconfig: am43xx_evm: Enable DM_SPI and DM_SPI_FLASH

Commit 4c4e3b37750f3("ARM: AM43xx: Enable FIT") accidentally disabled
DM_SPI and DM_SPI_FLASH. Add back DM_SPI and DM_SPI_FLASH to
am43xx_evm_defconfig in order to make use of DM framework for QSPI.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
7 years agocommon: image: Remove FIT header update from image post-processing
Andrew F. Davis [Mon, 21 Nov 2016 20:37:09 +0000 (14:37 -0600)]
common: image: Remove FIT header update from image post-processing

After an image is selected out of a FIT blob for further processing we
run an optional, platform specific, post-processing function on this
component. This post-processing may modify the position and size of the
image, so after post-processing we update the location and size for this
image in the FIT header. This can cause problems as the position of
subsequent components in the FIT blob are only referenced by relative
position to the end of the last component. When we resize or move a
component the following components position will be calculated
incorrectly. To fix this, we do not update the FIT header but instead
only update our local understanding of the image data. This also allows
us to re-run post-processing steps if needed.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Carlos Hernandez <ceh@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agousb: gadget: remove unused shortname variable
Andre Przywara [Wed, 16 Nov 2016 00:50:16 +0000 (00:50 +0000)]
usb: gadget: remove unused shortname variable

The shortname variable isn't referenced anywhere in the code, so just
remove it.

Pointed out by a GCC 6.2 default warning option.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
7 years agodavinci: da8xxevm: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:12 +0000 (00:50 +0000)]
davinci: da8xxevm: fix indentation

Apparently the indentation is wrong in this case, as the second message
should be printed indepdently of the if statement.

Fix this indentation to avoid both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
7 years agousb: eth: r8152_fw: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:11 +0000 (00:50 +0000)]
usb: eth: r8152_fw: fix indentation

Apparently the indentation is wrong here, fix this to avoid compiler
warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agomarvell: comphy_a3700: fix bitmask
Andre Przywara [Wed, 16 Nov 2016 00:50:10 +0000 (00:50 +0000)]
marvell: comphy_a3700: fix bitmask

Obviously the mask for the rx and tx select field cannot be right,
as it would overlap in one and exceed the 32-bit register in the other
case. From looking at the neighbouring bits it looks like the mask
should be really 4 bits wide instead of 8.

Pointed out by a GCC 6.2 (default) warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agonet: rtl8169: remove unneeded definition
Andre Przywara [Wed, 16 Nov 2016 00:50:09 +0000 (00:50 +0000)]
net: rtl8169: remove unneeded definition

The rtl8169_intr_mask variable isn't used anywhere in the code, so
just remove it to avoid a GCC 6.2 compiler warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: e1000: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:07 +0000 (00:50 +0000)]
net: e1000: fix indentation

Apparently the indentation is off here, for the IGB model just want to
bail out early.
Fix this to avoid both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agomtd: cfi_flash: fix indentation
Andre Przywara [Wed, 16 Nov 2016 00:50:06 +0000 (00:50 +0000)]
mtd: cfi_flash: fix indentation

The indentation is misleading here and suggests that the write command
will be only executed in the else clause.
It seems like this is not intended, so fix the indentation to avoid
both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoserial: Drop the s3c24x0 serial driver
Simon Glass [Wed, 23 Nov 2016 13:01:32 +0000 (06:01 -0700)]
serial: Drop the s3c24x0 serial driver

This is not used by any boards. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Müller <d.mueller@elsoft.ch>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarm: Remove VCMA9 board
Simon Glass [Wed, 23 Nov 2016 13:01:31 +0000 (06:01 -0700)]
arm: Remove VCMA9 board

This board has not been converted to DM_SERIAL by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Müller <d.mueller@elsoft.ch>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agoarm: Remove smdk2410 board
Simon Glass [Wed, 23 Nov 2016 13:01:30 +0000 (06:01 -0700)]
arm: Remove smdk2410 board

This board has not been converted to DM_SERIAL by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Müller <d.mueller@elsoft.ch>
7 years agoserial: Update docs to indicate mcfuart supports DM_SERIAL
Simon Glass [Wed, 23 Nov 2016 13:01:29 +0000 (06:01 -0700)]
serial: Update docs to indicate mcfuart supports DM_SERIAL

This driver was converted so we should remove it from the list.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopost: cosmetic: fix typo
Niko Mauno [Wed, 23 Nov 2016 12:52:32 +0000 (14:52 +0200)]
post: cosmetic: fix typo

Change 'date' to 'data'.

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
7 years agoCosmetic api: api_storage.c Spelling correction
Walt Feasel [Wed, 23 Nov 2016 06:26:14 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Spelling correction

Make spelling correction for 'from'

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Comment style
Walt Feasel [Wed, 23 Nov 2016 06:26:13 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Comment style

Make comment style modifications

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Line over 80 char
Walt Feasel [Wed, 23 Nov 2016 06:26:12 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Line over 80 char

Make checkpatch style modification for
WARNING: line over 80 characters

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Blank line after {
Walt Feasel [Wed, 23 Nov 2016 06:26:11 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Blank line after {

Make checkpatch style modification for
CHECK: Blank lines aren't necessary after
an open brace '{'

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoCosmetic api: api_storage.c Align parenthesis
Walt Feasel [Wed, 23 Nov 2016 06:26:10 +0000 (01:26 -0500)]
Cosmetic api: api_storage.c Align parenthesis

Make checkpatch style modification for
CHECK: Alignment should match open parenthesis

Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
7 years agoti_armv7_common: env: Increase IO buffer size
Lokesh Vutla [Fri, 25 Nov 2016 05:44:26 +0000 (11:14 +0530)]
ti_armv7_common: env: Increase IO buffer size

There are certain environment variables whose length is greater than
the defined IO buffer size. So, increase the IO buffer size to print the
entire variables.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: dts: AM571x-IDK Initial Support
Schuyler Patton [Fri, 25 Nov 2016 05:44:25 +0000 (11:14 +0530)]
ARM: dts: AM571x-IDK Initial Support

Add initial DTS support for AM571-IDK evm.

Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Add support for the am571x idk
Steve Kipisz [Fri, 25 Nov 2016 05:44:24 +0000 (11:14 +0530)]
board: ti: am57xx: Add support for the am571x idk

The AM571x Industrial Development Kit (IDK) is a board based on TI's
AM571x SoC which has a single core 1.5GHz Cortex-A15processor. This
board is a development platform for the Industrial Market with:

- 1GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI
- PRU-ICSS
- uSD
- 16GB eMMC
- CAN
- RS-485
- PCIe
- USB3.0
- Video Input Port
- Industrial IO port and expansion connector

The PRU/ICSS will be supported by 3rd party software for EtherCat,
Profibus, and other Industrial protocols.

The link to the data sheet and TRM can be found here:
http://www.ti.com/product/AM5718

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am572x-idk: Update pinmux using latest PMT
Lokesh Vutla [Fri, 25 Nov 2016 05:44:23 +0000 (11:14 +0530)]
board: ti: am572x-idk: Update pinmux using latest PMT

Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
board files named am572x_idk_v1p3b_sr2p0 that were autogenerated on
20th October, 2016 by "Steve Kipisz <s-kipisz2@ti.com>" and
"Tom Johnson <thjohnson@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am572x: Add pinmux for X15/GPEVM SR2.0 using latest PMT
Nishanth Menon [Fri, 25 Nov 2016 05:44:22 +0000 (11:14 +0530)]
board: ti: am572x: Add pinmux for X15/GPEVM SR2.0 using latest PMT

Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
board files named am572x_gp_evm_A3a_sr2p0 that were autogenerated on
19th October, 2016 by "Ahmad Rashed<a-rashed@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Update SR1.1 RGMII0 iodelay timings for x15/GPEVM
Nishanth Menon [Fri, 25 Nov 2016 05:44:21 +0000 (11:14 +0530)]
board: ti: am57xx: Update SR1.1 RGMII0 iodelay timings for x15/GPEVM

Update the timing for RGMII0 interface based on
PCT_DRA75x_DRA74x_SR1.1_v1.3.10 version (Jan 2016). This update
is for SR1.1

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Add support for detection of X15 revb1
Lokesh Vutla [Fri, 25 Nov 2016 05:44:20 +0000 (11:14 +0530)]
board: ti: am57xx: Add support for detection of X15 revb1

BeagleBoard-X15 Rev B1 with SR1.1 platform have incompatible changes for HDMI
GPIO requiring new dtb support. This implies we have to properly identify
the platform now as well. Hence provide a different board name for the
Rev B1 variants.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx: Add support for detection of reva3 variations for GPEVM
Nishanth Menon [Fri, 25 Nov 2016 05:44:19 +0000 (11:14 +0530)]
board: ti: am57xx: Add support for detection of reva3 variations for GPEVM

AM57xx evm Rev A3 with SR2.0 platform have incompatible changes for HDMI
GPIO requiring new dtb support. This implies we have to properly identify
the platform now as well. Hence provide a different board name for the
Rev A3 variations.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: dts: am57xx: sync DT with latest Linux
Lokesh Vutla [Fri, 25 Nov 2016 05:44:18 +0000 (11:14 +0530)]
ARM: dts: am57xx: sync DT with latest Linux

Sync all am57xx based dts files with latest Linux

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: dra7xx: Enable lp873x options
Keerthy [Wed, 23 Nov 2016 07:55:34 +0000 (13:25 +0530)]
configs: dra7xx: Enable lp873x options

DRA71-evm uses LP873x regulator. Enable lp873x PMIC config options.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: dra7xx: Enable pmic/regulator options
Lokesh Vutla [Wed, 23 Nov 2016 07:55:33 +0000 (13:25 +0530)]
configs: dra7xx: Enable pmic/regulator options

Enable pmic/regulator config options.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: dra7xx: hs: Enable DM_ETH
Lokesh Vutla [Wed, 23 Nov 2016 07:55:32 +0000 (13:25 +0530)]
configs: dra7xx: hs: Enable DM_ETH

Enable DM_ETH for hs boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: ti_omap5_common: Select dtb name for dra71x
Nishanth Menon [Wed, 23 Nov 2016 07:55:31 +0000 (13:25 +0530)]
configs: ti_omap5_common: Select dtb name for dra71x

Select dtb name for dra71x-evm.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>