An issue in the TI secure image generation tool causes the ROM to
load the SPL at a different load address than what is specified by
CONFIG_ISW_ENTRY_ADDR while doing a peripheral boot.
This causes the SPL to fail on secure devices during peripheral
boot.
The TI secure image generation tool has been fixed so that the SPL
will always be loaded at 0x403018E0 by the ROM code for both
peripheral and memory boot modes. am43x hs defconfig file have been
updated to reflect this change.
Mugunthan V N [Thu, 17 Nov 2016 09:08:10 +0000 (14:38 +0530)]
drivers: usb: musb: adopt musb backend driver to driver model
Currently all backend driver ops uses hard coded physical
address, so to adopt the driver to DM, add device pointer to ops
call backs so that drivers can get physical addresses from the
usb driver priv/plat data.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Thu, 17 Nov 2016 09:08:09 +0000 (14:38 +0530)]
am33xx: board: probe misc drivers to register musb devices
MUSB wrapper driver is bound as MISC device and underlying usb
devices are bind to usb drivers based on dr_mode, so probing the
MISC wrapper driver to register musb devices.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Stefan Roese [Wed, 30 Nov 2016 06:24:47 +0000 (07:24 +0100)]
dm: core: Add dev_get_addr_size_index() to retrieve addr and size
The currently available functions accessing the 'reg' property of a
device only retrieve the address. Sometimes its also necessary to
retrieve the size described by the 'reg' property. This patch adds
the new function dev_get_addr_size_index() which retrieves both,
the address and the size described by the 'reg' property.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Sat, 26 Nov 2016 02:02:10 +0000 (11:02 +0900)]
libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY
Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.
This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt(). It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Simon Glass <sjg@chromium.org>
Fixed build error for x86: Signed-off-by: Simon Glass <sjg@chromium.org>
Fabien Parent [Thu, 24 Nov 2016 14:02:18 +0000 (15:02 +0100)]
cmd/fdt: fix uncallable systemsetup command
The function that is processing the 'fdt' parameters is one big
if-else if. In order to be able to type command faster only the first
few letter are checked to know which block of code to execute. For
systemsetup, the block of code that was executed was always the wrong
one and ended up in a failure.
} else if (argv[1][0] == 's') {
process "fdt set" command
} else if (strncmp(argv[1], "sys", 3) == 0) {
process "fdt systemsetup" command.
}
When typing "fdt systemsetup", the code that was executed was the code
for "fdt set".
This commit fix this issue by moving the "else if" for systemsetup
before the else if for "fdt set". This allow us to keep compatibility
with any script that make use of "fdt s" to set node values.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Fri, 18 Nov 2016 05:36:13 +0000 (11:06 +0530)]
drivers: usb: gadget: ether: consolidate global devices to single struct
Consolidate the net device, usb eth device and gadget device
struct to single struct and a single global variable so that the
same can be passed as priv of ethernet driver.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Sun, 13 Nov 2016 21:21:58 +0000 (14:21 -0700)]
dm: core: Handle global_data moving in SPL
When CONFIG_SPL_STACK_R is enabled, and spl_init() is called before
board_init_r(), spl_relocate_stack_gd() will move global_data to a new
place in memory. This affects driver model since it uses a list for the
uclasses. Unless this is updated the list will become invalid. When
looking for a non-existent uclass, such as when adding a new one, the loop
in uclass_find() may continue forever, thus causing a hang.
Add a function to correct this rather obscure bug.
r2dplus: fixup CONFIG_SYS_TEXT_BASE to account arch/sh changes
This change allows to reserve enough space at the end of board SDRAM
to store two copies of U-Boot and malloc heap.
Due to selection of the CONFIG_SYS_TEXT_BASE the second code/data
copying is not avoided, first of all this may depend on a used
toolchain, secondly at this point some level of volatility is wanted
to do more platform changes and do not care about probably changed
calculated in runtime relocation offset.
sh: generate position independent code for all platforms
Finally add fpic compilation option to produce relocatable code.
Note that this requires to define CONFIG_NEEDS_MANUAL_RELOC for all
board files, also relocation support still has some limitations
(e.g. a developer should care not to overwrite the executing code or
memset() with zeroes not yet relocated data on malloc init etc.),
which may be fixed while switching to PIE.
Due to short investigation the architecture code is not ready for PIE
linking, this will require some manipulations with .dyn* sections.
sh: share the correct version of start.S among all cpus
It is easy to note that SH2/SH3/SH4 start.S code is practically
the same with a minor difference for SH2 where a short data header is
present. To avoid unwanted code duplication and to automatically
convert SH2 and SH3 platforms to generic board support move fixed SH4
start.S into arch/sh/lib/start.S and share it among all platforms.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh4: fix start.S by calling board_init_f() after first code relocation
Like on ARM platform keep the first code relocation from a U-boot
image storage to RAM at CONFIG_SYS_TEXT_BASE, then pass execution to a
generic board_init_f() with empty GD flags. If CONFIG_SYS_TEXT_BASE is
equal to a calculated by board_init_f() relocation address there will
be no more code and data copy, however it's worth to mention that the
first copy happens even if $pc on _start is the same as
CONFIG_SYS_TEXT_BASE, on practice this works without a problem.
Also note that _sh_start is renamed back to _start to correct
gd->mon_len calculation by setup_mon_len(), the opposite rename was
done in pre-generic board commit 2024b968ee9 ("sh: Fix build in start.S").
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh: add shared relocate_code() function and call board_init_r()
Commits b61e90e6fd83 ("sh: Drop the arch-specific board init") and f41e6088eb1a ("sh: Fix build errors for generic board") left code and
data relocation done in start.S, however further actual U-boot
configuration is not started anymore. Practically SH boards with the
code relocated into the expected position by start.S still can be
booted, so the change adds this option and provides an option how to
relocate code for board_init_r() execution.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh: add common dram_init() function for all boards
Generic board support assumes a different method of specifying
DRAM size on board, also it can be shared among all boards, notably
only sh7763rdp board has a custom legacy dram_init(), however
the difference is only in printing some additional information,
this feature can be removed.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh: define CONFIG_DISPLAY_BOARDINFO to print board information
All SH boards define a checkboard() function which outputs basic board
information on boot, however generic board support requires to define
CONFIG_DISPLAY_BOARDINFO to do that, so define it for the boards.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh: remove undefined DEBUG preprocessor token from board config files
By default this undef is a noop, moreover at this point when the
platform support is broken is prevents debugging of U-boot by manual
insertion of #define DEBUG into common files, so it makes sense to
remove the option from all SH boards as a harmful one.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
At the moment in runtime all defined sections are copied into or
created in RAM, specify this explicitly to assert potential out of RAM
placements of the sections.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh: define entry point and reloc_dst inside a linker script
No functional change, concentrate linker script commands in one
place for convenience. Entry point is set to CONFIG_SYS_TEXT_BASE by
default on build, so this option can be omitted from being added to
the linker script.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh: place board lowlevel_init code in the beginning of .text
Reference lowlevel_init of all supported SH2A/SH3/SH4/SH4A boards
from a shared linker script, the lowlevel_init function will be called
by a relative address.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh4: use single u-boot linker script for all boards
Three supported SH4/SH4A boards with the bootloader image stored on
SPI flash have own flavour of a linker script, in turn they are equal
among each other. The only difference is that the text from
lowlevel_init.o is placed right after start.o, which makes sense.
Note that .bss section is not marked as NOLOAD, because for about
10 years this is a default option of a GNU linker, either the
attribute is found or not the resulting image file is the same.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Since a platform conversion to generic board support has not been
accomplished some architecture specific bits are missing from board_f
init sequence, the change adds a number of basic expected callbacks
into early init sequence.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_RTL8139 was moved to a board defconfig by a commit 86e9dc86b1a2
("net: Move CONFIG_RTL8139 to Kconfig"), however it was done
incorrectly due to a missing CONFIG_NETDEVICES selection, thus
virtually it was just a removal of the driver compilation.
As an unlucky consequence the option was completely removed by a purge
commit adad96e60d0e ("configs: Re-sync HUSH options"), restore the
driver inclusion back.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
r2dplus: use P1 area space for text base and PCI system memory
While both options are acceptable use P1 area physical addresses
instead of external memory space of text base and PCI system memory
for unification purposes, all other supported superh boards have the
same selection.
This allows to easily ensure that CONFIG_SYS_TEXT_BASE is located
within available DRAM.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
For ease of use and accounting a condition that on SH4
pci_phys_to_bus() and pci_bus_to_phys() are one in one mappings due to
unimplemented __iomem() conversion, this change fixes access to SDRAM
memory by PCI devices.
This change also generalizes PCI system memory configuration, which is
taken from board specific defines rather than hardcoded in the PCI
host driver.
The change actually maps PCI I/O window to the same address on PCI bus
as it is stated by a comment, before the change transfers to the PCI I/O
space are failed due to misconfiguration of the most significant 14 bits
of the PCI address in PCIIOBR (note that it is set to 0x0).
Most probably the problem remained unnoticed, because communcation
to all tested PCI devices is done over PCI memory space only.
sh4: cache: move exported cache manipulation functions into cache.c
No functional change, moving cache manipulation functions into cache.c
allows to collect all of them in a single location and as a pleasant
side effect cache_control() function can be unexported now.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
cache_wback_all() is a local function and it is called from
cache_control() only, which is in turn jumps to P2 area.
The change fixes an issue when cache_wback_all() returns from P2 to
P1, however cache_control() continues to manipulate with CCR
register, according to the User's Manual this is restricted.
The change is similar to commit 994b56616bae ("sh: delete an unused
source file") for SH2, however here the removed cache.c file was
built and included into an image as a dead code.
If it is needed in future the contents can be reused from a similar
arch/sh/cpu/sh4/cache.c file, which is in turn will be moved to
a shared among all core flavours location at arch/sh/lib/cache.c.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh4: cache: correct flush_cache() to writeback and invalidate
In common usecases flush_cache() assumes both cache invalidation and
write-back to memory, instead of doing cache invalidation only with
the wrapped 'ocbi' instruction pin flush_cache() to cache invalidation
with memory write-back done by 'ocbp'.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
sh4: cache: correct dcache flush to invalidate with write-back
In common usecases flush_cache() assumes both cache invalidation and
write-back to memory, thus in flush_dcache_range() implementation
change SH4 cache write-back only instruction 'ocbwb' with cache purge
instruction 'ocbp', according to the User's Manual there should be no
performance penalty for that.
Note that under circumstances only cache invalidation is expected from
flush_cache() call, in these occasional cases the current version of
flush_cache() works, which is a wrapper over invalidate_dcache_range()
at the moment, this will be fixed in the following change.
Jonathan Gray [Sat, 26 Nov 2016 04:18:00 +0000 (15:18 +1100)]
compiler.h: use u-boot endian macros on OpenBSD
When building u-boot on sparc64 and powerpc hosts it became clear that
u-boot expects endian conversion defines to be macros:
lib/crc32.c:87: error: braced-group within expression allowed only inside a function
For OpenBSD switch from using system definitions equivalent to the u-boot ones
and define glibc __BYTE_ORDER __BIG_ENDIAN __LITTLE_ENDIAN names, as at least
some parts of the non-cross build assumes those names are present (ie crc32.c).
Simon Glass [Sun, 13 Nov 2016 21:25:53 +0000 (14:25 -0700)]
buildman: Squash useless output from -K
When using #define CONFIG_SOME_OPTION, the value it set to '1'. When using
defconfig (i.e. CONFIG_SOME_OPTION=y) the value is set to 'y'. This results
in differences showing up with -K. These differences are seldom useful.
Adjust buildman to suppress these differences by default.
Simon Glass [Sun, 13 Nov 2016 21:25:51 +0000 (14:25 -0700)]
buildman: Add an option to just create the config
Normally buildman does a full build of a board. This includes creating the
u-boot.cfg file which contains all the configuration options. Buildman uses
this file with the -K option, to show differences in effective configuration
for each commit.
Doing a full build of U-Boot just to create the u-boot.cfg file is wasteful.
Add a -D option which causes buildman to only create the configuration. This
is enough to support use of -K and can be done much more quickly (typically
5-10 times faster).
Simon Glass [Sun, 13 Nov 2016 21:25:50 +0000 (14:25 -0700)]
Makefile: Add a target to create the .cfg files
A common requirement when converting CONFIG options to Kconfig is to check
that the effective configuration has not changed due to the conversion. Add
a target which creates this configuration (in the form of u-boot.cfg) but
does not build U-Boot. This speeds up the checking.
Tom Rini [Tue, 18 Oct 2016 01:09:32 +0000 (21:09 -0400)]
sandboxfs: Fix resource leak
Now that we free resources in sandbox_fs_ls Coverity is letting us know
that in some cases we might leak. So in case of error we should still
let os_dirent_free free anything that was allocated.
Fixes: 86167089b71c ("sandbox/fs: Free memory allocated by os_dirent_ls") Reported-by: Coverity (CID: 153450) Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The Atmel AT97SC3204 is also TIS compliant.
Modify the tpm_tis_lpc driver to check for the vid/did used by the
Atmel AT97SC3204 and report an appropriate description.
Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Brüns [Sun, 16 Oct 2016 15:13:55 +0000 (17:13 +0200)]
cmd/tpm_test: Fix misleading code indentation
GCC 6.2 reasonably complains about the current code:
../cmd/tpm_test.c: In function ‘do_tpmtest’:
../cmd/tpm_test.c:540:3: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation]
for (i = 0; i < argc; i++)
^~~
../cmd/tpm_test.c:542:4: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’
printf("\n------\n");
^~~~~~
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Updated to remove C99 variable decl: Signed-off-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 30 Nov 2016 11:50:58 +0000 (12:50 +0100)]
scsi: Separate SCSI private block description initialization
When blk_create_device() is called some parameters in blk_desc are
automatically filled. Separate SCSI private initialization and SCSI full
block device initialization not to rewrite already prepared data.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 30 Nov 2016 11:12:31 +0000 (12:12 +0100)]
scsi: Change scsi_scan() to be able to return value
With DM_SCSI this function will return more than one return value to
cover errors.
Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Fri, 18 Nov 2016 15:22:42 +0000 (16:22 +0100)]
scsi: Simplify scsi_read/scsi_write()
There is no reason to directly point to static allocated array
when we have proper block_dev pointer available via parameter
in !CONFIG_BLK. For CONFIG_BLK this is read directly from uclass
platdata.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 16 Nov 2016 07:41:01 +0000 (08:41 +0100)]
common: miiphyutil: Work and report phy address in hex in mdio cmd
It is confusing that mdio commands work and report phy id as
decimal value when mii is working with hex values.
For example:
ZynqMP> mdio list
gem:
21 - TI DP83867 <--> ethernet@ff0e0000
ZynqMP> mdio read ethernet@ff0e0000 0
Reading from bus gem
PHY at address 21:
0 - 0x1140
ZynqMP> mii dump 21 0
Incorrect PHY address. Range should be 0-31
...
ZynqMP> mii dump 15
0. (1140) -- PHY control register --
(8000:0000) 0.15 = 0 reset
U-Boot normally takes hex values that's why this patch is changing mdio
command to handle hex instead of changing mii command to handle decimal
values.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Wed, 26 Oct 2016 07:24:32 +0000 (09:24 +0200)]
ARM64: zynqmp: List secondary software boot modes
Using alternative bootmode field to support automatic secondary boot
modes. It is purely software setting where SW modes are using free
bootmode combinations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 29 Nov 2016 11:03:51 +0000 (12:03 +0100)]
ARM64: zynqmp: Use DTS name for different psu_init_gpl* files in SPL
CONFIG_SYS_CONFIG_NAME is not proper config option for different low
level init files because different board revisions requires different
psu_init_gpl* files.
Also at the end of moving drivers to DM all board specific configuration
files should be removed.
Michal Simek [Tue, 30 Aug 2016 14:17:27 +0000 (16:17 +0200)]
ARM64: zynqmp: Force certain bootmode for SPL
ZynqMP provides an option to overwrite bootmode setting which
can change SPL behavior.
For example: boot SPL via JTAG and then SPL loads images from SD.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Chris Packham [Wed, 9 Nov 2016 09:21:45 +0000 (22:21 +1300)]
tools/kwbimage: add DEBUG option
Offset 0x1 in the generated kwb image file is a set of flags, bit 0
enables debug output from the BootROM firmware. Allow a DEBUG option in
the kwb configuration to request debug output from the BootROM firmware.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Chris Packham [Wed, 9 Nov 2016 09:07:45 +0000 (22:07 +1300)]
tools/kwbimage: add BAUDRATE option
Offset 0x18 in some Marvell datasheets this field is redacted as
"reserved". This offset is actually a set of options and bits 2:0 allow
the selection of the UART baudrate.
Allow a BAUDRATE option to set the UART baudrate for any messages coming
from the BootROM firmware.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Marek Vasut [Thu, 1 Dec 2016 01:06:33 +0000 (02:06 +0100)]
mmc: Tinification of the mmc code
Add new configuration option CONFIG_MMC_TINY which strips away all
memory allocation within the MMC code and code for handling multiple
cards. This allows extremely space-constrained SPL code use the MMC
framework.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
Marek Vasut [Thu, 1 Dec 2016 01:06:32 +0000 (02:06 +0100)]
mmc: Fix warning if debug() is not used
If debug() is not used, then the whole content of debug(...) will
be removed by the preprocessor, which will result in the following
warning. This patch adds __maybe_unused annotation to fix this.
drivers/mmc/mmc.c: In function ‘mmc_init’:
drivers/mmc/mmc.c:1685:11: warning: variable ‘start’ set but not used [-Wunused-but-set-variable]
unsigned start;
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Wed, 30 Nov 2016 19:14:47 +0000 (14:14 -0500)]
ts4600: Disable CONFIG_DISPLAY_CPUINFO
Without this change we see:
../arch/arm/cpu/arm926ejs/mxs/mxs.c: In function ‘print_cpuinfo’:
../arch/arm/cpu/arm926ejs/mxs/mxs.c:181:23: warning: unused variable ‘data’ [-Wunused-variable]
../arch/arm/cpu/arm926ejs/mxs/mxs.c:180:6: warning: variable ‘cpurev’ set but not used [-Wunused-but-set-variable]
So the easy solution is to disable CONFIG_DISPLAY_CPUINFO
Reviewed-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 30 Nov 2016 19:05:08 +0000 (14:05 -0500)]
travis.yml: Split Freescale ARM job up more
In order to avoid running into the time limit, split the 32bit and 64bit
Freescale boards into separate jobs. We could either pass
"freescale & armv8" to buildman or exclude all of the 32bit CPUs. While
the former is shorter I fear the amount of possible escaping required
would make things less readable.
Paul Burton [Mon, 26 Sep 2016 18:28:57 +0000 (19:28 +0100)]
MIPS: Fix map_physmem for cached mappings
map_physmem should return a pointer that can be used by the CPU to
access the given memory - on MIPS simply returning the physical address
as it does prior to this patch doesn't achieve that. Instead return a
pointer to the memory within (c)kseg0, which matches up consistently
with the (c)kseg1 pointer that uncached mappings return via ioremap.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 26 Sep 2016 18:28:56 +0000 (19:28 +0100)]
MIPS: Use ram_top, not bi_memsize, in arch_lmb_reserve
When calculating the region to reserve for the stack in
arch_lmb_reserve, make use of ram_top instead of adding bi_memsize to
CONFIG_SYS_SDRAM_BASE. This avoids overflow if the system has enough
memory to reach the end of the address space.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
MIPS: add handling for generic and EJTAG exceptions
Add exception handlers for generic and EJTAG exceptions. Most of
the assembly code is imported from Linux kernel and adapted to U-Boot.
The exception vector table will be reserved above the stack before
U-Boot is relocated. The exception handlers will be installed and
activated after relocation in the initr_traps hook function.
Generic exceptions are handled by showing a CPU register dump similar
to Linux kernel. For example:
EJTAG exceptions are checked for SDBBP and delegated to the SDBBP handler
if necessary. Otherwise the debug mode will simply be exited. The SDBBP
handler currently prints the contents of registers c0_depc and c0_debug.
This could be extended in the future to handle semi-hosting according to
the MIPS UHI specification.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Tested-by: Paul Burton <paul.burton@imgtec.com>
In order to set own exception handlers, a table with the exception
vectors must be built in DRAM and the CPU EBase register must be
set to the base address of this table.
Reserve the space above the stack and use gd->irq_sp as storage
for the exception base address.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
projects / u-boot / log