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2018-03-21	Eugeniy Paltsev	ARC: Flush & invalidate D$ with a single command Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-03-21	Eugeniy Paltsev	ARC: Introduce is_isa_X() functions Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-03-21	Eugeniy Paltsev	ARC: Cache: Add support for FLUSH_N_INV D$ operations Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-03-21	Eugeniy Paltsev	ARC: Cache: Remove per-line I$ operations as unused Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-03-21	Eugeniy Paltsev	ARC: Cache: Move I$ entire operation to a separate... Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-02-26	Eugeniy Paltsev	NET: designware: fix clock enable Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-26	Eugeniy Paltsev	DW SPI: Get clock value from Device Tree Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-26	Eugeniy Paltsev	SOCFPGA: clock manager: implement dw_spi_get_clk function Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: Invalidate instruction and data caches early on... Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: HSDK: DTS: Add cgu-clk node Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: HSDK: CGU: Add 'Hz' when printing clock frequency Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: HSDK: CGU: Use plat data instead of priv data Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: HSDK: CGU: Update AXI, TUN, ARC clock options Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: HSDK: Hang on panic Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: Cache: Fix style violations reported by checkpatch Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: Cache: Disable IOC by default Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2018-01-19	Eugeniy Paltsev	ARC: ARCv2: Cache: Fixed operation without IOC Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2017-12-11	Eugeniy Paltsev	ARC: clk: introduce HSDK CGU clock driver Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2017-12-11	Eugeniy Paltsev	ARC: cache: explicitly initialize "*_exists" variables Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2017-12-11	Eugeniy Paltsev	ARC: add defines of some cache and xCCM AUX registers Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2017-12-11	Eugeniy Paltsev	ARC: add macro to get CPU id Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2017-12-11	Eugeniy Paltsev	ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2017-12-10	Eugeniy Paltsev	ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD... Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree
2017-11-24	Eugeniy Paltsev	ARC: HSDK: introduce CREG GPIO driver Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>	commit \| commitdiff \| tree

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