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Update headers for the FreeRTOS V7.0.2 release.
[freertos] / Demo / RX600_RX62N-RDK_IAR / RegTest.s
1 /*\r
2     FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
3         \r
4 \r
5     ***************************************************************************\r
6      *                                                                       *\r
7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
8      *    Complete, revised, and edited pdf reference manuals are also       *\r
9      *    available.                                                         *\r
10      *                                                                       *\r
11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
12      *    ensuring you get running as quickly as possible and with an        *\r
13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
14      *    the FreeRTOS project to continue with its mission of providing     *\r
15      *    professional grade, cross platform, de facto standard solutions    *\r
16      *    for microcontrollers - completely free of charge!                  *\r
17      *                                                                       *\r
18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
19      *                                                                       *\r
20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
21      *                                                                       *\r
22     ***************************************************************************\r
23 \r
24 \r
25     This file is part of the FreeRTOS distribution.\r
26 \r
27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
28     the terms of the GNU General Public License (version 2) as published by the\r
29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
31     distribute a combined work that includes FreeRTOS without being obliged to\r
32     provide the source code for proprietary components outside of the FreeRTOS\r
33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36     more details. You should have received a copy of the GNU General Public\r
37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
39     by writing to Richard Barry, contact details for whom are available on the\r
40     FreeRTOS WEB site.\r
41 \r
42     1 tab == 4 spaces!\r
43 \r
44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
45     contact details.\r
46 \r
47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
48     critical systems.\r
49 \r
50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
51     licensing and training services.\r
52 */\r
53 \r
54         PUBLIC _prvRegTest1Implementation\r
55         PUBLIC _prvRegTest2Implementation\r
56         \r
57         EXTERN _ulRegTest1CycleCount\r
58         EXTERN _ulRegTest2CycleCount\r
59 \r
60         RSEG CODE:CODE(4)\r
61 \r
62 /* This function is explained in the comments at the top of main.c. */\r
63 _prvRegTest1Implementation:\r
64 \r
65         /* Put a known value in each register. */\r
66         MOV     #1, R1                                          \r
67         MOV     #2, R2                                          \r
68         MOV     #3, R3                                          \r
69         MOV     #4, R4                                          \r
70         MOV     #5, R5                                          \r
71         MOV     #6, R6                                          \r
72         MOV     #7, R7                                          \r
73         MOV     #8, R8                                          \r
74         MOV     #9, R9                                          \r
75         MOV     #10, R10                                        \r
76         MOV     #11, R11                                        \r
77         MOV     #12, R12                                        \r
78         MOV     #13, R13                                        \r
79         MOV     #14, R14                                        \r
80         MOV     #15, R15                                        \r
81         \r
82         /* Loop, checking each itteration that each register still contains the\r
83         expected value. */\r
84 TestLoop1:                                                              \r
85 \r
86         /* Push the registers that are going to get clobbered. */\r
87         PUSHM   R14-R15                                         \r
88         \r
89         /* Increment the loop counter to show this task is still getting CPU time. */\r
90         MOV     #_ulRegTest1CycleCount, R14     \r
91         MOV     [ R14 ], R15                            \r
92         ADD     #1, R15                                         \r
93         MOV     R15, [ R14 ]                            \r
94         \r
95         /* Yield to extend the text coverage.  Set the bit in the ITU SWINTR register. */\r
96         MOV     #1, R14                                         \r
97         MOV     #0872E0H, R15                           \r
98         MOV.B   R14, [R15]                                      \r
99         NOP                                                             \r
100         NOP                                                             \r
101         \r
102         /* Restore the clobbered registers. */\r
103         POPM    R14-R15                                         \r
104         \r
105         /* Now compare each register to ensure it still contains the value that was\r
106         set before this loop was entered. */\r
107         CMP     #1, R1                                          \r
108         BNE     RegTest1Error                           \r
109         CMP     #2, R2                                          \r
110         BNE     RegTest1Error                           \r
111         CMP     #3, R3                                          \r
112         BNE     RegTest1Error                           \r
113         CMP     #4, R4                                          \r
114         BNE     RegTest1Error                           \r
115         CMP     #5, R5                                          \r
116         BNE     RegTest1Error                           \r
117         CMP     #6, R6                                          \r
118         BNE     RegTest1Error                           \r
119         CMP     #7, R7                                          \r
120         BNE     RegTest1Error                           \r
121         CMP     #8, R8                                          \r
122         BNE     RegTest1Error                           \r
123         CMP     #9, R9                                          \r
124         BNE     RegTest1Error                           \r
125         CMP     #10, R10                                        \r
126         BNE     RegTest1Error                           \r
127         CMP     #11, R11                                        \r
128         BNE     RegTest1Error                           \r
129         CMP     #12, R12                                        \r
130         BNE     RegTest1Error                           \r
131         CMP     #13, R13                                        \r
132         BNE     RegTest1Error                           \r
133         CMP     #14, R14                                        \r
134         BNE     RegTest1Error                           \r
135         CMP     #15, R15                                        \r
136         BNE     RegTest1Error                           \r
137 \r
138         /* All comparisons passed, start a new itteratio of this loop. */\r
139         BRA             TestLoop1                               \r
140         \r
141 RegTest1Error:                                                  \r
142         /* A compare failed, just loop here so the loop counter stops incrementing\r
143         - causing the check task to indicate the error. */\r
144         BRA RegTest1Error                                       \r
145 /*-----------------------------------------------------------*/\r
146 \r
147 /* This function is explained in the comments at the top of main.c. */\r
148 _prvRegTest2Implementation:\r
149 \r
150         /* Put a known value in each register. */\r
151         MOV     #10H, R1                                        \r
152         MOV     #20H, R2                                        \r
153         MOV     #30H, R3                                        \r
154         MOV     #40H, R4                                        \r
155         MOV     #50H, R5                                        \r
156         MOV     #60H, R6                                        \r
157         MOV     #70H, R7                                        \r
158         MOV     #80H, R8                                        \r
159         MOV     #90H, R9                                        \r
160         MOV     #100H, R10                                      \r
161         MOV     #110H, R11                                      \r
162         MOV     #120H, R12                                      \r
163         MOV     #130H, R13                                      \r
164         MOV     #140H, R14                                      \r
165         MOV     #150H, R15                                      \r
166         \r
167         /* Loop, checking each itteration that each register still contains the\r
168         expected value. */\r
169 TestLoop2:                                                              \r
170 \r
171         /* Push the registers that are going to get clobbered. */\r
172         PUSHM   R14-R15                                         \r
173         \r
174         /* Increment the loop counter to show this task is still getting CPU time. */\r
175         MOV     #_ulRegTest2CycleCount, R14     \r
176         MOV     [ R14 ], R15                            \r
177         ADD     #1, R15                                         \r
178         MOV     R15, [ R14 ]                            \r
179         \r
180         /* Restore the clobbered registers. */\r
181         POPM    R14-R15                                         \r
182         \r
183         /* Now compare each register to ensure it still contains the value that was\r
184         set before this loop was entered. */\r
185         CMP     #10H, R1                                        \r
186         BNE     RegTest2Error                           \r
187         CMP     #20H, R2                                        \r
188         BNE     RegTest2Error                           \r
189         CMP     #30H, R3                                        \r
190         BNE     RegTest2Error                           \r
191         CMP     #40H, R4                                        \r
192         BNE     RegTest2Error                           \r
193         CMP     #50H, R5                                        \r
194         BNE     RegTest2Error                           \r
195         CMP     #60H, R6                                        \r
196         BNE     RegTest2Error                           \r
197         CMP     #70H, R7                                        \r
198         BNE     RegTest2Error                           \r
199         CMP     #80H, R8                                        \r
200         BNE     RegTest2Error                           \r
201         CMP     #90H, R9                                        \r
202         BNE     RegTest2Error                           \r
203         CMP     #100H, R10                                      \r
204         BNE     RegTest2Error                           \r
205         CMP     #110H, R11                                      \r
206         BNE     RegTest2Error                           \r
207         CMP     #120H, R12                                      \r
208         BNE     RegTest2Error                           \r
209         CMP     #130H, R13                                      \r
210         BNE     RegTest2Error                           \r
211         CMP     #140H, R14                                      \r
212         BNE     RegTest2Error                           \r
213         CMP     #150H, R15                                      \r
214         BNE     RegTest2Error                           \r
215 \r
216         /* All comparisons passed, start a new itteratio of this loop. */\r
217         BRA     TestLoop2                                       \r
218         \r
219 RegTest2Error:                                                  \r
220         /* A compare failed, just loop here so the loop counter stops incrementing\r
221         - causing the check task to indicate the error. */\r
222         BRA RegTest2Error                                       \r
223 \r
224         \r
225         END\r