2 FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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71 * This file initialises three timers as follows:
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73 * Basic timer channels 0 and 1 provide the interrupts that are used with the
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74 * IntQ standard demo tasks, which test interrupt nesting and using queues from
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75 * interrupts. The interrupts use slightly different frequencies so will
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76 * occasionally nest.
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78 * Basic timer channel 2 provides a much higher frequency timer that tests the
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79 * nesting of interrupts that don't use the FreeRTOS API.
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81 * All the timers can nest with the tick interrupt - creating a maximum
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82 * interrupt nesting depth of 4 (which is shown as a max nest count of 3 as the
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83 * tick interrupt does not increment the nesting count variable).
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87 /* Scheduler includes. */
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88 #include "FreeRTOS.h"
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91 /* Demo includes. */
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92 #include "IntQueueTimer.h"
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93 #include "IntQueue.h"
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95 /* Library includes. */
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96 #include "common_lib.h"
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97 #include "peripheral_library/interrupt/interrupt.h"
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98 #include "peripheral_library/basic_timer/btimer.h"
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100 /* The frequencies at which the first two timers expire are slightly offset to
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101 ensure they don't remain synchronised. The frequency of the highest priority
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102 interrupt is 20 times faster so really hammers the interrupt entry and exit
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104 #define tmrTIMER_0_FREQUENCY ( 2000UL )
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105 #define tmrTIMER_1_FREQUENCY ( 2003UL )
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106 #define tmrTIMER_2_FREQUENCY ( 20000UL )
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108 /* The basic timer channels used for generating the three interrupts. */
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109 #define tmrTIMER_CHANNEL_0 0 /* At tmrTIMER_0_FREQUENCY */
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110 #define tmrTIMER_CHANNEL_1 1 /* At tmrTIMER_1_FREQUENCY */
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111 #define tmrTIMER_CHANNEL_2 2 /* At tmrTIMER_2_FREQUENCY */
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113 /* The high frequency interrupt is given a priority above the maximum at which
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114 interrupt safe FreeRTOS calls can be made. The priority of the lower frequency
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115 timers must still be above the tick interrupt priority. */
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116 #define tmrLOWER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1 )
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117 #define tmrMEDIUM_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 0 )
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118 #define tmrHIGHER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1 )
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120 /* Hardware register locations. */
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121 #define tmrGIRQ23_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000C130 )
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122 #define tmrMMCR_EC_INTERRUPT_CONTROL ( * ( volatile uint8_t * ) 0x4000FC18 )
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124 #define tmrRECORD_NESTING_DEPTH() \
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125 ulNestingDepth++; \
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126 if( ulNestingDepth > ulMaxRecordedNestingDepth ) \
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128 ulMaxRecordedNestingDepth = ulNestingDepth; \
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131 /* Used to count the nesting depth, and record the maximum nesting depth. */
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132 volatile uint32_t ulNestingDepth = 0, ulMaxRecordedNestingDepth = 0;
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134 /*-----------------------------------------------------------*/
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136 void vInitialiseTimerForIntQueueTest( void )
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138 const uint32_t ulTimer0Count = configCPU_CLOCK_HZ / tmrTIMER_0_FREQUENCY;
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139 const uint32_t ulTimer1Count = configCPU_CLOCK_HZ / tmrTIMER_1_FREQUENCY;
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140 const uint32_t ulTimer2Count = configCPU_CLOCK_HZ / tmrTIMER_2_FREQUENCY;
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142 tmrGIRQ23_ENABLE_SET = 0x03;
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143 tmrMMCR_EC_INTERRUPT_CONTROL = 1;
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145 /* Initialise the three timers as described at the top of this file, and
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146 enable their interrupts in the NVIC. */
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147 btimer_init( tmrTIMER_CHANNEL_0, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer0Count, ulTimer0Count );
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148 btimer_interrupt_status_get_clr( tmrTIMER_CHANNEL_0 );
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149 enable_timer0_irq();
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150 NVIC_SetPriority( TIMER0_IRQn, tmrLOWER_PRIORITY ); //0xc0 into 0xe000e431
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151 NVIC_ClearPendingIRQ( TIMER0_IRQn );
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152 NVIC_EnableIRQ( TIMER0_IRQn );
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153 btimer_start( tmrTIMER_CHANNEL_0 );
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155 btimer_init( tmrTIMER_CHANNEL_1, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer1Count, ulTimer1Count );
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156 btimer_interrupt_status_get_clr( tmrTIMER_CHANNEL_1 );
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157 enable_timer1_irq();
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158 NVIC_SetPriority( TIMER1_IRQn, tmrMEDIUM_PRIORITY ); //0xa0 into 0xe000e432
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159 NVIC_ClearPendingIRQ( TIMER1_IRQn );
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160 NVIC_EnableIRQ( TIMER1_IRQn );
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161 btimer_start( tmrTIMER_CHANNEL_1 );
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163 btimer_init( tmrTIMER_CHANNEL_2, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer2Count, ulTimer2Count );
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164 btimer_interrupt_status_get_clr( tmrTIMER_CHANNEL_2 );
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165 enable_timer2_irq();
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166 NVIC_SetPriority( TIMER2_IRQn, tmrHIGHER_PRIORITY );
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167 NVIC_ClearPendingIRQ( TIMER2_IRQn );
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168 NVIC_EnableIRQ( TIMER2_IRQn );
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169 btimer_start( tmrTIMER_CHANNEL_2 );
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171 /*-----------------------------------------------------------*/
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173 /* The TMR0 interrupt is used for different purposes by the low power and full
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174 demos respectively. */
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175 #if( configCREATE_LOW_POWER_DEMO == 0 )
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177 void NVIC_Handler_TMR0( void )
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179 tmrRECORD_NESTING_DEPTH();
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181 /* Call the IntQ test function for this channel. */
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182 portYIELD_FROM_ISR( xFirstTimerHandler() );
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187 #endif /* configCREATE_LOW_POWER_DEMO */
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188 /*-----------------------------------------------------------*/
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190 void NVIC_Handler_TMR1( void )
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192 tmrRECORD_NESTING_DEPTH();
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194 /* Just testing the xPortIsInsideInterrupt() functionality. */
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195 configASSERT( xPortIsInsideInterrupt() == pdTRUE );
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197 /* Call the IntQ test function for this channel. */
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198 portYIELD_FROM_ISR( xSecondTimerHandler() );
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202 /*-----------------------------------------------------------*/
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204 void NVIC_Handler_TMR2( void )
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206 tmrRECORD_NESTING_DEPTH();
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209 /*-----------------------------------------------------------*/
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