1 /*****************************************************************************
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2 * © 2015 Microchip Technology Inc. and its subsidiaries.
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3 * You may use this software and any derivatives exclusively with
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4 * Microchip products.
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5 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
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6 * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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7 * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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8 * AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
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9 * PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
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10 * IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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11 * INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
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12 * WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
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13 * BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
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14 * TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
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15 * CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
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16 * FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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17 * MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
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19 ******************************************************************************
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21 Version Control Information (Perforce)
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22 ******************************************************************************
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24 $DateTime: 2015/11/24 06:28:28 $
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25 $Author: amohandas $
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26 Last Change: Updated for tabs
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27 ******************************************************************************/
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28 /** @file pcr_perphl.c
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29 * \brief Power, Clocks, and Resets Peripheral Source file
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32 * This file implements the PCR Peripheral functions
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33 ******************************************************************************/
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39 #include "common_lib.h"
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42 /* ---------------------------------------------------------------------- */
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43 /* Generic functions to program and read 32-bit values from PCR Registers */
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44 /* ---------------------------------------------------------------------- */
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45 /** Writes 32-bit value in the PCR Register
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46 * @param pcr_reg_id - pcr register id
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47 * @param value - 32-bit value
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49 void p_pcr_reg_write(uint8_t pcr_reg_id, uint32_t value)
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51 __IO uint32_t *pPCR_Reg;
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53 pPCR_Reg = (uint32_t *)(PCR_BASE);
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55 pPCR_Reg += pcr_reg_id;
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60 /** Reads 32-bit value from the PCR Register
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61 * @param pcr_reg_id - pcr register id
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62 * @return value - 32-bit value
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64 uint32_t p_pcr_reg_read(uint8_t pcr_reg_id)
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66 __IO uint32_t *pPCR_Reg;
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69 pPCR_Reg = (uint32_t *)(PCR_BASE);
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71 pPCR_Reg += pcr_reg_id;
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78 /* ---------------------------------------------------------------------- */
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79 /* Functions to set, clr and get bits in PCR Registers */
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80 /* ---------------------------------------------------------------------- */
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82 /** Sets bits in a PCR Register
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83 * @param pcr_reg_id - pcr register id
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84 * @param bit_mask - Bit mask of bits to set
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86 void p_pcr_reg_set(uint8_t pcr_reg_id, uint32_t bit_mask)
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88 __IO uint32_t *pPCR_Reg;
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90 pPCR_Reg = (uint32_t *)(PCR_BASE);
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92 pPCR_Reg += pcr_reg_id;
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94 *pPCR_Reg |= bit_mask;
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97 /** Clears bits in a PCR Register
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98 * @param pcr_reg_id - pcr register id
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99 * @param bit_mask - Bit mask of bits to clear
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101 void p_pcr_reg_clr(uint8_t pcr_reg_id, uint32_t bit_mask)
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103 __IO uint32_t *pPCR_Reg;
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105 pPCR_Reg = (uint32_t *)(PCR_BASE);
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107 pPCR_Reg += pcr_reg_id;
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109 *pPCR_Reg &= ~bit_mask;
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112 /** Read bits in a PCR Register
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113 * @param pcr_reg_id - pcr register id
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114 * @param bit_mask - Bit mask of bits to read
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115 * @return value - 32-bit value
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117 uint32_t p_pcr_reg_get(uint8_t pcr_reg_id, uint32_t bit_mask)
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119 __IO uint32_t *pPCR_Reg;
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122 pPCR_Reg = (uint32_t *)(PCR_BASE);
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124 pPCR_Reg += pcr_reg_id;
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126 retVal = (*pPCR_Reg) & bit_mask;
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131 /** Sets or Clears bits in a PCR Register - Helper Function
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132 * @param pcr_reg_id - pcr register id
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133 * @param bit_mask - Bit mask of bits to set or clear
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134 * @param set_clr_flag - Flag to set (1) or clear (0) bits in the PCR Register
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136 void p_pcr_reg_update(uint8_t pcr_reg_id, uint32_t bit_mask, uint8_t set_clr_flag)
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140 p_pcr_reg_set(pcr_reg_id, bit_mask);
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144 p_pcr_reg_clr(pcr_reg_id, bit_mask);
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148 /* ---------------------------------------------------------------------- */
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149 /* Functions to operate on System Sleep Control Register */
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150 /* ---------------------------------------------------------------------- */
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153 * Sets/Clears the Ring oscillator power down bit
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154 * in System Sleep Control Register
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155 * @param set_clr_flag - 1 - Sets the bit, 0 - clears the bit
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157 void p_pcr_system_sleep_ctrl_ring_osc_power_down(uint8_t set_clr_flag)
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159 __IO uint32_t *pPCR_Reg;
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161 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_SYSTEM_SLEEP_CTRL;
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165 *pPCR_Reg |= PCR_SYS_SLP_CTRL_RING_OSC_PWR_DOWN_BITMASK;
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169 *pPCR_Reg &= ~PCR_SYS_SLP_CTRL_RING_OSC_PWR_DOWN_BITMASK;
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173 /** Sets/Clears the Ring oscillator output gate bit
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174 * in System Sleep Control Register
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175 * @param set_clr_flag - 1 - Sets the bit, 0 - clears the bit
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177 void p_pcr_system_sleep_ctrl_ring_osc_output_gate(uint8_t set_clr_flag)
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179 __IO uint32_t *pPCR_Reg;
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181 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_SYSTEM_SLEEP_CTRL;
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185 *pPCR_Reg |= PCR_SYS_SLP_CTRL_RING_OSC_OUTPUT_GATE_BITMASK;
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189 *pPCR_Reg &= ~PCR_SYS_SLP_CTRL_RING_OSC_OUTPUT_GATE_BITMASK;
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193 /** Sets/Clears the Core regulator standby bit
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194 * in System Sleep Control Register
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195 * @param set_clr_flag - 1 - Sets the bit, 0 - clears the bit
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197 void p_pcr_system_sleep_ctrl_core_regulator_stdby(uint8_t set_clr_flag)
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199 __IO uint32_t *pPCR_Reg;
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201 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_SYSTEM_SLEEP_CTRL;
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205 *pPCR_Reg |= PCR_SYS_SLP_CTRL_CORE_REGLTOR_STDBY_BITMASK;
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209 *pPCR_Reg &= ~PCR_SYS_SLP_CTRL_CORE_REGLTOR_STDBY_BITMASK;
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213 /** Writes required sleep mode in System Sleep Control Register
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214 * @param sleep_value - System Sleep control value - [D2, D1, D0]
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216 void p_pcr_system_sleep_ctrl_write(uint8_t sleep_value)
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218 __IO uint32_t *pPCR_Reg;
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220 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_SYSTEM_SLEEP_CTRL;
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222 *pPCR_Reg = (sleep_value & 0x7);
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225 /** Reads the System Sleep Control PCR Register
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226 * @return value - byte 0 of the system sleep control PCR register
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228 uint8_t p_pcr_system_sleep_ctrl_read(void)
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230 __IO uint32_t *pPCR_Reg;
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233 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_SYSTEM_SLEEP_CTRL;
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235 retVal = (uint8_t)((*pPCR_Reg) & 0xFF);
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242 /* ---------------------------------------------------------------------- */
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243 /* Function to program to CLK Divide Value */
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244 /* ---------------------------------------------------------------------- */
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246 /** Writes the clock divide value in the Processor Clock Control Register
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247 * @param clk_divide_value - clk divide values, valid values in enum PROCESSOR_CLK_DIVIDE_VALUE
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249 void p_pcr_processor_clk_ctrl_write(uint8_t clk_divide_value)
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251 __IO uint32_t *pPCR_Reg;
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253 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_PROCESSOR_CLK_CTRL;
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255 *pPCR_Reg = (clk_divide_value & 0xFF);
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259 /* ---------------------------------------------------------------------- */
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260 /* Function to program the slow clock divide value */
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261 /* ---------------------------------------------------------------------- */
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263 /** Write the slow clock divide value in the Slow Clock Control Register
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264 * @param slow_clk_divide_value - slow clk divide value
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266 void p_pcr_slow_clk_ctrl_write(uint8_t slow_clk_divide_value)
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268 __IO uint32_t *pPCR_Reg;
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270 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_SLOW_CLK_CTRL;
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272 *pPCR_Reg = (slow_clk_divide_value & 0x3FF);
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276 /* ---------------------------------------------------------------------- */
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277 /* Function to read the Oscillator Lock Status */
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278 /* ---------------------------------------------------------------------- */
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280 /** Reads the Oscillator Lock status bit in the Oscillator ID Register
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281 * @return 1 if Oscillator Lock Status bit is set, else 0
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283 uint8_t p_pcr_oscillator_lock_sts_get(void)
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285 __IO uint32_t *pPCR_Reg;
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288 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_OSCILLATOR_ID;
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291 if (*pPCR_Reg & PCR_OSCILLATOR_LOCK_STATUS_BITMASK)
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300 /* ---------------------------------------------------------------------- */
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301 /* Functions to read various power status in Chip Sub-System register */
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302 /* ---------------------------------------------------------------------- */
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304 /** Reads the VCC Reset Status bit
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305 * in the Chip Subsystem Power Reset Status Register
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306 * @return 1 if VCC Reset Status bit is set, else 0
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308 uint8_t p_pcr_chip_subsystem_vcc_reset_sts_get(void)
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310 __IO uint32_t *pPCR_Reg;
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313 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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316 if (*pPCR_Reg & PCR_CHIP_SUBSYSTEM_VCC_RESET_STS_BITMASK)
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324 /** Reads the SIO Reset Status bit
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325 * in the Chip Subsystem Power Reset Status Register
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326 * @return 1 if SIO Reset Status bit is set, else 0
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328 uint8_t p_pcr_chip_subsystem_sio_reset_sts_get(void)
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330 __IO uint32_t *pPCR_Reg;
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333 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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336 if (*pPCR_Reg & PCR_CHIP_SUBSYSTEM_SIO_RESET_STS_BITMASK)
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344 /** Reads the VBAT Reset Status bit
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345 * in the Chip Subsystem Power Reset Status Register
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346 * @return 1 if VBAT Reset Status bit is set, else 0
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348 uint8_t p_pcr_chip_subsystem_vbat_reset_sts_get(void)
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350 __IO uint32_t *pPCR_Reg;
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353 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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356 if (*pPCR_Reg & PCR_CHIP_SUBSYSTEM_VBAT_RESET_STS_BITMASK)
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364 /** Clears the VBAT Reset Status bit
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365 * in the Chip Subsystem Power Reset Status Register
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367 void p_pcr_chip_subsystem_vbat_reset_sts_clr(void)
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369 __IO uint32_t *pPCR_Reg;
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371 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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374 *pPCR_Reg = PCR_CHIP_SUBSYSTEM_VBAT_RESET_STS_BITMASK;
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378 /** Reads the VCC1 Reset Status bit
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379 * in the Chip Subsystem Power Reset Status Register
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380 * @return 1 if VCC1 Reset Status bit is set, else 0
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382 uint8_t p_pcr_chip_subsystem_vcc1_reset_sts_get(void)
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384 __IO uint32_t *pPCR_Reg;
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387 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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390 if (*pPCR_Reg & PCR_CHIP_SUBSYSTEM_VCC1_RESET_STS_BITMASK)
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398 /** Clears the VCC1 Reset Status bit
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399 * in the Chip Subsystem Power Reset Status Register
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401 void p_pcr_chip_subsystem_vcc1_reset_sts_clr(void)
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403 __IO uint32_t *pPCR_Reg;
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405 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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408 *pPCR_Reg = PCR_CHIP_SUBSYSTEM_VCC1_RESET_STS_BITMASK;
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412 /** Reads the 32K_ACTIVE status bit
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413 * in the Chip Subsystem Power Reset Status Register
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414 * @return 1 if 32_ACTIVE bit is set, else 0
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416 uint8_t p_pcr_chip_subsystem_32K_active_sts_get(void)
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418 __IO uint32_t *pPCR_Reg;
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421 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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424 if (*pPCR_Reg & PCR_CHIP_SUBSYSTEM_32K_ACTIVE_STS_BITMASK)
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432 /** Reads the PCICLK_ACTIVE status bit
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433 * in the Chip Subsystem Power Reset Status Register
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434 * @return 1 if CICLK_ACTIVE bit is set, else 0
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436 uint8_t p_pcr_chip_subsystem_pciclk_active_sts_get(void)
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438 __IO uint32_t *pPCR_Reg;
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441 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_CHIP_SUBSYSTEM_PWR_RESET_STS;
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444 if (*pPCR_Reg & PCR_CHIP_SUBSYSTEM_PCICLK_ACTIVE_STS_BITMASK)
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451 /* ---------------------------------------------------------------------- */
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452 /* Functions for Power Reset Control Register */
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453 /* ---------------------------------------------------------------------- */
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455 /** Reads the iRESET_OUT bit in the Power Reset Control Register
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456 * @return 1 if iRESET_OUT bit is set, else 0
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458 uint8_t p_pcr_iReset_Out_get(void)
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460 __IO uint32_t *pPCR_Reg;
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463 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_PWR_RESET_CTRL;
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466 if (*pPCR_Reg & PCR_iRESET_OUT_BITMASK)
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475 /** Sets/Clears the iRESET_OUT bit in the Power Reset Control Register
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476 * @param 1 Set iRESET_OUT bit; 0 - Clear the bit
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478 void p_pcr_iReset_Out(uint8_t set_clr_flag)
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480 __IO uint32_t *pPCR_Reg;
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482 pPCR_Reg = (uint32_t *)(PCR_BASE) + PCR_REG_PWR_RESET_CTRL;
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484 *pPCR_Reg = (set_clr_flag & 0x1);
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488 /* end pcr_perphl.c */
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