4 * \brief Chip-specific PLL implementation
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6 * Copyright (c) 2012 Atmel Corporation. All rights reserved.
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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22 * 3. The name of Atmel may not be used to endorse or promote products derived
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23 * from this software without specific prior written permission.
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25 * 4. This software may only be redistributed and used in connection with an
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26 * Atmel microcontroller product.
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28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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43 #include <compiler.h>
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46 #define SCIF_UNLOCK_PLL_REG(pll_id) \
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48 SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu) \
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49 | SCIF_UNLOCK_ADDR((uint32_t)&SCIF->SCIF_PLL[0].SCIF_PLL \
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50 + (4 * pll_id) - (uint32_t)SCIF); \
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53 void pll_config_write(const struct pll_config *cfg, uint32_t pll_id)
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57 Assert(pll_id < NR_PLLS);
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59 flags = cpu_irq_save();
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61 SCIF_UNLOCK_PLL_REG(pll_id);
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62 SCIF->SCIF_PLL[pll_id].SCIF_PLL = cfg->ctrl;
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63 cpu_irq_restore(flags);
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66 void pll_enable(const struct pll_config *cfg, uint32_t pll_id)
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70 Assert(pll_id < NR_PLLS);
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72 flags = cpu_irq_save();
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73 SCIF_UNLOCK_PLL_REG(pll_id);
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74 SCIF->SCIF_PLL[pll_id].SCIF_PLL = cfg->ctrl | SCIF_PLL_PLLEN;
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75 cpu_irq_restore(flags);
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78 void pll_disable(uint32_t pll_id)
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82 Assert(pll_id < NR_PLLS);
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84 flags = cpu_irq_save();
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85 SCIF_UNLOCK_PLL_REG(pll_id);
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86 SCIF->SCIF_PLL[pll_id].SCIF_PLL = 0;
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87 cpu_irq_restore(flags);
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