1 /******************************************************************************
\r
4 * @brief M2351 series DAC driver header file
\r
7 * Copyright (C) 2017 Nuvoton Technology Corp. All rights reserved.
\r
8 *****************************************************************************/
\r
18 /** @addtogroup Standard_Driver Standard Driver
\r
22 /** @addtogroup DAC_Driver DAC Driver
\r
27 /** @addtogroup DAC_EXPORTED_CONSTANTS DAC Exported Constants
\r
31 /*---------------------------------------------------------------------------------------------------------*/
\r
32 /* DAC_CTL Constant Definitions */
\r
33 /*---------------------------------------------------------------------------------------------------------*/
\r
34 #define DAC_CTL_LALIGN_RIGHT_ALIGN (0UL<<DAC_CTL_LALIGN_Pos) /*!< Right alignment. */
\r
35 #define DAC_CTL_LALIGN_LEFT_ALIGN (1UL<<DAC_CTL_LALIGN_Pos) /*!< Left alignment */
\r
37 #define DAC_WRITE_DAT_TRIGGER (0UL) /*!< Write DAC_DAT trigger */
\r
38 #define DAC_SOFTWARE_TRIGGER (0UL|DAC_CTL_TRGEN_Msk) /*!< Software trigger */
\r
39 #define DAC_LOW_LEVEL_TRIGGER ((0UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin low level trigger */
\r
40 #define DAC_HIGH_LEVEL_TRIGGER ((1UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin high level trigger */
\r
41 #define DAC_FALLING_EDGE_TRIGGER ((2UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin falling edge trigger */
\r
42 #define DAC_RISING_EDGE_TRIGGER ((3UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin rising edge trigger */
\r
43 #define DAC_TIMER0_TRIGGER ((2UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 0 trigger */
\r
44 #define DAC_TIMER1_TRIGGER ((3UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 1 trigger */
\r
45 #define DAC_TIMER2_TRIGGER ((4UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 2 trigger */
\r
46 #define DAC_TIMER3_TRIGGER ((5UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 3 trigger */
\r
47 #define DAC_EPWM0_TRIGGER ((6UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< EPWM0 trigger */
\r
48 #define DAC_EPWM1_TRIGGER ((7UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< EPWM1 trigger */
\r
50 #define DAC_TRIGGER_MODE_DISABLE (0UL<<DAC_CTL_TRGEN_Pos) /*!< Trigger mode disable */
\r
51 #define DAC_TRIGGER_MODE_ENABLE (1UL<<DAC_CTL_TRGEN_Pos) /*!< Trigger mode enable */
\r
54 /*@}*/ /* end of group DAC_EXPORTED_CONSTANTS */
\r
57 /** @addtogroup DAC_EXPORTED_FUNCTIONS DAC Exported Functions
\r
60 /*---------------------------------------------------------------------------------------------------------*/
\r
61 /* DAC Macro Definitions */
\r
62 /*---------------------------------------------------------------------------------------------------------*/
\r
65 * @brief Start the D/A conversion.
\r
66 * @param[in] dac The pointer of the specified DAC module.
\r
68 * @details User writes SWTRG bit (DAC_SWTRG[0]) to generate one shot pulse and it is cleared to 0 by hardware automatically.
\r
70 #define DAC_START_CONV(dac) ((dac)->SWTRG = DAC_SWTRG_SWTRG_Msk)
\r
73 * @brief Enable DAC data left-aligned.
\r
74 * @param[in] dac The pointer of the specified DAC module.
\r
76 * @details User has to load data into DAC_DAT[15:4] bits. DAC_DAT[31:16] and DAC_DAT[3:0] are ignored in DAC conversion.
\r
78 #define DAC_ENABLE_LEFT_ALIGN(dac) ((dac)->CTL |= DAC_CTL_LALIGN_Msk)
\r
81 * @brief Enable DAC data right-aligned.
\r
82 * @param[in] dac The pointer of the specified DAC module.
\r
84 * @details User has to load data into DAC_DAT[11:0] bits, DAC_DAT[31:12] are ignored in DAC conversion.
\r
86 #define DAC_ENABLE_RIGHT_ALIGN(dac) ((dac)->CTL &= ~DAC_CTL_LALIGN_Msk)
\r
89 * @brief Enable output voltage buffer.
\r
90 * @param[in] dac The pointer of the specified DAC module.
\r
92 * @details The DAC integrates a voltage output buffer that can be used to reduce output impedance and
\r
93 * drive external loads directly without having to add an external operational amplifier.
\r
95 #define DAC_ENABLE_BYPASS_BUFFER(dac) ((dac)->CTL |= DAC_CTL_BYPASS_Msk)
\r
98 * @brief Disable output voltage buffer.
\r
99 * @param[in] dac The pointer of the specified DAC module.
\r
101 * @details This macro is used to disable output voltage buffer.
\r
103 #define DAC_DISABLE_BYPASS_BUFFER(dac) ((dac)->CTL &= ~DAC_CTL_BYPASS_Msk)
\r
106 * @brief Enable the interrupt.
\r
107 * @param[in] dac The pointer of the specified DAC module.
\r
108 * @param[in] u32Ch Not used in M2351 Series DAC.
\r
110 * @details This macro is used to enable DAC interrupt.
\r
112 #define DAC_ENABLE_INT(dac, u32Ch) ((dac)->CTL |= DAC_CTL_DACIEN_Msk)
\r
115 * @brief Disable the interrupt.
\r
116 * @param[in] dac The pointer of the specified DAC module.
\r
117 * @param[in] u32Ch Not used in M2351 Series DAC.
\r
119 * @details This macro is used to disable DAC interrupt.
\r
121 #define DAC_DISABLE_INT(dac, u32Ch) ((dac)->CTL &= ~DAC_CTL_DACIEN_Msk)
\r
124 * @brief Enable DMA under-run interrupt.
\r
125 * @param[in] dac The pointer of the specified DAC module.
\r
127 * @details This macro is used to enable DMA under-run interrupt.
\r
129 #define DAC_ENABLE_DMAUDR_INT(dac) ((dac)->CTL |= DAC_CTL_DMAURIEN_Msk)
\r
132 * @brief Disable DMA under-run interrupt.
\r
133 * @param[in] dac The pointer of the specified DAC module.
\r
135 * @details This macro is used to disable DMA under-run interrupt.
\r
137 #define DAC_DISABLE_DMAUDR_INT(dac) ((dac)->CTL &= ~DAC_CTL_DMAURIEN_Msk)
\r
140 * @brief Enable PDMA mode.
\r
141 * @param[in] dac The pointer of the specified DAC module.
\r
143 * @details DAC DMA request is generated when a hardware trigger event occurs while DMAEN (DAC_CTL[2]) is set.
\r
145 #define DAC_ENABLE_PDMA(dac) ((dac)->CTL |= DAC_CTL_DMAEN_Msk)
\r
148 * @brief Disable PDMA mode.
\r
149 * @param[in] dac The pointer of the specified DAC module.
\r
151 * @details This macro is used to disable DMA mode.
\r
153 #define DAC_DISABLE_PDMA(dac) ((dac)->CTL &= ~DAC_CTL_DMAEN_Msk)
\r
156 * @brief Write data for conversion.
\r
157 * @param[in] dac The pointer of the specified DAC module.
\r
158 * @param[in] u32Ch Not used in M2351 Series DAC.
\r
159 * @param[in] u32Data Decides the data for conversion, valid range are between 0~0xFFF.
\r
161 * @details 12 bit left alignment: user has to load data into DAC_DAT[15:4] bits.
\r
162 * 12 bit right alignment: user has to load data into DAC_DAT[11:0] bits.
\r
164 #define DAC_WRITE_DATA(dac, u32Ch, u32Data) ((dac)->DAT = (u32Data))
\r
167 * @brief Read DAC 12-bit holding data.
\r
168 * @param[in] dac The pointer of the specified DAC module.
\r
169 * @param[in] u32Ch Not used in M2351 Series DAC.
\r
170 * @return Return DAC 12-bit holding data.
\r
171 * @details This macro is used to read DAC_DAT register.
\r
173 #define DAC_READ_DATA(dac, u32Ch) ((dac)->DAT)
\r
176 * @brief Get the busy state of DAC.
\r
177 * @param[in] dac The pointer of the specified DAC module.
\r
178 * @param[in] u32Ch Not used in M2351 Series DAC.
\r
179 * @retval 0 Idle state.
\r
180 * @retval 1 Busy state.
\r
181 * @details This macro is used to read BUSY bit (DAC_STATUS[8]) to get busy state.
\r
183 #define DAC_IS_BUSY(dac, u32Ch) (((dac)->STATUS & DAC_STATUS_BUSY_Msk) >> DAC_STATUS_BUSY_Pos)
\r
186 * @brief Get the interrupt flag.
\r
187 * @param[in] dac The pointer of the specified DAC module.
\r
188 * @param[in] u32Ch Not used in M2351 Series DAC.
\r
189 * @retval 0 DAC is in conversion state.
\r
190 * @retval 1 DAC conversion finish.
\r
191 * @details This macro is used to read FINISH bit (DAC_STATUS[0]) to get DAC conversion complete finish flag.
\r
193 #define DAC_GET_INT_FLAG(dac, u32Ch) ((dac)->STATUS & DAC_STATUS_FINISH_Msk)
\r
196 * @brief Get the DMA under-run flag.
\r
197 * @param[in] dac The pointer of the specified DAC module.
\r
198 * @retval 0 No DMA under-run error condition occurred.
\r
199 * @retval 1 DMA under-run error condition occurred.
\r
200 * @details This macro is used to read DMAUDR bit (DAC_STATUS[1]) to get DMA under-run state.
\r
202 #define DAC_GET_DMAUDR_FLAG(dac) (((dac)->STATUS & DAC_STATUS_DMAUDR_Msk) >> DAC_STATUS_DMAUDR_Pos)
\r
205 * @brief This macro clear the interrupt status bit.
\r
206 * @param[in] dac The pointer of the specified DAC module.
\r
207 * @param[in] u32Ch Not used in M2351 Series DAC.
\r
209 * @details User writes FINISH bit (DAC_STATUS[0]) to clear DAC conversion complete finish flag.
\r
211 #define DAC_CLR_INT_FLAG(dac, u32Ch) ((dac)->STATUS = DAC_STATUS_FINISH_Msk)
\r
214 * @brief This macro clear the DMA under-run flag.
\r
215 * @param[in] dac The pointer of the specified DAC module.
\r
217 * @details User writes DMAUDR bit (DAC_STATUS[1]) to clear DMA under-run flag.
\r
219 #define DAC_CLR_DMAUDR_FLAG(dac) ((dac)->STATUS = DAC_STATUS_DMAUDR_Msk)
\r
223 * @brief Enable DAC group mode
\r
224 * @param[in] dac The pointer of the specified DAC module.
\r
226 * @note Only DAC0 has this control bit.
\r
229 #define DAC_ENABLE_GROUP_MODE(dac) ((dac)->CTL |= DAC_CTL_GRPEN_Msk)
\r
232 * @brief Disable DAC group mode
\r
233 * @param[in] dac The pointer of the specified DAC module.
\r
235 * @note Only DAC0 has this control bit.
\r
238 #define DAC_DISABLE_GROUP_MODE(dac) ((dac)->CTL &= ~DAC_CTL_GRPEN_Msk)
\r
240 void DAC_Open(DAC_T *dac, uint32_t u32Ch, uint32_t u32TrgSrc);
\r
241 void DAC_Close(DAC_T *dac, uint32_t u32Ch);
\r
242 uint32_t DAC_SetDelayTime(DAC_T *dac, uint32_t u32Delay);
\r
244 /*@}*/ /* end of group DAC_EXPORTED_FUNCTIONS */
\r
246 /*@}*/ /* end of group DAC_Driver */
\r
248 /*@}*/ /* end of group Standard_Driver */
\r
254 #endif /* __DAC_H__ */
\r
256 /*** (C) COPYRIGHT 2017 Nuvoton Technology Corp. ***/
\r