1 /**************************************************************************//**
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4 * @brief M2351 series PDMA driver header file
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7 * Copyright (C) 2017 Nuvoton Technology Corp. All rights reserved.
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8 *****************************************************************************/
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18 /** @addtogroup Standard_Driver Standard Driver
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22 /** @addtogroup PDMA_Driver PDMA Driver
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26 /** @addtogroup PDMA_EXPORTED_CONSTANTS PDMA Exported Constants
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29 #define PDMA_CH_MAX 8UL /*!< Specify Maximum Channels of PDMA \hideinitializer */
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31 /*---------------------------------------------------------------------------------------------------------*/
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32 /* Operation Mode Constant Definitions */
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33 /*---------------------------------------------------------------------------------------------------------*/
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34 #define PDMA_OP_STOP 0x00000000UL /*!<DMA Stop Mode \hideinitializer */
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35 #define PDMA_OP_BASIC 0x00000001UL /*!<DMA Basic Mode \hideinitializer */
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36 #define PDMA_OP_SCATTER 0x00000002UL /*!<DMA Scatter-gather Mode \hideinitializer */
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38 /*---------------------------------------------------------------------------------------------------------*/
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39 /* Data Width Constant Definitions */
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40 /*---------------------------------------------------------------------------------------------------------*/
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41 #define PDMA_WIDTH_8 0x00000000UL /*!<DMA Transfer Width 8-bit \hideinitializer */
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42 #define PDMA_WIDTH_16 0x00001000UL /*!<DMA Transfer Width 16-bit \hideinitializer */
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43 #define PDMA_WIDTH_32 0x00002000UL /*!<DMA Transfer Width 32-bit \hideinitializer */
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45 /*---------------------------------------------------------------------------------------------------------*/
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46 /* Address Attribute Constant Definitions */
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47 /*---------------------------------------------------------------------------------------------------------*/
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48 #define PDMA_SAR_INC 0x00000000UL /*!<DMA SAR increment \hideinitializer */
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49 #define PDMA_SAR_FIX 0x00000300UL /*!<DMA SAR fix address \hideinitializer */
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50 #define PDMA_DAR_INC 0x00000000UL /*!<DMA DAR increment \hideinitializer */
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51 #define PDMA_DAR_FIX 0x00000C00UL /*!<DMA DAR fix address \hideinitializer */
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53 /*---------------------------------------------------------------------------------------------------------*/
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54 /* Burst Mode Constant Definitions */
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55 /*---------------------------------------------------------------------------------------------------------*/
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56 #define PDMA_REQ_SINGLE 0x00000004UL /*!<DMA Single Request \hideinitializer */
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57 #define PDMA_REQ_BURST 0x00000000UL /*!<DMA Burst Request \hideinitializer */
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59 #define PDMA_BURST_128 0x00000000UL /*!<DMA Burst 128 Transfers \hideinitializer */
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60 #define PDMA_BURST_64 0x00000010UL /*!<DMA Burst 64 Transfers \hideinitializer */
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61 #define PDMA_BURST_32 0x00000020UL /*!<DMA Burst 32 Transfers \hideinitializer */
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62 #define PDMA_BURST_16 0x00000030UL /*!<DMA Burst 16 Transfers \hideinitializer */
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63 #define PDMA_BURST_8 0x00000040UL /*!<DMA Burst 8 Transfers \hideinitializer */
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64 #define PDMA_BURST_4 0x00000050UL /*!<DMA Burst 4 Transfers \hideinitializer */
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65 #define PDMA_BURST_2 0x00000060UL /*!<DMA Burst 2 Transfers \hideinitializer */
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66 #define PDMA_BURST_1 0x00000070UL /*!<DMA Burst 1 Transfers \hideinitializer */
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68 /*---------------------------------------------------------------------------------------------------------*/
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69 /* Table Interrupt Disable Constant Definitions */
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70 /*---------------------------------------------------------------------------------------------------------*/
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71 #define PDMA_TBINTDIS_ENABLE (0x0UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Enabled \hideinitializer */
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72 #define PDMA_TBINTDIS_DISABLE (0x1UL<<PDMA_DSCT_CTL_TBINTDIS_Pos) /*!<DMA Table Interrupt Disabled \hideinitializer */
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74 /*---------------------------------------------------------------------------------------------------------*/
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75 /* Peripheral Transfer Mode Constant Definitions */
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76 /*---------------------------------------------------------------------------------------------------------*/
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77 #define PDMA_MEM 0x00000000UL /*!<DMA Connect to Memory \hideinitializer */
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78 #define PDMA_USB_TX 0x00000002UL /*!<DMA Connect to USB TX \hideinitializer */
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79 #define PDMA_USB_RX 0x00000003UL /*!<DMA Connect to USB RX \hideinitializer */
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80 #define PDMA_UART0_TX 0x00000004UL /*!<DMA Connect to UART0 TX \hideinitializer */
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81 #define PDMA_UART0_RX 0x00000005UL /*!<DMA Connect to UART0 RX \hideinitializer */
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82 #define PDMA_UART1_TX 0x00000006UL /*!<DMA Connect to UART1 TX \hideinitializer */
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83 #define PDMA_UART1_RX 0x00000007UL /*!<DMA Connect to UART1 RX \hideinitializer */
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84 #define PDMA_UART2_TX 0x00000008UL /*!<DMA Connect to UART2 TX \hideinitializer */
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85 #define PDMA_UART2_RX 0x00000009UL /*!<DMA Connect to UART2 RX \hideinitializer */
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86 #define PDMA_UART3_TX 0x0000000AUL /*!<DMA Connect to UART3 TX \hideinitializer */
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87 #define PDMA_UART3_RX 0x0000000BUL /*!<DMA Connect to UART3 RX \hideinitializer */
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88 #define PDMA_UART4_TX 0x0000000CUL /*!<DMA Connect to UART4 TX \hideinitializer */
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89 #define PDMA_UART4_RX 0x0000000DUL /*!<DMA Connect to UART4 RX \hideinitializer */
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90 #define PDMA_UART5_TX 0x0000000EUL /*!<DMA Connect to UART5 TX \hideinitializer */
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91 #define PDMA_UART5_RX 0x0000000FUL /*!<DMA Connect to UART5 RX \hideinitializer */
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92 #define PDMA_USCI0_TX 0x00000010UL /*!<DMA Connect to USCI0 TX \hideinitializer */
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93 #define PDMA_USCI0_RX 0x00000011UL /*!<DMA Connect to USCI0 RX \hideinitializer */
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94 #define PDMA_USCI1_TX 0x00000012UL /*!<DMA Connect to USCI1 TX \hideinitializer */
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95 #define PDMA_USCI1_RX 0x00000013UL /*!<DMA Connect to USCI1 RX \hideinitializer */
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96 #define PDMA_QSPI0_TX 0x00000014UL /*!<DMA Connect to QSPI0 TX \hideinitializer */
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97 #define PDMA_QSPI0_RX 0x00000015UL /*!<DMA Connect to QSPI0 RX \hideinitializer */
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98 #define PDMA_SPI0_TX 0x00000016UL /*!<DMA Connect to SPI0 TX \hideinitializer */
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99 #define PDMA_SPI0_RX 0x00000017UL /*!<DMA Connect to SPI0 RX \hideinitializer */
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100 #define PDMA_SPI1_TX 0x00000018UL /*!<DMA Connect to SPI1 TX \hideinitializer */
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101 #define PDMA_SPI1_RX 0x00000019UL /*!<DMA Connect to SPI1 RX \hideinitializer */
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102 #define PDMA_SPI2_TX 0x0000001AUL /*!<DMA Connect to SPI2 TX \hideinitializer */
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103 #define PDMA_SPI2_RX 0x0000001BUL /*!<DMA Connect to SPI2 RX \hideinitializer */
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104 #define PDMA_SPI3_TX 0x0000001CUL /*!<DMA Connect to SPI3 TX \hideinitializer */
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105 #define PDMA_SPI3_RX 0x0000001DUL /*!<DMA Connect to SPI3 RX \hideinitializer */
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106 #define PDMA_EPWM0_P1_RX 0x00000020UL /*!<DMA Connect to EPWM0 P1 RX \hideinitializer */
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107 #define PDMA_EPWM0_P2_RX 0x00000021UL /*!<DMA Connect to EPWM0 P2 RX \hideinitializer */
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108 #define PDMA_EPWM0_P3_RX 0x00000022UL /*!<DMA Connect to EPWM0 P3 RX \hideinitializer */
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109 #define PDMA_EPWM1_P1_RX 0x00000023UL /*!<DMA Connect to EPWM1 P1 RX \hideinitializer */
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110 #define PDMA_EPWM1_P2_RX 0x00000024UL /*!<DMA Connect to EPWM1 P2 RX \hideinitializer */
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111 #define PDMA_EPWM1_P3_RX 0x00000025UL /*!<DMA Connect to EPWM1 P3 RX \hideinitializer */
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112 #define PDMA_I2C0_TX 0x00000026UL /*!<DMA Connect to I2C0 TX \hideinitializer */
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113 #define PDMA_I2C0_RX 0x00000027UL /*!<DMA Connect to I2C0 RX \hideinitializer */
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114 #define PDMA_I2C1_TX 0x00000028UL /*!<DMA Connect to I2C1 TX \hideinitializer */
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115 #define PDMA_I2C1_RX 0x00000029UL /*!<DMA Connect to I2C1 RX \hideinitializer */
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116 #define PDMA_I2C2_TX 0x0000002AUL /*!<DMA Connect to I2C2 TX \hideinitializer */
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117 #define PDMA_I2C2_RX 0x0000002BUL /*!<DMA Connect to I2C2 RX \hideinitializer */
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118 #define PDMA_I2S0_TX 0x0000002CUL /*!<DMA Connect to I2S0 TX \hideinitializer */
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119 #define PDMA_I2S0_RX 0x0000002DUL /*!<DMA Connect to I2S0 RX \hideinitializer */
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120 #define PDMA_TMR0 0x0000002EUL /*!<DMA Connect to TMR0 \hideinitializer */
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121 #define PDMA_TMR1 0x0000002FUL /*!<DMA Connect to TMR1 \hideinitializer */
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122 #define PDMA_TMR2 0x00000030UL /*!<DMA Connect to TMR2 \hideinitializer */
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123 #define PDMA_TMR3 0x00000031UL /*!<DMA Connect to TMR3 \hideinitializer */
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124 #define PDMA_ADC_RX 0x00000032UL /*!<DMA Connect to ADC RX \hideinitializer */
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125 #define PDMA_DAC0_TX 0x00000033UL /*!<DMA Connect to DAC0 TX \hideinitializer */
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126 #define PDMA_DAC1_TX 0x00000034UL /*!<DMA Connect to DAC1 TX \hideinitializer */
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127 #define PDMA_EPWM0_CH0_TX 0x00000035UL /*!<DMA Connect to EPWM0 CH0 TX \hideinitializer */
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128 #define PDMA_EPWM0_CH1_TX 0x00000036UL /*!<DMA Connect to EPWM0 CH1 TX \hideinitializer */
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129 #define PDMA_EPWM0_CH2_TX 0x00000037UL /*!<DMA Connect to EPWM0 CH2 TX \hideinitializer */
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130 #define PDMA_EPWM0_CH3_TX 0x00000038UL /*!<DMA Connect to EPWM0 CH3 TX \hideinitializer */
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131 #define PDMA_EPWM0_CH4_TX 0x00000039UL /*!<DMA Connect to EPWM0 CH4 TX \hideinitializer */
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132 #define PDMA_EPWM0_CH5_TX 0x0000003AUL /*!<DMA Connect to EPWM0 CH5 TX \hideinitializer */
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133 #define PDMA_EPWM1_CH0_TX 0x0000003BUL /*!<DMA Connect to EPWM1 CH0 TX \hideinitializer */
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134 #define PDMA_EPWM1_CH1_TX 0x0000003CUL /*!<DMA Connect to EPWM1 CH1 TX \hideinitializer */
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135 #define PDMA_EPWM1_CH2_TX 0x0000003DUL /*!<DMA Connect to EPWM1 CH2 TX \hideinitializer */
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136 #define PDMA_EPWM1_CH3_TX 0x0000003EUL /*!<DMA Connect to EPWM1 CH3 TX \hideinitializer */
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137 #define PDMA_EPWM1_CH4_TX 0x0000003FUL /*!<DMA Connect to EPWM1 CH4 TX \hideinitializer */
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138 #define PDMA_EPWM1_CH5_TX 0x00000040UL /*!<DMA Connect to EPWM1 CH5 TX \hideinitializer */
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140 /*---------------------------------------------------------------------------------------------------------*/
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141 /* Interrupt Type Constant Definitions */
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142 /*---------------------------------------------------------------------------------------------------------*/
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143 #define PDMA_INT_TRANS_DONE 0x00000000UL /*!<Transfer Done Interrupt \hideinitializer */
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144 #define PDMA_INT_TABLE 0x00000001UL /*!<Table Interrupt \hideinitializer */
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145 #define PDMA_INT_TIMEOUT 0x00000002UL /*!<Timeout Interrupt \hideinitializer */
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146 #define PDMA_INT_ALIGN 0x00000003UL /*!<Transfer Alignment Interrupt \hideinitializer */
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149 /*@}*/ /* end of group PDMA_EXPORTED_CONSTANTS */
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151 /** @addtogroup PDMA_EXPORTED_FUNCTIONS PDMA Exported Functions
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156 * @brief Get PDMA Interrupt Status
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158 * @param[in] pdma The pointer of the specified PDMA module
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162 * @details This macro gets the interrupt status.
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164 #define PDMA_GET_INT_STATUS(pdma) ((uint32_t)((pdma)->INTSTS))
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167 * @brief Get Transfer Done Interrupt Status
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169 * @param[in] pdma The pointer of the specified PDMA module
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173 * @details Get the transfer done Interrupt status.
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175 #define PDMA_GET_TD_STS(pdma) ((uint32_t)((pdma)->TDSTS))
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178 * @brief Clear Transfer Done Interrupt Status
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180 * @param[in] pdma The pointer of the specified PDMA module
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181 * @param[in] u32Mask The channel mask
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185 * @details Clear the transfer done Interrupt status.
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187 #define PDMA_CLR_TD_FLAG(pdma, u32Mask) ((uint32_t)((pdma)->TDSTS = (u32Mask)))
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190 * @brief Get Target Abort Interrupt Status
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192 * @param[in] pdma The pointer of the specified PDMA module
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196 * @details Get the target abort Interrupt status.
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198 #define PDMA_GET_ABORT_STS(pdma) ((uint32_t)((pdma)->ABTSTS))
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201 * @brief Clear Target Abort Interrupt Status
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203 * @param[in] pdma The pointer of the specified PDMA module
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204 * @param[in] u32Mask The channel mask
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208 * @details Clear the target abort Interrupt status.
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210 #define PDMA_CLR_ABORT_FLAG(pdma, u32Mask) ((uint32_t)((pdma)->ABTSTS = (u32Mask)))
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213 * @brief Get PDMA Transfer Alignment Status
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215 * @param[in] pdma The pointer of the specified PDMA module
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219 * @details Get the PDMA transfer alignment status.
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221 #define PDMA_GET_ALIGN_STS(pdma) ((uint32_t)((pdma)->ALIGN))
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224 * @brief Clear PDMA Transfer Alignment Interrupt Status
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226 * @param[in] pdma The pointer of the specified PDMA module
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227 * @param[in] u32Mask The channel mask
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231 * @details Clear the PDMA transfer alignment Interrupt status.
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233 #define PDMA_CLR_ALIGN_FLAG(pdma, u32Mask) ((uint32_t)((pdma)->ALIGN = (u32Mask)))
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236 * @brief Clear Timeout Interrupt Status
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238 * @param[in] pdma The pointer of the specified PDMA module
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239 * @param[in] u32Ch The selected channel
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243 * @details Clear the selected channel timeout interrupt status.
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244 * @note This function is only supported in channel 0 and channel 1.
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246 #define PDMA_CLR_TMOUT_FLAG(pdma, u32Ch) ((uint32_t)((pdma)->INTSTS = (1UL << ((u32Ch) + 8UL))))
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249 * @brief Check Channel Status
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251 * @param[in] pdma The pointer of the specified PDMA module
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252 * @param[in] u32Ch The selected channel
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254 * @retval 0 Idle state
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255 * @retval 1 Busy state
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257 * @details Check the selected channel is busy or not.
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259 #define PDMA_IS_CH_BUSY(pdma, u32Ch) ((uint32_t)((pdma)->TRGSTS & (1UL << (u32Ch)))? 1 : 0)
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262 * @brief Set Source Address
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264 * @param[in] pdma The pointer of the specified PDMA module
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265 * @param[in] u32Ch The selected channel
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266 * @param[in] u32Addr The selected address
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270 * @details This macro set the selected channel source address.
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272 #define PDMA_SET_SRC_ADDR(pdma, u32Ch, u32Addr) ((uint32_t)((pdma)->DSCT[(u32Ch)].SA = (u32Addr)))
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275 * @brief Set Destination Address
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277 * @param[in] pdma The pointer of the specified PDMA module
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278 * @param[in] u32Ch The selected channel
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279 * @param[in] u32Addr The selected address
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283 * @details This macro set the selected channel destination address.
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285 #define PDMA_SET_DST_ADDR(pdma, u32Ch, u32Addr) ((uint32_t)((pdma)->DSCT[(u32Ch)].DA = (u32Addr)))
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288 * @brief Set Transfer Count
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290 * @param[in] pdma The pointer of the specified PDMA module
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291 * @param[in] u32Ch The selected channel
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292 * @param[in] u32TransCount Transfer Count
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296 * @details This macro set the selected channel transfer count.
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298 #define PDMA_SET_TRANS_CNT(pdma, u32Ch, u32TransCount) ((uint32_t)((pdma)->DSCT[(u32Ch)].CTL=((pdma)->DSCT[(u32Ch)].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|(((u32TransCount)-1UL) << PDMA_DSCT_CTL_TXCNT_Pos)))
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301 * @brief Set Scatter-gather descriptor Address
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303 * @param[in] pdma The pointer of the specified PDMA module
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304 * @param[in] u32Ch The selected channel
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305 * @param[in] u32Addr The descriptor address
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309 * @details This macro set the selected channel scatter-gather descriptor address.
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311 #define PDMA_SET_SCATTER_DESC(pdma, u32Ch, u32Addr) ((uint32_t)((pdma)->DSCT[(u32Ch)].NEXT = (u32Addr) - ((pdma)->SCATBA)))
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314 * @brief Stop the channel
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316 * @param[in] pdma The pointer of the specified PDMA module
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317 * @param[in] u32Ch The selected channel
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321 * @details This macro stop the selected channel.
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323 #define PDMA_STOP(pdma, u32Ch) ((uint32_t)((pdma)->PAUSE = (1UL << (u32Ch))))
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326 * @brief Pause the channel
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328 * @param[in] pdma The pointer of the specified PDMA module
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329 * @param[in] u32Ch The selected channel
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333 * @details This macro pause the selected channel.
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335 #define PDMA_PAUSE(pdma, u32Ch) ((uint32_t)((pdma)->PAUSE = (1UL << (u32Ch))))
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338 * @brief Reset the channel
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340 * @param[in] pdma The pointer of the specified PDMA module
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341 * @param[in] u32Ch The selected channel
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345 * @details This macro reset the selected channel.
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347 #define PDMA_RESET(pdma, u32Ch) ((uint32_t)((pdma)->CHRST = (1UL << (u32Ch))))
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349 /*---------------------------------------------------------------------------------------------------------*/
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350 /* Define PWM functions prototype */
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351 /*---------------------------------------------------------------------------------------------------------*/
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352 void PDMA_Open(PDMA_T *pdma, uint32_t u32Mask);
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353 void PDMA_Close(PDMA_T *pdma);
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354 void PDMA_SetTransferCnt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount);
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355 void PDMA_SetStride(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32DestLen, uint32_t u32SrcLen, uint32_t u32TransCount);
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356 void PDMA_SetTransferAddr(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
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357 void PDMA_SetTransferMode(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
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358 void PDMA_SetBurstType(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize);
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359 void PDMA_EnableTimeout(PDMA_T *pdma, uint32_t u32Mask);
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360 void PDMA_DisableTimeout(PDMA_T *pdma, uint32_t u32Mask);
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361 void PDMA_SetTimeOut(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt);
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362 void PDMA_Trigger(PDMA_T *pdma, uint32_t u32Ch);
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363 void PDMA_EnableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask);
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364 void PDMA_DisableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask);
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367 /*@}*/ /* end of group PDMA_EXPORTED_FUNCTIONS */
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369 /*@}*/ /* end of group PDMA_Driver */
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371 /*@}*/ /* end of group Standard_Driver */
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377 #endif /* __PDMA_H__ */
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379 /*** (C) COPYRIGHT 2017 Nuvoton Technology Corp. ***/
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