1 /**************************************************************************//**
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4 * @brief M2351 series I2S driver source file
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6 * @copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
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7 *****************************************************************************/
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10 #include "NuMicro.h"
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12 /** @addtogroup Standard_Driver Standard Driver
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16 /** @addtogroup I2S_Driver I2S Driver
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20 /** @addtogroup I2S_EXPORTED_FUNCTIONS I2S Exported Functions
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24 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s);
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27 * @brief This function is used to get I2S source clock frequency.
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28 * @param[in] i2s The base address of I2S module.
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29 * @return I2S source clock frequency (Hz).
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30 * @details Return the source clock frequency according to the setting of I2S0_SEL (CLK_CLKSEL3[17:16]).
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32 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
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34 uint32_t u32Freq, u32ClkSrcSel;
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36 u32ClkSrcSel = CLK_GetModuleClockSource(I2S0_MODULE) << CLK_CLKSEL3_I2S0SEL_Pos;
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38 switch(u32ClkSrcSel)
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40 case CLK_CLKSEL3_I2S0SEL_HXT:
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44 case CLK_CLKSEL3_I2S0SEL_PLL:
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45 u32Freq = CLK_GetPLLClockFreq();
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48 case CLK_CLKSEL3_I2S0SEL_HIRC:
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52 case CLK_CLKSEL3_I2S0SEL_PCLK0:
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53 u32Freq = CLK_GetPCLK0Freq();
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65 * @brief This function configures some parameters of I2S interface for general purpose use.
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66 * @param[in] i2s The base address of I2S module.
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67 * @param[in] u32MasterSlave I2S operation mode. Valid values are:
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68 * - \ref I2S_MODE_MASTER
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69 * - \ref I2S_MODE_SLAVE
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70 * @param[in] u32SampleRate Sample rate
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71 * @param[in] u32WordWidth Data length. Valid values are:
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72 * - \ref I2S_DATABIT_8
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73 * - \ref I2S_DATABIT_16
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74 * - \ref I2S_DATABIT_24
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75 * - \ref I2S_DATABIT_32
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76 * @param[in] u32MonoData: Set audio data to mono or not. Valid values are:
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77 * - \ref I2S_ENABLE_MONO
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78 * - \ref I2S_DISABLE_MONO
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79 * @param[in] u32DataFormat Data format. This is also used to select I2S or PCM(TDM) function. Valid values are:
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80 * - \ref I2S_FORMAT_I2S
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81 * - \ref I2S_FORMAT_I2S_MSB
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82 * - \ref I2S_FORMAT_I2S_LSB
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83 * - \ref I2S_FORMAT_PCM
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84 * - \ref I2S_FORMAT_PCM_MSB
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85 * - \ref I2S_FORMAT_PCM_LSB
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86 * @return Real sample rate.
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87 * @details Set TX and RX FIFO threshold to middle value.
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88 * The sample rate may not be used from the parameter, it depends on system's clock settings,
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89 * but real sample rate used by system will be returned for reference.
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90 * @note I2S will be reset in initialization only for Secure.
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92 uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32MonoData, uint32_t u32DataFormat)
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94 uint16_t u16Divider;
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95 uint32_t u32BitRate, u32SrcClk;
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97 if(!(__PC() & (1UL << 28UL)))
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100 SYS->IPRST1 |= SYS_IPRST1_I2S0RST_Msk;
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101 SYS->IPRST1 &= ~SYS_IPRST1_I2S0RST_Msk;
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104 /* Configure I2S controller according to input parameters. */
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105 i2s->CTL0 = u32MasterSlave | u32WordWidth | u32MonoData | u32DataFormat | I2S_FIFO_TX_LEVEL_WORD_8 | I2S_FIFO_RX_LEVEL_WORD_8;
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107 /* Get I2S source clock frequency */
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108 u32SrcClk = I2S_GetSourceClockFreq(i2s);
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110 /* Calculate bit clock rate */
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111 u32BitRate = u32SampleRate * (((u32WordWidth >> 4UL) & 0x3UL) + 1UL) * 16UL;
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112 u16Divider = (uint16_t)((((((u32SrcClk * 10UL) / u32BitRate) >> 1UL) + 5UL) / 10UL) - 1UL); /* Round to the nearest integer */
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113 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLKDIV_Msk) | ((uint32_t)u16Divider << 8UL);
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115 /* Calculate real sample rate */
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116 u32BitRate = u32SrcClk / (((uint32_t)u16Divider + 1UL) * 2UL);
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117 u32SampleRate = u32BitRate / ((((u32WordWidth >> 4UL) & 0x3UL) + 1UL) * 16UL);
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119 /* Enable I2S controller */
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120 i2s->CTL0 |= I2S_CTL0_I2SEN_Msk;
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122 return u32SampleRate;
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126 * @brief Disable I2S function.
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127 * @param[in] i2s The base address of I2S module.
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129 * @details Clear I2SEN (I2S_CTL0[0]) to disable I2S function.
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131 void I2S_Close(I2S_T *i2s)
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133 i2s->CTL0 &= ~I2S_CTL0_I2SEN_Msk;
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137 * @brief Enable interrupt function.
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138 * @param[in] i2s The base address of I2S module.
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139 * @param[in] u32Mask The combination of all related interrupt enable bits.
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140 * Each bit corresponds to a interrupt bit.
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142 * @details This function enables the interrupt according to the mask parameter.
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144 void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
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146 i2s->IEN |= u32Mask;
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150 * @brief Disable interrupt function.
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151 * @param[in] i2s The base address of I2S module.
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152 * @param[in] u32Mask The combination of all related interrupt enable bits.
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153 * Each bit corresponds to a interrupt bit.
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155 * @details This function disables the interrupt according to the mask parameter.
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157 void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
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159 i2s->IEN &= ~u32Mask;
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163 * @brief Enable master clock (MCLK).
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164 * @param[in] i2s The base address of I2S module.
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165 * @param[in] u32BusClock The target MCLK clock.
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166 * @return Actual MCLK clock
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167 * @details Set the master clock rate according to u32BusClock parameter and enable master clock output.
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168 * The actual master clock rate may be different from the target master clock rate. The real master clock rate will be returned for reference.
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170 uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
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173 uint32_t u32SrcClk, u32Reg, u32Clock;
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175 u32SrcClk = I2S_GetSourceClockFreq(i2s);
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176 if(u32BusClock == u32SrcClk)
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178 u8Divider = (uint8_t)0UL;
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182 u8Divider = (uint8_t)(u32SrcClk / u32BusClock) >> 1UL;
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185 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLKDIV_Msk) | u8Divider;
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187 i2s->CTL0 |= I2S_CTL0_MCLKEN_Msk;
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189 u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLKDIV_Msk;
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193 u32Clock = u32SrcClk;
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197 u32Clock = ((u32SrcClk >> 1UL) / u32Reg);
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204 * @brief Disable master clock (MCLK).
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205 * @param[in] i2s The base address of I2S module.
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207 * @details Disable master clock output.
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209 void I2S_DisableMCLK(I2S_T *i2s)
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211 i2s->CTL0 &= ~I2S_CTL0_MCLKEN_Msk;
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215 * @brief Configure FIFO threshold setting.
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216 * @param[in] i2s The pointer of the specified I2S module.
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217 * @param[in] u32TxThreshold Decides the TX FIFO threshold. It could be 0 ~ 15.
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218 * @param[in] u32RxThreshold Decides the RX FIFO threshold. It could be 0 ~ 15.
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220 * @details Set TX FIFO threshold and RX FIFO threshold configurations.
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222 void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
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224 i2s->CTL1 = (i2s->CTL1 & ~(I2S_CTL1_TXTH_Msk | I2S_CTL1_RXTH_Msk)) |
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225 (u32TxThreshold << I2S_CTL1_TXTH_Pos) |
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226 (u32RxThreshold << I2S_CTL1_RXTH_Pos);
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230 * @brief Configure PCM(TDM) function parameters, such as channel width, channel number and sync pulse width
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231 * @param[in] i2s The pointer of the specified I2S module.
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232 * @param[in] u32ChannelWidth Channel width. Valid values are:
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233 * - \ref I2S_TDM_WIDTH_8BIT
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234 * - \ref I2S_TDM_WIDTH_16BIT
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235 * - \ref I2S_TDM_WIDTH_24BIT
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236 * - \ref I2S_TDM_WIDTH_32BIT
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237 * @param[in] u32ChannelNum Channel number. Valid values are:
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238 * - \ref I2S_TDM_2CH
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239 * - \ref I2S_TDM_4CH
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240 * - \ref I2S_TDM_6CH
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241 * - \ref I2S_TDM_8CH
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242 * @param[in] u32SyncWidth Width for sync pulse. Valid values are:
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243 * - \ref I2S_TDM_SYNC_ONE_BCLK
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244 * - \ref I2S_TDM_SYNC_ONE_CHANNEL
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246 * @details Set TX FIFO threshold and RX FIFO threshold configurations.
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248 void I2S_ConfigureTDM(I2S_T *i2s, uint32_t u32ChannelWidth, uint32_t u32ChannelNum, uint32_t u32SyncWidth)
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250 i2s->CTL0 = (i2s->CTL0 & ~(I2S_CTL0_TDMCHNUM_Msk | I2S_CTL0_CHWIDTH_Msk | I2S_CTL0_PCMSYNC_Msk)) |
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251 (u32ChannelWidth << I2S_CTL0_CHWIDTH_Pos) |
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252 (u32ChannelNum << I2S_CTL0_TDMCHNUM_Pos) |
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253 (u32SyncWidth << I2S_CTL0_PCMSYNC_Pos);
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256 /*@}*/ /* end of group I2S_EXPORTED_FUNCTIONS */
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258 /*@}*/ /* end of group I2S_Driver */
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260 /*@}*/ /* end of group Standard_Driver */
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262 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
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