2 ******************************************************************************
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3 * @file stm32l1xx_hal_flash_ex.h
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4 * @author MCD Application Team
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5 * @brief Header file of Flash HAL Extended module.
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6 ******************************************************************************
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9 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
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10 * All rights reserved.</center></h2>
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12 * This software component is licensed by ST under BSD 3-Clause license,
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13 * the "License"; You may not use this file except in compliance with the
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14 * License. You may obtain a copy of the License at:
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15 * opensource.org/licenses/BSD-3-Clause
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17 ******************************************************************************
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20 /* Define to prevent recursive inclusion -------------------------------------*/
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21 #ifndef __STM32L1xx_HAL_FLASH_EX_H
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22 #define __STM32L1xx_HAL_FLASH_EX_H
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28 /* Includes ------------------------------------------------------------------*/
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29 #include "stm32l1xx_hal_def.h"
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31 /** @addtogroup STM32L1xx_HAL_Driver
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35 /** @addtogroup FLASHEx
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39 /** @addtogroup FLASHEx_Private_Constants
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42 #if defined(FLASH_SR_RDERR) && defined(FLASH_SR_OPTVERRUSR)
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44 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
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45 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
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46 FLASH_FLAG_OPTVERRUSR | FLASH_FLAG_RDERR)
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48 #elif defined(FLASH_SR_RDERR)
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50 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
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51 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
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54 #elif defined(FLASH_SR_OPTVERRUSR)
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56 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
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57 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
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58 FLASH_FLAG_OPTVERRUSR)
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62 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
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63 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR)
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65 #endif /* FLASH_SR_RDERR & FLASH_SR_OPTVERRUSR */
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67 #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \
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68 || defined(STM32L151xBA) || defined(STM32L152xBA)
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70 /******* Devices with FLASH 128K *******/
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71 #define FLASH_NBPAGES_MAX 512U /* 512 pages from page 0 to page 511U */
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73 #elif defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
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74 || defined(STM32L151xCA) || defined(STM32L152xCA) || defined(STM32L162xCA)
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76 /******* Devices with FLASH 256K *******/
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77 #define FLASH_NBPAGES_MAX 1025U /* 1025 pages from page 0 to page 1024U */
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79 #elif defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
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80 || defined(STM32L162xD) || defined(STM32L162xDX)
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82 /******* Devices with FLASH 384K *******/
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83 #define FLASH_NBPAGES_MAX 1536U /* 1536 pages from page 0 to page 1535U */
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85 #elif defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
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87 /******* Devices with FLASH 512K *******/
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88 #define FLASH_NBPAGES_MAX 2048U /* 2048 pages from page 0 to page 2047U */
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90 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */
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92 #define WRP_MASK_LOW (0x0000FFFFU)
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93 #define WRP_MASK_HIGH (0xFFFF0000U)
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99 /** @addtogroup FLASHEx_Private_Macros
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103 #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES))
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105 #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
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107 #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == OB_WRPSTATE_DISABLE) || \
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108 ((__VALUE__) == OB_WRPSTATE_ENABLE))
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110 #define IS_OB_WRP(__PAGE__) (((__PAGE__) != 0x0000000U))
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112 #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0) ||\
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113 ((__LEVEL__) == OB_RDP_LEVEL_1) ||\
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114 ((__LEVEL__) == OB_RDP_LEVEL_2))
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116 #define IS_OB_BOR_LEVEL(__LEVEL__) (((__LEVEL__) == OB_BOR_OFF) || \
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117 ((__LEVEL__) == OB_BOR_LEVEL1) || \
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118 ((__LEVEL__) == OB_BOR_LEVEL2) || \
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119 ((__LEVEL__) == OB_BOR_LEVEL3) || \
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120 ((__LEVEL__) == OB_BOR_LEVEL4) || \
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121 ((__LEVEL__) == OB_BOR_LEVEL5))
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123 #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW))
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125 #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST))
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127 #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST))
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129 #if defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2)
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131 #define IS_OBEX(__VALUE__) (((__VALUE__) == OPTIONBYTE_PCROP) || ((__VALUE__) == OPTIONBYTE_BOOTCONFIG))
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133 #elif defined(FLASH_OBR_SPRMOD) && !defined(FLASH_OBR_nRST_BFB2)
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135 #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_PCROP)
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137 #elif !defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2)
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139 #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_BOOTCONFIG)
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141 #endif /* FLASH_OBR_SPRMOD && FLASH_OBR_nRST_BFB2 */
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143 #if defined(FLASH_OBR_SPRMOD)
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145 #define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == OB_PCROP_STATE_DISABLE) || \
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146 ((__VALUE__) == OB_PCROP_STATE_ENABLE))
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148 #define IS_OB_PCROP(__PAGE__) (((__PAGE__) != 0x0000000U))
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149 #endif /* FLASH_OBR_SPRMOD */
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151 #if defined(FLASH_OBR_nRST_BFB2)
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153 #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1))
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155 #endif /* FLASH_OBR_nRST_BFB2 */
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157 #define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEERASEDATA_BYTE) || \
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158 ((__VALUE__) == FLASH_TYPEERASEDATA_HALFWORD) || \
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159 ((__VALUE__) == FLASH_TYPEERASEDATA_WORD))
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160 #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE) || \
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161 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \
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162 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD) || \
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163 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTBYTE) || \
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164 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTHALFWORD) || \
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165 ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTWORD))
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168 /** @defgroup FLASHEx_Address FLASHEx Address
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172 #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END))
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174 #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \
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175 || defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L100xC) || defined(STM32L151xC) \
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176 || defined(STM32L152xC) || defined(STM32L162xC) || defined(STM32L151xCA) || defined(STM32L152xCA) \
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177 || defined(STM32L162xCA)
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179 #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END))
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181 #else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
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183 #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
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184 #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END))
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185 #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
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187 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || (...) || STM32L151xCA || STM32L152xCA || STM32L162xCA */
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189 #define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1U) && ((__PAGES__) <= FLASH_NBPAGES_MAX))
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198 /* Exported types ------------------------------------------------------------*/
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200 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
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205 * @brief FLASH Erase structure definition
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209 uint32_t TypeErase; /*!< TypeErase: Page Erase only.
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210 This parameter can be a value of @ref FLASHEx_Type_Erase */
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212 uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased
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213 This parameter must be a value belonging to FLASH Programm address (depending on the devices) */
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215 uint32_t NbPages; /*!< NbPages: Number of pages to be erased.
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216 This parameter must be a value between 1 and (max number of pages - value of Initial page)*/
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218 } FLASH_EraseInitTypeDef;
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221 * @brief FLASH Option Bytes PROGRAM structure definition
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225 uint32_t OptionType; /*!< OptionType: Option byte to be configured.
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226 This parameter can be a value of @ref FLASHEx_Option_Type */
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228 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
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229 This parameter can be a value of @ref FLASHEx_WRP_State */
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231 uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31
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232 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */
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234 #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
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235 || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \
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236 || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \
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237 || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
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238 uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63
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239 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */
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240 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L151xE || STM32L152xE || STM32L162xE */
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242 #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
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243 || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \
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244 || defined(STM32L162xE)
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245 uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95
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246 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */
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247 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
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249 #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \
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250 || defined(STM32L152xDX) || defined(STM32L162xDX)
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251 uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127 or
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252 Sectors 96 to 111 for STM32L1xxxDX devices.
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253 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */
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254 #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */
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256 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.
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257 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
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259 uint8_t BORLevel; /*!< BORLevel: Set the BOR Level.
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260 This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */
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262 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
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263 This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog,
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264 @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/
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265 } FLASH_OBProgramInitTypeDef;
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267 #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2)
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269 * @brief FLASH Advanced Option Bytes Program structure definition
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273 uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension .
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274 This parameter can be a value of @ref FLASHEx_OptionAdv_Type */
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276 #if defined(FLASH_OBR_SPRMOD)
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277 uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation.
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278 This parameter can be a value of @ref FLASHEx_PCROP_State */
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280 uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP
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281 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */
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283 #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC)
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284 uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP
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285 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */
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286 #endif /* STM32L151xC || STM32L152xC || STM32L162xC */
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287 #endif /* FLASH_OBR_SPRMOD */
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289 #if defined(FLASH_OBR_nRST_BFB2)
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290 uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config
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291 This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */
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292 #endif /* FLASH_OBR_nRST_BFB2*/
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293 } FLASH_AdvOBProgramInitTypeDef;
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298 #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */
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300 /* Exported constants --------------------------------------------------------*/
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303 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
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307 /** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase
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310 #define FLASH_TYPEERASE_PAGES (0x00U) /*!<Page erase only*/
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316 /** @defgroup FLASHEx_Option_Type FLASHEx Option Type
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319 #define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/
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320 #define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/
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321 #define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/
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322 #define OPTIONBYTE_BOR (0x08U) /*!<BOR option byte configuration*/
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328 /** @defgroup FLASHEx_WRP_State FLASHEx WRP State
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331 #define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired sectors*/
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332 #define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired sectors*/
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338 /** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1
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342 /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
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343 #define OB_WRP1_PAGES0TO15 (0x00000001U) /* Write protection of Sector0 */
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344 #define OB_WRP1_PAGES16TO31 (0x00000002U) /* Write protection of Sector1 */
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345 #define OB_WRP1_PAGES32TO47 (0x00000004U) /* Write protection of Sector2 */
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346 #define OB_WRP1_PAGES48TO63 (0x00000008U) /* Write protection of Sector3 */
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347 #define OB_WRP1_PAGES64TO79 (0x00000010U) /* Write protection of Sector4 */
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348 #define OB_WRP1_PAGES80TO95 (0x00000020U) /* Write protection of Sector5 */
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349 #define OB_WRP1_PAGES96TO111 (0x00000040U) /* Write protection of Sector6 */
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350 #define OB_WRP1_PAGES112TO127 (0x00000080U) /* Write protection of Sector7 */
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351 #define OB_WRP1_PAGES128TO143 (0x00000100U) /* Write protection of Sector8 */
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352 #define OB_WRP1_PAGES144TO159 (0x00000200U) /* Write protection of Sector9 */
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353 #define OB_WRP1_PAGES160TO175 (0x00000400U) /* Write protection of Sector10 */
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354 #define OB_WRP1_PAGES176TO191 (0x00000800U) /* Write protection of Sector11 */
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355 #define OB_WRP1_PAGES192TO207 (0x00001000U) /* Write protection of Sector12 */
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356 #define OB_WRP1_PAGES208TO223 (0x00002000U) /* Write protection of Sector13 */
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357 #define OB_WRP1_PAGES224TO239 (0x00004000U) /* Write protection of Sector14 */
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358 #define OB_WRP1_PAGES240TO255 (0x00008000U) /* Write protection of Sector15 */
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359 #define OB_WRP1_PAGES256TO271 (0x00010000U) /* Write protection of Sector16 */
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360 #define OB_WRP1_PAGES272TO287 (0x00020000U) /* Write protection of Sector17 */
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361 #define OB_WRP1_PAGES288TO303 (0x00040000U) /* Write protection of Sector18 */
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362 #define OB_WRP1_PAGES304TO319 (0x00080000U) /* Write protection of Sector19 */
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363 #define OB_WRP1_PAGES320TO335 (0x00100000U) /* Write protection of Sector20 */
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364 #define OB_WRP1_PAGES336TO351 (0x00200000U) /* Write protection of Sector21 */
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365 #define OB_WRP1_PAGES352TO367 (0x00400000U) /* Write protection of Sector22 */
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366 #define OB_WRP1_PAGES368TO383 (0x00800000U) /* Write protection of Sector23 */
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367 #define OB_WRP1_PAGES384TO399 (0x01000000U) /* Write protection of Sector24 */
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368 #define OB_WRP1_PAGES400TO415 (0x02000000U) /* Write protection of Sector25 */
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369 #define OB_WRP1_PAGES416TO431 (0x04000000U) /* Write protection of Sector26 */
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370 #define OB_WRP1_PAGES432TO447 (0x08000000U) /* Write protection of Sector27 */
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371 #define OB_WRP1_PAGES448TO463 (0x10000000U) /* Write protection of Sector28 */
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372 #define OB_WRP1_PAGES464TO479 (0x20000000U) /* Write protection of Sector29 */
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373 #define OB_WRP1_PAGES480TO495 (0x40000000U) /* Write protection of Sector30 */
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374 #define OB_WRP1_PAGES496TO511 (0x80000000U) /* Write protection of Sector31 */
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376 #define OB_WRP1_ALLPAGES ((uint32_t)FLASH_WRPR1_WRP) /*!< Write protection of all Sectors */
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382 #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
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383 || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \
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384 || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \
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385 || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
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387 /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2
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391 /* Pages for Cat3, Cat4 & Cat5 devices*/
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392 #define OB_WRP2_PAGES512TO527 (0x00000001U) /* Write protection of Sector32 */
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393 #define OB_WRP2_PAGES528TO543 (0x00000002U) /* Write protection of Sector33 */
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394 #define OB_WRP2_PAGES544TO559 (0x00000004U) /* Write protection of Sector34 */
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395 #define OB_WRP2_PAGES560TO575 (0x00000008U) /* Write protection of Sector35 */
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396 #define OB_WRP2_PAGES576TO591 (0x00000010U) /* Write protection of Sector36 */
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397 #define OB_WRP2_PAGES592TO607 (0x00000020U) /* Write protection of Sector37 */
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398 #define OB_WRP2_PAGES608TO623 (0x00000040U) /* Write protection of Sector38 */
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399 #define OB_WRP2_PAGES624TO639 (0x00000080U) /* Write protection of Sector39 */
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400 #define OB_WRP2_PAGES640TO655 (0x00000100U) /* Write protection of Sector40 */
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401 #define OB_WRP2_PAGES656TO671 (0x00000200U) /* Write protection of Sector41 */
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402 #define OB_WRP2_PAGES672TO687 (0x00000400U) /* Write protection of Sector42 */
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403 #define OB_WRP2_PAGES688TO703 (0x00000800U) /* Write protection of Sector43 */
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404 #define OB_WRP2_PAGES704TO719 (0x00001000U) /* Write protection of Sector44 */
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405 #define OB_WRP2_PAGES720TO735 (0x00002000U) /* Write protection of Sector45 */
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406 #define OB_WRP2_PAGES736TO751 (0x00004000U) /* Write protection of Sector46 */
\r
407 #define OB_WRP2_PAGES752TO767 (0x00008000U) /* Write protection of Sector47 */
\r
409 #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
\r
410 || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L152xCA) || defined(STM32L152xD) \
\r
411 || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L152xE) \
\r
412 || defined(STM32L162xE)
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414 #define OB_WRP2_PAGES768TO783 (0x00010000U) /* Write protection of Sector48 */
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415 #define OB_WRP2_PAGES784TO799 (0x00020000U) /* Write protection of Sector49 */
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416 #define OB_WRP2_PAGES800TO815 (0x00040000U) /* Write protection of Sector50 */
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417 #define OB_WRP2_PAGES816TO831 (0x00080000U) /* Write protection of Sector51 */
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418 #define OB_WRP2_PAGES832TO847 (0x00100000U) /* Write protection of Sector52 */
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419 #define OB_WRP2_PAGES848TO863 (0x00200000U) /* Write protection of Sector53 */
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420 #define OB_WRP2_PAGES864TO879 (0x00400000U) /* Write protection of Sector54 */
\r
421 #define OB_WRP2_PAGES880TO895 (0x00800000U) /* Write protection of Sector55 */
\r
422 #define OB_WRP2_PAGES896TO911 (0x01000000U) /* Write protection of Sector56 */
\r
423 #define OB_WRP2_PAGES912TO927 (0x02000000U) /* Write protection of Sector57 */
\r
424 #define OB_WRP2_PAGES928TO943 (0x04000000U) /* Write protection of Sector58 */
\r
425 #define OB_WRP2_PAGES944TO959 (0x08000000U) /* Write protection of Sector59 */
\r
426 #define OB_WRP2_PAGES960TO975 (0x10000000U) /* Write protection of Sector60 */
\r
427 #define OB_WRP2_PAGES976TO991 (0x20000000U) /* Write protection of Sector61 */
\r
428 #define OB_WRP2_PAGES992TO1007 (0x40000000U) /* Write protection of Sector62 */
\r
429 #define OB_WRP2_PAGES1008TO1023 (0x80000000U) /* Write protection of Sector63 */
\r
431 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
\r
433 #define OB_WRP2_ALLPAGES ((uint32_t)FLASH_WRPR2_WRP) /*!< Write protection of all Sectors */
\r
439 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xDX || STM32L152xE || STM32L162xE */
\r
441 #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
\r
442 || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \
\r
443 || defined(STM32L162xE)
\r
445 /** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3
\r
449 /* Pages for devices with FLASH >= 256KB*/
\r
450 #define OB_WRP3_PAGES1024TO1039 (0x00000001U) /* Write protection of Sector64 */
\r
451 #define OB_WRP3_PAGES1040TO1055 (0x00000002U) /* Write protection of Sector65 */
\r
452 #define OB_WRP3_PAGES1056TO1071 (0x00000004U) /* Write protection of Sector66 */
\r
453 #define OB_WRP3_PAGES1072TO1087 (0x00000008U) /* Write protection of Sector67 */
\r
454 #define OB_WRP3_PAGES1088TO1103 (0x00000010U) /* Write protection of Sector68 */
\r
455 #define OB_WRP3_PAGES1104TO1119 (0x00000020U) /* Write protection of Sector69 */
\r
456 #define OB_WRP3_PAGES1120TO1135 (0x00000040U) /* Write protection of Sector70 */
\r
457 #define OB_WRP3_PAGES1136TO1151 (0x00000080U) /* Write protection of Sector71 */
\r
458 #define OB_WRP3_PAGES1152TO1167 (0x00000100U) /* Write protection of Sector72 */
\r
459 #define OB_WRP3_PAGES1168TO1183 (0x00000200U) /* Write protection of Sector73 */
\r
460 #define OB_WRP3_PAGES1184TO1199 (0x00000400U) /* Write protection of Sector74 */
\r
461 #define OB_WRP3_PAGES1200TO1215 (0x00000800U) /* Write protection of Sector75 */
\r
462 #define OB_WRP3_PAGES1216TO1231 (0x00001000U) /* Write protection of Sector76 */
\r
463 #define OB_WRP3_PAGES1232TO1247 (0x00002000U) /* Write protection of Sector77 */
\r
464 #define OB_WRP3_PAGES1248TO1263 (0x00004000U) /* Write protection of Sector78 */
\r
465 #define OB_WRP3_PAGES1264TO1279 (0x00008000U) /* Write protection of Sector79 */
\r
466 #define OB_WRP3_PAGES1280TO1295 (0x00010000U) /* Write protection of Sector80 */
\r
467 #define OB_WRP3_PAGES1296TO1311 (0x00020000U) /* Write protection of Sector81 */
\r
468 #define OB_WRP3_PAGES1312TO1327 (0x00040000U) /* Write protection of Sector82 */
\r
469 #define OB_WRP3_PAGES1328TO1343 (0x00080000U) /* Write protection of Sector83 */
\r
470 #define OB_WRP3_PAGES1344TO1359 (0x00100000U) /* Write protection of Sector84 */
\r
471 #define OB_WRP3_PAGES1360TO1375 (0x00200000U) /* Write protection of Sector85 */
\r
472 #define OB_WRP3_PAGES1376TO1391 (0x00400000U) /* Write protection of Sector86 */
\r
473 #define OB_WRP3_PAGES1392TO1407 (0x00800000U) /* Write protection of Sector87 */
\r
474 #define OB_WRP3_PAGES1408TO1423 (0x01000000U) /* Write protection of Sector88 */
\r
475 #define OB_WRP3_PAGES1424TO1439 (0x02000000U) /* Write protection of Sector89 */
\r
476 #define OB_WRP3_PAGES1440TO1455 (0x04000000U) /* Write protection of Sector90 */
\r
477 #define OB_WRP3_PAGES1456TO1471 (0x08000000U) /* Write protection of Sector91 */
\r
478 #define OB_WRP3_PAGES1472TO1487 (0x10000000U) /* Write protection of Sector92 */
\r
479 #define OB_WRP3_PAGES1488TO1503 (0x20000000U) /* Write protection of Sector93 */
\r
480 #define OB_WRP3_PAGES1504TO1519 (0x40000000U) /* Write protection of Sector94 */
\r
481 #define OB_WRP3_PAGES1520TO1535 (0x80000000U) /* Write protection of Sector95 */
\r
483 #define OB_WRP3_ALLPAGES ((uint32_t)FLASH_WRPR3_WRP) /*!< Write protection of all Sectors */
\r
489 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/
\r
491 #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \
\r
492 || defined(STM32L152xDX) || defined(STM32L162xDX)
\r
494 /** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4
\r
498 /* Pages for Cat5 devices*/
\r
499 #define OB_WRP4_PAGES1536TO1551 (0x00000001U)/* Write protection of Sector96*/
\r
500 #define OB_WRP4_PAGES1552TO1567 (0x00000002U)/* Write protection of Sector97*/
\r
501 #define OB_WRP4_PAGES1568TO1583 (0x00000004U)/* Write protection of Sector98*/
\r
502 #define OB_WRP4_PAGES1584TO1599 (0x00000008U)/* Write protection of Sector99*/
\r
503 #define OB_WRP4_PAGES1600TO1615 (0x00000010U) /* Write protection of Sector100*/
\r
504 #define OB_WRP4_PAGES1616TO1631 (0x00000020U) /* Write protection of Sector101*/
\r
505 #define OB_WRP4_PAGES1632TO1647 (0x00000040U) /* Write protection of Sector102*/
\r
506 #define OB_WRP4_PAGES1648TO1663 (0x00000080U) /* Write protection of Sector103*/
\r
507 #define OB_WRP4_PAGES1664TO1679 (0x00000100U) /* Write protection of Sector104*/
\r
508 #define OB_WRP4_PAGES1680TO1695 (0x00000200U) /* Write protection of Sector105*/
\r
509 #define OB_WRP4_PAGES1696TO1711 (0x00000400U) /* Write protection of Sector106*/
\r
510 #define OB_WRP4_PAGES1712TO1727 (0x00000800U) /* Write protection of Sector107*/
\r
511 #define OB_WRP4_PAGES1728TO1743 (0x00001000U) /* Write protection of Sector108*/
\r
512 #define OB_WRP4_PAGES1744TO1759 (0x00002000U) /* Write protection of Sector109*/
\r
513 #define OB_WRP4_PAGES1760TO1775 (0x00004000U) /* Write protection of Sector110*/
\r
514 #define OB_WRP4_PAGES1776TO1791 (0x00008000U) /* Write protection of Sector111*/
\r
516 #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
\r
518 #define OB_WRP4_PAGES1792TO1807 (0x00010000U) /* Write protection of Sector112*/
\r
519 #define OB_WRP4_PAGES1808TO1823 (0x00020000U) /* Write protection of Sector113*/
\r
520 #define OB_WRP4_PAGES1824TO1839 (0x00040000U) /* Write protection of Sector114*/
\r
521 #define OB_WRP4_PAGES1840TO1855 (0x00080000U) /* Write protection of Sector115*/
\r
522 #define OB_WRP4_PAGES1856TO1871 (0x00100000U) /* Write protection of Sector116*/
\r
523 #define OB_WRP4_PAGES1872TO1887 (0x00200000U) /* Write protection of Sector117*/
\r
524 #define OB_WRP4_PAGES1888TO1903 (0x00400000U) /* Write protection of Sector118*/
\r
525 #define OB_WRP4_PAGES1904TO1919 (0x00800000U) /* Write protection of Sector119*/
\r
526 #define OB_WRP4_PAGES1920TO1935 (0x01000000U) /* Write protection of Sector120*/
\r
527 #define OB_WRP4_PAGES1936TO1951 (0x02000000U) /* Write protection of Sector121*/
\r
528 #define OB_WRP4_PAGES1952TO1967 (0x04000000U) /* Write protection of Sector122*/
\r
529 #define OB_WRP4_PAGES1968TO1983 (0x08000000U) /* Write protection of Sector123*/
\r
530 #define OB_WRP4_PAGES1984TO1999 (0x10000000U) /* Write protection of Sector124*/
\r
531 #define OB_WRP4_PAGES2000TO2015 (0x20000000U) /* Write protection of Sector125*/
\r
532 #define OB_WRP4_PAGES2016TO2031 (0x40000000U) /* Write protection of Sector126*/
\r
533 #define OB_WRP4_PAGES2032TO2047 (0x80000000U) /* Write protection of Sector127*/
\r
535 #endif /* STM32L151xE || STM32L152xE || STM32L162xE */
\r
537 #define OB_WRP4_ALLPAGES ((uint32_t)FLASH_WRPR4_WRP) /*!< Write protection of all Sectors */
\r
543 #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */
\r
545 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection
\r
548 #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
\r
549 #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU)
\r
550 #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /* Warning: When enabling read protection level 2
\r
551 it is no more possible to go back to level 1 or 0 */
\r
557 /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level
\r
561 #define OB_BOR_OFF ((uint8_t)0x00U) /*!< BOR is disabled at power down, the reset is asserted when the VDD
\r
562 power supply reaches the PDR(Power Down Reset) threshold (1.5V) */
\r
563 #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */
\r
564 #define OB_BOR_LEVEL2 ((uint8_t)0x09U) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */
\r
565 #define OB_BOR_LEVEL3 ((uint8_t)0x0AU) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */
\r
566 #define OB_BOR_LEVEL4 ((uint8_t)0x0BU) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */
\r
567 #define OB_BOR_LEVEL5 ((uint8_t)0x0CU) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */
\r
573 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog
\r
577 #define OB_IWDG_SW ((uint8_t)0x10U) /*!< Software WDG selected */
\r
578 #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware WDG selected */
\r
584 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP
\r
588 #define OB_STOP_NORST ((uint8_t)0x20U) /*!< No reset generated when entering in STOP */
\r
589 #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */
\r
594 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY
\r
598 #define OB_STDBY_NORST ((uint8_t)0x40U) /*!< No reset generated when entering in STANDBY */
\r
599 #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */
\r
605 #if defined(FLASH_OBR_SPRMOD)
\r
607 /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
\r
611 #define OPTIONBYTE_PCROP (0x01U) /*!<PCROP option byte configuration*/
\r
617 #endif /* FLASH_OBR_SPRMOD */
\r
619 #if defined(FLASH_OBR_nRST_BFB2)
\r
621 /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
\r
625 #define OPTIONBYTE_BOOTCONFIG (0x02U) /*!<BOOTConfig option byte configuration*/
\r
631 #endif /* FLASH_OBR_nRST_BFB2 */
\r
633 #if defined(FLASH_OBR_SPRMOD)
\r
635 /** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State
\r
638 #define OB_PCROP_STATE_DISABLE (0x00U) /*!<Disable PCROP for selected sectors */
\r
639 #define OB_PCROP_STATE_ENABLE (0x01U) /*!<Enable PCROP for selected sectors */
\r
645 /** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode
\r
648 #define OB_PCROP_DESELECTED ((uint16_t)0x0000U) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */
\r
649 #define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */
\r
654 #endif /* FLASH_OBR_SPRMOD */
\r
656 #if defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L151xC) || defined(STM32L152xC) \
\r
657 || defined(STM32L162xC)
\r
658 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1
\r
662 /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
\r
663 #define OB_PCROP1_PAGES0TO15 (0x00000001U) /* PC Read/Write protection of Sector0 */
\r
664 #define OB_PCROP1_PAGES16TO31 (0x00000002U) /* PC Read/Write protection of Sector1 */
\r
665 #define OB_PCROP1_PAGES32TO47 (0x00000004U) /* PC Read/Write protection of Sector2 */
\r
666 #define OB_PCROP1_PAGES48TO63 (0x00000008U) /* PC Read/Write protection of Sector3 */
\r
667 #define OB_PCROP1_PAGES64TO79 (0x00000010U) /* PC Read/Write protection of Sector4 */
\r
668 #define OB_PCROP1_PAGES80TO95 (0x00000020U) /* PC Read/Write protection of Sector5 */
\r
669 #define OB_PCROP1_PAGES96TO111 (0x00000040U) /* PC Read/Write protection of Sector6 */
\r
670 #define OB_PCROP1_PAGES112TO127 (0x00000080U) /* PC Read/Write protection of Sector7 */
\r
671 #define OB_PCROP1_PAGES128TO143 (0x00000100U) /* PC Read/Write protection of Sector8 */
\r
672 #define OB_PCROP1_PAGES144TO159 (0x00000200U) /* PC Read/Write protection of Sector9 */
\r
673 #define OB_PCROP1_PAGES160TO175 (0x00000400U) /* PC Read/Write protection of Sector10 */
\r
674 #define OB_PCROP1_PAGES176TO191 (0x00000800U) /* PC Read/Write protection of Sector11 */
\r
675 #define OB_PCROP1_PAGES192TO207 (0x00001000U) /* PC Read/Write protection of Sector12 */
\r
676 #define OB_PCROP1_PAGES208TO223 (0x00002000U) /* PC Read/Write protection of Sector13 */
\r
677 #define OB_PCROP1_PAGES224TO239 (0x00004000U) /* PC Read/Write protection of Sector14 */
\r
678 #define OB_PCROP1_PAGES240TO255 (0x00008000U) /* PC Read/Write protection of Sector15 */
\r
679 #define OB_PCROP1_PAGES256TO271 (0x00010000U) /* PC Read/Write protection of Sector16 */
\r
680 #define OB_PCROP1_PAGES272TO287 (0x00020000U) /* PC Read/Write protection of Sector17 */
\r
681 #define OB_PCROP1_PAGES288TO303 (0x00040000U) /* PC Read/Write protection of Sector18 */
\r
682 #define OB_PCROP1_PAGES304TO319 (0x00080000U) /* PC Read/Write protection of Sector19 */
\r
683 #define OB_PCROP1_PAGES320TO335 (0x00100000U) /* PC Read/Write protection of Sector20 */
\r
684 #define OB_PCROP1_PAGES336TO351 (0x00200000U) /* PC Read/Write protection of Sector21 */
\r
685 #define OB_PCROP1_PAGES352TO367 (0x00400000U) /* PC Read/Write protection of Sector22 */
\r
686 #define OB_PCROP1_PAGES368TO383 (0x00800000U) /* PC Read/Write protection of Sector23 */
\r
687 #define OB_PCROP1_PAGES384TO399 (0x01000000U) /* PC Read/Write protection of Sector24 */
\r
688 #define OB_PCROP1_PAGES400TO415 (0x02000000U) /* PC Read/Write protection of Sector25 */
\r
689 #define OB_PCROP1_PAGES416TO431 (0x04000000U) /* PC Read/Write protection of Sector26 */
\r
690 #define OB_PCROP1_PAGES432TO447 (0x08000000U) /* PC Read/Write protection of Sector27 */
\r
691 #define OB_PCROP1_PAGES448TO463 (0x10000000U) /* PC Read/Write protection of Sector28 */
\r
692 #define OB_PCROP1_PAGES464TO479 (0x20000000U) /* PC Read/Write protection of Sector29 */
\r
693 #define OB_PCROP1_PAGES480TO495 (0x40000000U) /* PC Read/Write protection of Sector30 */
\r
694 #define OB_PCROP1_PAGES496TO511 (0x80000000U) /* PC Read/Write protection of Sector31 */
\r
696 #define OB_PCROP1_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */
\r
701 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
\r
703 #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC)
\r
705 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2
\r
709 /* Pages for Cat3, Cat4 & Cat5 devices*/
\r
710 #define OB_PCROP2_PAGES512TO527 (0x00000001U) /* PC Read/Write protection of Sector32 */
\r
711 #define OB_PCROP2_PAGES528TO543 (0x00000002U) /* PC Read/Write protection of Sector33 */
\r
712 #define OB_PCROP2_PAGES544TO559 (0x00000004U) /* PC Read/Write protection of Sector34 */
\r
713 #define OB_PCROP2_PAGES560TO575 (0x00000008U) /* PC Read/Write protection of Sector35 */
\r
714 #define OB_PCROP2_PAGES576TO591 (0x00000010U) /* PC Read/Write protection of Sector36 */
\r
715 #define OB_PCROP2_PAGES592TO607 (0x00000020U) /* PC Read/Write protection of Sector37 */
\r
716 #define OB_PCROP2_PAGES608TO623 (0x00000040U) /* PC Read/Write protection of Sector38 */
\r
717 #define OB_PCROP2_PAGES624TO639 (0x00000080U) /* PC Read/Write protection of Sector39 */
\r
718 #define OB_PCROP2_PAGES640TO655 (0x00000100U) /* PC Read/Write protection of Sector40 */
\r
719 #define OB_PCROP2_PAGES656TO671 (0x00000200U) /* PC Read/Write protection of Sector41 */
\r
720 #define OB_PCROP2_PAGES672TO687 (0x00000400U) /* PC Read/Write protection of Sector42 */
\r
721 #define OB_PCROP2_PAGES688TO703 (0x00000800U) /* PC Read/Write protection of Sector43 */
\r
722 #define OB_PCROP2_PAGES704TO719 (0x00001000U) /* PC Read/Write protection of Sector44 */
\r
723 #define OB_PCROP2_PAGES720TO735 (0x00002000U) /* PC Read/Write protection of Sector45 */
\r
724 #define OB_PCROP2_PAGES736TO751 (0x00004000U) /* PC Read/Write protection of Sector46 */
\r
725 #define OB_PCROP2_PAGES752TO767 (0x00008000U) /* PC Read/Write protection of Sector47 */
\r
726 #define OB_PCROP2_PAGES768TO783 (0x00010000U) /* PC Read/Write protection of Sector48 */
\r
727 #define OB_PCROP2_PAGES784TO799 (0x00020000U) /* PC Read/Write protection of Sector49 */
\r
728 #define OB_PCROP2_PAGES800TO815 (0x00040000U) /* PC Read/Write protection of Sector50 */
\r
729 #define OB_PCROP2_PAGES816TO831 (0x00080000U) /* PC Read/Write protection of Sector51 */
\r
730 #define OB_PCROP2_PAGES832TO847 (0x00100000U) /* PC Read/Write protection of Sector52 */
\r
731 #define OB_PCROP2_PAGES848TO863 (0x00200000U) /* PC Read/Write protection of Sector53 */
\r
732 #define OB_PCROP2_PAGES864TO879 (0x00400000U) /* PC Read/Write protection of Sector54 */
\r
733 #define OB_PCROP2_PAGES880TO895 (0x00800000U) /* PC Read/Write protection of Sector55 */
\r
734 #define OB_PCROP2_PAGES896TO911 (0x01000000U) /* PC Read/Write protection of Sector56 */
\r
735 #define OB_PCROP2_PAGES912TO927 (0x02000000U) /* PC Read/Write protection of Sector57 */
\r
736 #define OB_PCROP2_PAGES928TO943 (0x04000000U) /* PC Read/Write protection of Sector58 */
\r
737 #define OB_PCROP2_PAGES944TO959 (0x08000000U) /* PC Read/Write protection of Sector59 */
\r
738 #define OB_PCROP2_PAGES960TO975 (0x10000000U) /* PC Read/Write protection of Sector60 */
\r
739 #define OB_PCROP2_PAGES976TO991 (0x20000000U) /* PC Read/Write protection of Sector61 */
\r
740 #define OB_PCROP2_PAGES992TO1007 (0x40000000U) /* PC Read/Write protection of Sector62 */
\r
741 #define OB_PCROP2_PAGES1008TO1023 (0x80000000U) /* PC Read/Write protection of Sector63 */
\r
743 #define OB_PCROP2_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */
\r
748 #endif /* STM32L151xC || STM32L152xC || STM32L162xC */
\r
750 /** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data
\r
753 #define FLASH_TYPEERASEDATA_BYTE (0x00U) /*!<Erase byte (8-bit) at a specified address.*/
\r
754 #define FLASH_TYPEERASEDATA_HALFWORD (0x01U) /*!<Erase a half-word (16-bit) at a specified address.*/
\r
755 #define FLASH_TYPEERASEDATA_WORD (0x02U) /*!<Erase a word (32-bit) at a specified address.*/
\r
761 /** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data
\r
764 #define FLASH_TYPEPROGRAMDATA_BYTE (0x00U) /*!<Program byte (8-bit) at a specified address.*/
\r
765 #define FLASH_TYPEPROGRAMDATA_HALFWORD (0x01U) /*!<Program a half-word (16-bit) at a specified address.*/
\r
766 #define FLASH_TYPEPROGRAMDATA_WORD (0x02U) /*!<Program a word (32-bit) at a specified address.*/
\r
767 #define FLASH_TYPEPROGRAMDATA_FASTBYTE (0x04U) /*!<Fast Program byte (8-bit) at a specified address.*/
\r
768 #define FLASH_TYPEPROGRAMDATA_FASTHALFWORD (0x08U) /*!<Fast Program a half-word (16-bit) at a specified address.*/
\r
769 #define FLASH_TYPEPROGRAMDATA_FASTWORD (0x10U) /*!<Fast Program a word (32-bit) at a specified address.*/
\r
775 #if defined(FLASH_OBR_nRST_BFB2)
\r
777 /** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT
\r
781 #define OB_BOOT_BANK2 ((uint8_t)0x00U) /*!< At startup, if boot pins are set in boot from user Flash position
\r
782 and this parameter is selected the device will boot from Bank 2
\r
783 or Bank 1, depending on the activation of the bank */
\r
784 #define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16U)) /*!< At startup, if boot pins are set in boot from user Flash position
\r
785 and this parameter is selected the device will boot from Bank1(Default) */
\r
790 #endif /* FLASH_OBR_nRST_BFB2 */
\r
796 /* Exported macro ------------------------------------------------------------*/
\r
798 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
\r
803 * @brief Set the FLASH Latency.
\r
804 * @param __LATENCY__ FLASH Latency
\r
805 * This parameter can be one of the following values:
\r
806 * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle
\r
807 * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle
\r
810 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \
\r
811 if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \
\r
812 MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \
\r
816 * @brief Get the FLASH Latency.
\r
817 * @retval FLASH Latency
\r
818 * This parameter can be one of the following values:
\r
819 * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle
\r
820 * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle
\r
822 #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
\r
825 * @brief Enable the FLASH 64-bit access.
\r
826 * @note Read access 64 bit is used.
\r
827 * @note This bit cannot be written at the same time as the LATENCY and
\r
831 #define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64))
\r
834 * @brief Disable the FLASH 64-bit access.
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835 * @note Read access 32 bit is used
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836 * @note To reset this bit, the LATENCY should be zero wait state and the
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840 #define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64))
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843 * @brief Enable the FLASH prefetch buffer.
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846 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \
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847 SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \
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851 * @brief Disable the FLASH prefetch buffer.
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854 #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN)
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857 * @brief Enable the FLASH power down during Sleep mode
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860 #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
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863 * @brief Disable the FLASH power down during Sleep mode
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866 #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
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869 * @brief Enable the Flash Run power down mode.
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870 * @note Writing this bit to 0 this bit, automatically the keys are
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871 * loss and a new unlock sequence is necessary to re-write it to 1.
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873 #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
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874 FLASH->PDKEYR = FLASH_PDKEY2; \
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875 SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
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879 * @brief Disable the Flash Run power down mode.
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880 * @note Writing this bit to 0 this bit, automatically the keys are
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881 * loss and a new unlock sequence is necessary to re-write it to 1.
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883 #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
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884 FLASH->PDKEYR = FLASH_PDKEY2; \
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885 CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
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892 /* Exported functions --------------------------------------------------------*/
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894 /** @addtogroup FLASHEx_Exported_Functions
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898 /** @addtogroup FLASHEx_Exported_Functions_Group1
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902 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
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903 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
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909 /** @addtogroup FLASHEx_Exported_Functions_Group2
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913 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
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914 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
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916 #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2)
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918 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
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919 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
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921 #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */
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923 #if defined(FLASH_OBR_SPRMOD)
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925 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
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926 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
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928 #endif /* FLASH_OBR_SPRMOD */
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934 /** @addtogroup FLASHEx_Exported_Functions_Group3
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938 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void);
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939 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void);
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941 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address);
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942 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
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943 void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void);
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944 void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void);
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966 #endif /* __STM32L1xx_HAL_FLASH_EX_H */
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968 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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