2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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32 >>>NOTE<<< The modification to the GPL is included to allow you to
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33 distribute a combined work that includes FreeRTOS without being obliged to
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34 provide the source code for proprietary components outside of the FreeRTOS
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35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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38 more details. You should have received a copy of the GNU General Public
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39 License and the FreeRTOS license exception along with FreeRTOS; if not it
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40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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41 by writing to Richard Barry, contact details for whom are available on the
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46 ***************************************************************************
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48 * Having a problem? Start by reading the FAQ "My application does *
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49 * not run, what could be wrong?" *
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51 * http://www.FreeRTOS.org/FAQHelp.html *
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53 ***************************************************************************
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56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
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57 and contact details.
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59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool.
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62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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63 the code with commercial support, indemnification, and middleware, under
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64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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65 provide a safety engineered and independently SIL3 certified version under
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66 the SafeRTOS brand: http://www.SafeRTOS.com.
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70 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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73 The implementation provided in this file is intended to demonstrate using
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74 queues to pass data into and out of interrupts, and to demonstrate context
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75 switching from inside an interrupt service routine. It is *not* intended to
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76 represent an efficient implementation. Real implementations should not pass
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77 individual characters on queues, but instead use RAM buffers, DMA and/or
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78 FIFO features as appropriate. Semaphores can be used to signal a task that
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79 data is available to be processed.
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82 /* Scheduler includes. */
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83 #include "FreeRTOS.h"
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87 /* Demo application includes. */
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90 /*-----------------------------------------------------------*/
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92 /* Registers required to configure the SCI. */
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93 #define serialSCI_GCR0_REG ( * ( ( volatile unsigned long * ) 0xFFF7E400 ) )
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94 #define serialSCI_GCR1_REG ( * ( ( volatile unsigned long * ) 0xFFF7E404 ) )
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95 #define serialSCI_GCR2_REG ( * ( ( volatile unsigned long * ) 0xFFF7E408 ) )
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96 #define serialSCI_SETINT_REG ( * ( ( volatile unsigned long * ) 0xFFF7E40C ) )
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97 #define serialSCI_CLRINT_REG ( * ( ( volatile unsigned long * ) 0xFFF7E410 ) )
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98 #define serialSCI_SETINTLVL_REG ( * ( ( volatile unsigned long * ) 0xFFF7E414 ) )
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99 #define serialSCI_CLRINTLVL_REG ( * ( ( volatile unsigned long * ) 0xFFF7E418 ) )
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100 #define serialSCI_FLR_REG ( * ( ( volatile unsigned long * ) 0xFFF7E41C ) )
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101 #define serialSCI_INTVEC0_REG ( * ( ( volatile unsigned long * ) 0xFFF7E420 ) )
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102 #define serialSCI_INTVEC1_REG ( * ( ( volatile unsigned long * ) 0xFFF7E424 ) )
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103 #define serialSCI_LENGTH_REG ( * ( ( volatile unsigned long * ) 0xFFF7E428 ) )
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104 #define serialSCI_BAUD_REG ( * ( ( volatile unsigned long * ) 0xFFF7E42C ) )
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105 #define serialSCI_RD_REG ( * ( ( volatile unsigned long * ) 0xFFF7E434 ) )
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106 #define serialSCI_TD_REG ( * ( ( volatile unsigned long * ) 0xFFF7E438 ) )
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107 #define serialSCI_FUN_REG ( * ( ( volatile unsigned long * ) 0xFFF7E43C ) )
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108 #define serialSCI_DIR_REG ( * ( ( volatile unsigned long * ) 0xFFF7E440 ) )
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109 #define serialSCI_DIN_REG ( * ( ( volatile unsigned long * ) 0xFFF7E444 ) )
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110 #define serialSCI_DOUT_REG ( * ( ( volatile unsigned long * ) 0xFFF7E448 ) )
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111 #define serialSCI_DSET_REG ( * ( ( volatile unsigned long * ) 0xFFF7E44C ) )
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112 #define serialSCI_DCLR_REG ( * ( ( volatile unsigned long * ) 0xFFF7E450 ) )
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114 /* SCI constants */
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115 #define serialSCI_FE_INT ( 0x04000000 ) /* framming error */
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116 #define serialSCI_OE_INT ( 0x02000000 ) /* overrun error */
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117 #define serialSCI_PE_INT ( 0x01000000 ) /* parity error */
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118 #define serialSCI_RX_INT ( 0x00000200 ) /* receive buffer ready */
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119 #define serialSCI_TX_INT ( 0x00000100 ) /* transmit buffer ready */
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120 #define serialSCI_WAKE_INT ( 0x00000002 ) /* wakeup */
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121 #define serialSCI_BREAK_INT ( 0x00000001 ) /* break detect */
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122 #define serialSCI_IDLE_FLG ( 0x00000004 ) /* IDLE flasg */
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124 /* Registers required to configure the VIM. */
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125 #define serialVIM_REQMASKSET0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFE30 ) )
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126 #define serialVIM_SCIHINT_RAM ( * ( ( void (**)(void) ) 0xFFF82038 ) )
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129 /*-----------------------------------------------------------*/
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131 /* Misc defines. */
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132 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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133 #define serNO_BLOCK ( ( portTickType ) 0 )
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134 #define serTX_BLOCK_TIME ( 40 / portTICK_RATE_MS )
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136 /*-----------------------------------------------------------*/
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138 /* The queue used to hold received characters. */
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139 static xQueueHandle xRxedChars = NULL;
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140 static xQueueHandle xCharsForTx = NULL;
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142 /*-----------------------------------------------------------*/
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144 /* UART interrupt handler. */
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145 __interrupt void vSCIInterruptHandler( void );
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147 /*-----------------------------------------------------------*/
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150 * See the serial2.h header file.
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152 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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154 xComPortHandle xReturn = ( xComPortHandle ) 0;
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156 /* unused parameters, demo has a fixed baud rate (19200) */
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157 ( void ) ulWantedBaud;
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159 /* Create the queues used to hold Rx/Tx characters. */
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160 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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161 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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163 /* If the queue/semaphore was created correctly then setup the serial port
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165 if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
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167 /* Initalise SCI1 */
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168 /* Bring SCI out of reset */
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169 serialSCI_GCR0_REG = 0x00000001UL;
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170 /* Disable all interrupts */
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171 serialSCI_CLRINT_REG = 0xFFFFFFFFUL;
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172 /* All Interrupt to SCI High Level */
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173 serialSCI_CLRINTLVL_REG = 0xFFFFFFFFUL;
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174 /* Global control 1 */
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175 serialSCI_GCR1_REG = 0x03010032UL;
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177 serialSCI_BAUD_REG = 292;
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178 /* Transmission length (8-bit) */
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179 serialSCI_LENGTH_REG = 8 - 1;
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180 /* Set SCI pins functional mode */
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181 serialSCI_FUN_REG = 0x00000006UL;
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182 /* Enable RX interrupt */
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183 serialSCI_SETINT_REG = 0x00000200UL;
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184 /* Finally start SCI1 */
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185 serialSCI_GCR1_REG |= 0x00000080UL;
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187 /* Setup interrupt routine address in VIM table */
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188 serialVIM_SCIHINT_RAM = &vSCIInterruptHandler;
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189 /* Enable SCI interrupt in VIM */
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190 serialVIM_REQMASKSET0_REG = 0x00002000UL;
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193 /* This demo file only supports a single port but we have to return
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194 something to comply with the standard demo header file. */
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197 /*-----------------------------------------------------------*/
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199 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
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201 /* The port handle is not required as this driver only supports one port. */
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204 /* Get the next character from the buffer. Return false if no characters
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205 are available, or arrive before xBlockTime expires. */
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206 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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215 /*-----------------------------------------------------------*/
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217 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned portSHORT usStringLength )
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219 signed char *pxNext;
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221 /* A couple of parameters that this port does not use. */
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222 ( void ) usStringLength;
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224 /* NOTE: This implementation does not handle the queue being full as no
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225 block time is used! */
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227 /* Send each character in the string, one at a time. */
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228 pxNext = ( signed char * ) pcString;
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231 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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235 /*-----------------------------------------------------------*/
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237 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
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239 signed portBASE_TYPE xReturn;
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241 /* check if we are already transmitting */
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242 if ( (serialSCI_SETINT_REG & serialSCI_TX_INT) == 0)
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246 /* Wait until IDLE idle period is finished */
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247 while ( (serialSCI_FLR_REG & serialSCI_IDLE_FLG) != 0 )
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252 /* Need to send first byte before interrupts flags are set. */
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253 serialSCI_TD_REG = cOutChar;
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255 /* Enable the TX interrupt. */
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256 serialSCI_SETINT_REG = serialSCI_TX_INT;
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260 else if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdPASS )
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271 /*-----------------------------------------------------------*/
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273 void vSerialClose( xComPortHandle xPort )
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275 /* Not supported as not required by the demo application. */
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277 /*-----------------------------------------------------------*/
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279 __interrupt void vSCIInterruptHandler( void )
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281 /* xHigherPriorityTaskWoken must be initialised to pdFALSE. */
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282 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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284 portBASE_TYPE xVectorValue = serialSCI_INTVEC0_REG;
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286 switch( xVectorValue )
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289 /* Receive buffer full interrupt, send received char to queue */
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290 cChar = serialSCI_RD_REG;
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291 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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295 /* Transmit buffer empty interrupt received */
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296 /* Are there any more characters to transmit? */
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297 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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299 /* A character was retrieved from the queue so can be sent to
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301 serialSCI_TD_REG = cChar;
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305 /* no more bytes, clear the TX interrupt */
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306 serialSCI_CLRINT_REG = serialSCI_TX_INT;
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311 /* unused interrupt, clear flags */
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312 serialSCI_FLR_REG = 0x07000003;
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315 /* If calling xQueueSendFromISR() above caused a task to leave the blocked
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316 state, and the task that left the blocked state has a priority above the
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317 task that this interrupt interrupted, then xHighPriorityTaskWoken will have
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318 been set to pdTRUE. If xHigherPriorityTaskWoken equals true then calling
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319 portYIELD_FROM_ISR() will result in this interrupt returning directly to the
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321 portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
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