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   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
  17 * (b) that interact with a Xilinx device through a bus or interconnect.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22 * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25 * SOFTWARE.
  26 *
  27 * Except as contained in this notice, the name of the Xilinx shall not be used
  28 * in advertising or otherwise to promote the sale, use or other dealings in
  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************
  32 *
  33 * _program_timer_hw.h:
  34 *       Timer related functions
  35 *
  36 ******************************************************************************/
  37
  38 #ifndef PROFILE_TIMER_HW_H
  39 #define PROFILE_TIMER_HW_H
  40
  41 #include "profile.h"
  42
  43 #ifdef PROC_PPC
  44 #if defined __GNUC__
  45 #  define SYNCHRONIZE_IO __asm__ volatile ("eieio")
  46 #elif defined __DCC__
  47 #  define SYNCHRONIZE_IO __asm volatile(" eieio")
  48 #else
  49 #  define SYNCHRONIZE_IO
  50 #endif
  51 #endif
  52
  53 #ifdef PROC_PPC
  54 #define ProfIo_In32(InputPtr) { (*(volatile u32 *)(InputPtr)); SYNCHRONIZE_IO; }
  55 #define ProfIo_Out32(OutputPtr, Value) { (*(volatile u32 *)(OutputPtr) = Value); SYNCHRONIZE_IO; }
  56 #else
  57 #define ProfIo_In32(InputPtr) (*(volatile u32 *)(InputPtr));
  58 #define ProfIo_Out32(OutputPtr, Value) { (*(volatile u32 *)(OutputPtr) = (Value)); }
  59 #endif
  60
  61 #define ProfTmrCtr_mWriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)\
  62         ProfIo_Out32(((u32)(BaseAddress) + (u32)XTmrCtr_Offsets[(TmrCtrNumber)] +       \
  63                            (u32)(RegOffset)), (u32)(ValueToWrite))
  64
  65 #define ProfTimerCtr_mReadReg(BaseAddress, TmrCtrNumber, RegOffset)     \
  66         ProfIo_In32((u32)(BaseAddress) + (u32)XTmrCtr_Offsets[(TmrCtrNumber)] + (u32)(RegOffset))
  67
  68 #define ProfTmrCtr_mSetControlStatusReg(BaseAddress, TmrCtrNumber, RegisterValue)\
  69         ProfTmrCtr_mWriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET,     \
  70                                            (RegisterValue))
  71
  72 #define ProfTmrCtr_mGetControlStatusReg(BaseAddress, TmrCtrNumber)              \
  73         ProfTimerCtr_mReadReg((u32)(BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET)
  74
  75
  76
  77 #ifdef __cplusplus
  78 extern "C" {
  79 #endif
  80
  81 #ifdef PROC_PPC
  82 #include "xexception_l.h"
  83 #include "xtime_l.h"
  84 #include "xpseudo_asm.h"
  85 #endif
  86
  87 #ifdef TIMER_CONNECT_INTC
  88 #include "xintc_l.h"
  89 #include "xintc.h"
  90 #endif  /* TIMER_CONNECT_INTC */
  91
  92 #if (!defined PPC_PIT_INTERRUPT && !defined PROC_CORTEXA9)
  93 #include "xtmrctr_l.h"
  94 #endif
  95
  96 #ifdef PROC_CORTEXA9
  97 #include "xscutimer_hw.h"
  98 #include "xscugic.h"
  99 #endif
 100
 101 extern u32 timer_clk_ticks ;
 102
 103 /*--------------------------------------------------------------------
 104  * PowerPC Target - Timer related functions
 105  *-------------------------------------------------------------------- */
 106 #ifdef PROC_PPC
 107
 108 #ifdef PPC_PIT_INTERRUPT
 109 u32 timer_lo_clk_ticks ;        /* Clk ticks when Timer is disabled in CG */
 110 #endif
 111
 112 #ifdef PROC_PPC440
 113 #define XREG_TCR_PIT_INTERRUPT_ENABLE XREG_TCR_DEC_INTERRUPT_ENABLE
 114 #define XREG_TSR_PIT_INTERRUPT_STATUS XREG_TSR_DEC_INTERRUPT_STATUS
 115 #define XREG_SPR_PIT XREG_SPR_DEC
 116 #define XEXC_ID_PIT_INT XEXC_ID_DEC_INT
 117 #endif
 118
 119 /* --------------------------------------------------------------------
 120  * Disable the Timer - During Profiling
 121  *
 122  * For PIT Timer -
 123  *      1. XTime_PITDisableInterrupt() ;
 124  *      2. Store the remaining timer clk tick
 125  *      3. Stop the PIT Timer
 126  *-------------------------------------------------------------------- */
 127
 128 #ifdef PPC_PIT_INTERRUPT
 129 #define disable_timer()                 \
 130         {                               \
 131                 u32 val;        \
 132                 val=mfspr(XREG_SPR_TCR);        \
 133                 mtspr(XREG_SPR_TCR, val & (~XREG_TCR_PIT_INTERRUPT_ENABLE));    \
 134                 timer_lo_clk_ticks = mfspr(XREG_SPR_PIT);                       \
 135                 mtspr(XREG_SPR_PIT, 0); \
 136         }
 137 #else
 138 #define disable_timer()         \
 139    { \
 140       u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
 141       u32 tmp_v = ProfIo_In32(addr); \
 142       tmp_v = tmp_v & (~XTC_CSR_ENABLE_TMR_MASK); \
 143       ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
 144    }
 145 #endif
 146
 147
 148
 149 /* --------------------------------------------------------------------
 150  * Enable the Timer
 151  *
 152  * For PIT Timer -
 153  *      1. Load the remaining timer clk ticks
 154  *      2. XTime_PITEnableInterrupt() ;
 155  *-------------------------------------------------------------------- */
 156 #ifdef PPC_PIT_INTERRUPT
 157 #define enable_timer()                          \
 158         {                                       \
 159                 u32 val;                \
 160                 val=mfspr(XREG_SPR_TCR);        \
 161                 mtspr(XREG_SPR_PIT, timer_lo_clk_ticks);        \
 162                 mtspr(XREG_SPR_TCR, val | XREG_TCR_PIT_INTERRUPT_ENABLE); \
 163         }
 164 #else
 165 #define enable_timer()                                          \
 166         {                                                       \
 167       u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
 168       u32 tmp_v = ProfIo_In32(addr); \
 169       tmp_v = tmp_v |  XTC_CSR_ENABLE_TMR_MASK; \
 170       ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
 171         }
 172 #endif
 173
 174
 175
 176 /* --------------------------------------------------------------------
 177  * Send Ack to Timer Interrupt
 178  *
 179  * For PIT Timer -
 180  *      1. Load the timer clk ticks
 181  *      2. Enable AutoReload and Interrupt
 182  *      3. Clear PIT Timer Status bits
 183  *-------------------------------------------------------------------- */
 184 #ifdef PPC_PIT_INTERRUPT
 185 #define timer_ack()                                                     \
 186         {                                                               \
 187                 u32 val;                                        \
 188                 mtspr(XREG_SPR_PIT, timer_clk_ticks);                   \
 189                 mtspr(XREG_SPR_TSR, XREG_TSR_PIT_INTERRUPT_STATUS);     \
 190                 val=mfspr(XREG_SPR_TCR);                                \
 191                 mtspr(XREG_SPR_TCR, val| XREG_TCR_PIT_INTERRUPT_ENABLE| XREG_TCR_AUTORELOAD_ENABLE); \
 192         }
 193 #else
 194 #define timer_ack()                             \
 195         {                                               \
 196                 u32 csr;                        \
 197                 csr = ProfTmrCtr_mGetControlStatusReg(PROFILE_TIMER_BASEADDR, 0);       \
 198                 ProfTmrCtr_mSetControlStatusReg(PROFILE_TIMER_BASEADDR, 0, csr);        \
 199         }
 200 #endif
 201
 202 /*-------------------------------------------------------------------- */
 203 #endif  /* PROC_PPC */
 204 /* -------------------------------------------------------------------- */
 205
 206
 207
 208
 209 /* --------------------------------------------------------------------
 210  * MicroBlaze Target - Timer related functions
 211  *-------------------------------------------------------------------- */
 212 #ifdef PROC_MICROBLAZE
 213
 214 /* --------------------------------------------------------------------
 215  * Disable the Timer during Call-Graph Data collection
 216  *
 217  *-------------------------------------------------------------------- */
 218 #define disable_timer()                                 \
 219         {                                               \
 220       u32 Addr = ((u32)PROFILE_TIMER_BASEADDR); \
 221           Addr += (u32)XTmrCtr_Offsets[(u16)(0)]; \
 222           Addr += (u32)XTC_TCSR_OFFSET; \
 223       u32 tmp_v = ProfIo_In32(Addr); \
 224       tmp_v = tmp_v & (u32)(~XTC_CSR_ENABLE_TMR_MASK); \
 225       u32 OutAddr = (u32)PROFILE_TIMER_BASEADDR; \
 226       OutAddr += (u32)XTmrCtr_Offsets[(u16)(0)]; \
 227       OutAddr += (u32)XTC_TCSR_OFFSET; \
 228       ProfIo_Out32(OutAddr, (u32)tmp_v); \
 229     }
 230
 231
 232 /* --------------------------------------------------------------------
 233  * Enable the Timer after Call-Graph Data collection
 234  *
 235  *-------------------------------------------------------------------- */
 236 #define enable_timer()                                  \
 237         {                                               \
 238       u32 Addr = ((u32)PROFILE_TIMER_BASEADDR); \
 239           Addr += (u32)XTmrCtr_Offsets[(u16)(0)]; \
 240           Addr += (u32)XTC_TCSR_OFFSET; \
 241       u32 tmp_v = (u32)ProfIo_In32(Addr); \
 242       tmp_v = tmp_v |  (u32)XTC_CSR_ENABLE_TMR_MASK; \
 243       ProfIo_Out32((u32)(PROFILE_TIMER_BASEADDR) + (u32)XTmrCtr_Offsets[(u16)(0)] + (u32)XTC_TCSR_OFFSET, (u32)tmp_v); \
 244         }
 245
 246
 247 /* --------------------------------------------------------------------
 248  * Send Ack to Timer Interrupt
 249  *
 250  *-------------------------------------------------------------------- */
 251 #define timer_ack()                             \
 252         {                                               \
 253                 u32 csr;                        \
 254                 csr = ProfTmrCtr_mGetControlStatusReg((u32)PROFILE_TIMER_BASEADDR, (u16)0);     \
 255                 ProfTmrCtr_mSetControlStatusReg((u32)PROFILE_TIMER_BASEADDR, (u16)0, (u32)csr); \
 256         }
 257
 258 /*-------------------------------------------------------------------- */
 259 #endif  /* PROC_MICROBLAZE */
 260 /*-------------------------------------------------------------------- */
 261
 262 /* --------------------------------------------------------------------
 263  * Cortex A9 Target - Timer related functions
 264  *-------------------------------------------------------------------- */
 265 #ifdef PROC_CORTEXA9
 266
 267 /* --------------------------------------------------------------------
 268  * Disable the Timer during Call-Graph Data collection
 269  *
 270  *-------------------------------------------------------------------- */
 271 #define disable_timer()                                                 \
 272 {                                                               \
 273         u32 Reg;                                                        \
 274         Reg = Xil_In32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET); \
 275         Reg &= (~XSCUTIMER_CONTROL_ENABLE_MASK);\
 276         Xil_Out32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET, Reg);\
 277 }
 278
 279
 280 /* --------------------------------------------------------------------
 281  * Enable the Timer after Call-Graph Data collection
 282  *
 283  *-------------------------------------------------------------------- */
 284 #define enable_timer()                                                  \
 285 {                                                               \
 286         u32 Reg;                                                        \
 287         Reg = Xil_In32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET); \
 288         Reg |= XSCUTIMER_CONTROL_ENABLE_MASK; \
 289         Xil_Out32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET, Reg);\
 290 }
 291
 292
 293 /* --------------------------------------------------------------------
 294  * Send Ack to Timer Interrupt
 295  *
 296  *-------------------------------------------------------------------- */
 297 #define timer_ack()                                             \
 298 {                                                       \
 299         Xil_Out32((u32)PROFILE_TIMER_BASEADDR + (u32)XSCUTIMER_ISR_OFFSET, \
 300                 (u32)XSCUTIMER_ISR_EVENT_FLAG_MASK);\
 301 }
 302
 303 /*-------------------------------------------------------------------- */
 304 #endif  /* PROC_CORTEXA9 */
 305 /*-------------------------------------------------------------------- */
 306
 307
 308 #ifdef __cplusplus
 309 }
 310 #endif
 311
 312 #endif