git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c

   1 /*\r
   2     FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
   5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
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  10      *    Complete, revised, and edited pdf reference manuals are also       *\r
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  22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  23      *                                                                       *\r
  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32     >>>NOTE<<< The modification to the GPL is included to allow you to\r
  33     distribute a combined work that includes FreeRTOS without being obliged to\r
  34     provide the source code for proprietary components outside of the FreeRTOS\r
  35     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  36     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  37     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  38     more details. You should have received a copy of the GNU General Public\r
  39     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
  40     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
  41     by writing to Richard Barry, contact details for whom are available on the\r
  42     FreeRTOS WEB site.\r
  43 \r
  44     1 tab == 4 spaces!\r
  45 \r
  46     ***************************************************************************\r
  47      *                                                                       *\r
  48      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  49      *    not run, what could be wrong?"                                     *\r
  50      *                                                                       *\r
  51      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  52      *                                                                       *\r
  53     ***************************************************************************\r
  54 \r
  55 \r
  56     http://www.FreeRTOS.org - Documentation, training, latest versions, license\r
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  58 \r
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  61 \r
  62     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell\r
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  66     the SafeRTOS brand: http://www.SafeRTOS.com.\r
  67 */\r
  68 \r
  69 /*-----------------------------------------------------------\r
  70  * Implementation of functions defined in portable.h for the ARM CM4F port.\r
  71  *----------------------------------------------------------*/\r
  72 \r
  73 /* Scheduler includes. */\r
  74 #include "FreeRTOS.h"\r
  75 #include "task.h"\r
  76 \r
  77 #ifndef __VFP_FP__\r
  78         #error This port can only be used when the project options are configured to enable hardware floating point support.\r
  79 #endif\r
  80 \r
  81 #ifndef configSYSTICK_CLOCK_HZ\r
  82         #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ\r
  83 #endif\r
  84 \r
  85 /* Constants required to manipulate the core.  Registers first... */\r
  86 #define portNVIC_SYSTICK_CTRL_REG                       ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
  87 #define portNVIC_SYSTICK_LOAD_REG                       ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
  88 #define portNVIC_SYSTICK_CURRENT_VALUE_REG      ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
  89 #define portNVIC_INT_CTRL_REG                           ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
  90 #define portNVIC_SYSPRI2_REG                            ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
  91 /* ...then bits in the registers. */\r
  92 #define portNVIC_SYSTICK_CLK_BIT                        ( 1UL << 2UL )\r
  93 #define portNVIC_SYSTICK_INT_BIT                        ( 1UL << 1UL )\r
  94 #define portNVIC_SYSTICK_ENABLE_BIT                     ( 1UL << 0UL )\r
  95 #define portNVIC_SYSTICK_COUNT_FLAG_BIT         ( 1UL << 16UL )\r
  96 #define portNVIC_PENDSVSET_BIT                          ( 1UL << 28UL )\r
  97 #define portNVIC_PENDSVCLEAR_BIT                        ( 1UL << 27UL )\r
  98 #define portNVIC_PEND_SYSTICK_CLEAR_BIT         ( 1UL << 25UL )\r
  99 \r
 100 #define portNVIC_PENDSV_PRI                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 101 #define portNVIC_SYSTICK_PRI                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 102 \r
 103 /* Constants required to manipulate the VFP. */\r
 104 #define portFPCCR                                       ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
 105 #define portASPEN_AND_LSPEN_BITS        ( 0x3UL << 30UL )\r
 106 \r
 107 /* Constants required to set up the initial stack. */\r
 108 #define portINITIAL_XPSR                        ( 0x01000000 )\r
 109 #define portINITIAL_EXEC_RETURN         ( 0xfffffffd )\r
 110 \r
 111 /* The priority used by the kernel is assigned to a variable to make access\r
 112 from inline assembler easier. */\r
 113 const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
 114 \r
 115 /* Each task maintains its own interrupt status in the critical nesting\r
 116 variable. */\r
 117 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 118 \r
 119 /*\r
 120  * Setup the timer to generate the tick interrupts.  The implementation in this\r
 121  * file is weak to allow application writers to change the timer used to\r
 122  * generate the tick interrupt.\r
 123  */\r
 124 void vPortSetupTimerInterrupt( void );\r
 125 \r
 126 /*\r
 127  * Exception handlers.\r
 128  */\r
 129 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 130 void xPortSysTickHandler( void );\r
 131 void vPortSVCHandler( void ) __attribute__ (( naked ));\r
 132 \r
 133 /*\r
 134  * Start first task is a separate function so it can be tested in isolation.\r
 135  */\r
 136 static void prvPortStartFirstTask( void ) __attribute__ (( naked ));\r
 137 \r
 138 /*\r
 139  * Function to enable the VFP.\r
 140  */\r
 141  static void vPortEnableVFP( void ) __attribute__ (( naked ));\r
 142 \r
 143 /*-----------------------------------------------------------*/\r
 144 \r
 145 /*\r
 146  * The number of SysTick increments that make up one tick period.\r
 147  */\r
 148 #if configUSE_TICKLESS_IDLE == 1\r
 149         static unsigned long ulTimerReloadValueForOneTick = 0;\r
 150 #endif\r
 151 \r
 152 /*\r
 153  * The maximum number of tick periods that can be suppressed is limited by the\r
 154  * 24 bit resolution of the SysTick timer.\r
 155  */\r
 156 #if configUSE_TICKLESS_IDLE == 1\r
 157         static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
 158 #endif /* configUSE_TICKLESS_IDLE */\r
 159 \r
 160 /*\r
 161  * Compensate for the CPU cycles that pass while the SysTick is stopped (low\r
 162  * power functionality only.\r
 163  */\r
 164 #if configUSE_TICKLESS_IDLE == 1\r
 165         static unsigned long ulStoppedTimerCompensation = 0;\r
 166 #endif /* configUSE_TICKLESS_IDLE */\r
 167 \r
 168 /*-----------------------------------------------------------*/\r
 169 \r
 170 /*\r
 171  * See header file for description.\r
 172  */\r
 173 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 174 {\r
 175         /* Simulate the stack frame as it would be created by a context switch\r
 176         interrupt. */\r
 177 \r
 178         /* Offset added to account for the way the MCU uses the stack on entry/exit\r
 179         of interrupts, and to ensure alignment. */\r
 180         pxTopOfStack--;\r
 181 \r
 182         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 183         pxTopOfStack--;\r
 184         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 185         pxTopOfStack--;\r
 186         *pxTopOfStack = 0;      /* LR */\r
 187 \r
 188         /* Save code space by skipping register initialisation. */\r
 189         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 190         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 191 \r
 192         /* A save method is being used that requires each task to maintain its\r
 193         own exec return value. */\r
 194         pxTopOfStack--;\r
 195         *pxTopOfStack = portINITIAL_EXEC_RETURN;\r
 196 \r
 197         pxTopOfStack -= 8;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 198 \r
 199         return pxTopOfStack;\r
 200 }\r
 201 /*-----------------------------------------------------------*/\r
 202 \r
 203 void vPortSVCHandler( void )\r
 204 {\r
 205         __asm volatile (\r
 206                                         "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 207                                         "       ldr r1, [r3]                                    \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
 208                                         "       ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 209                                         "       ldmia r0!, {r4-r11, r14}                \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
 210                                         "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 211                                         "       mov r0, #0                                              \n"\r
 212                                         "       msr     basepri, r0                                     \n"\r
 213                                         "       bx r14                                                  \n"\r
 214                                         "                                                                       \n"\r
 215                                         "       .align 2                                                \n"\r
 216                                         "pxCurrentTCBConst2: .word pxCurrentTCB                         \n"\r
 217                                 );\r
 218 }\r
 219 /*-----------------------------------------------------------*/\r
 220 \r
 221 static void prvPortStartFirstTask( void )\r
 222 {\r
 223         __asm volatile(\r
 224                                         " ldr r0, =0xE000ED08   \n" /* Use the NVIC offset register to locate the stack. */\r
 225                                         " ldr r0, [r0]                  \n"\r
 226                                         " ldr r0, [r0]                  \n"\r
 227                                         " msr msp, r0                   \n" /* Set the msp back to the start of the stack. */\r
 228                                         " cpsie i                               \n" /* Globally enable interrupts. */\r
 229                                         " svc 0                                 \n" /* System call to start first task. */\r
 230                                         " nop                                   \n"\r
 231                                 );\r
 232 }\r
 233 /*-----------------------------------------------------------*/\r
 234 \r
 235 /*\r
 236  * See header file for description.\r
 237  */\r
 238 portBASE_TYPE xPortStartScheduler( void )\r
 239 {\r
 240         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.\r
 241         See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 242         configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );\r
 243 \r
 244         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 245         portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;\r
 246         portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;\r
 247 \r
 248         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 249         here already. */\r
 250         vPortSetupTimerInterrupt();\r
 251 \r
 252         /* Initialise the critical nesting count ready for the first task. */\r
 253         uxCriticalNesting = 0;\r
 254 \r
 255         /* Ensure the VFP is enabled - it should be anyway. */\r
 256         vPortEnableVFP();\r
 257 \r
 258         /* Lazy save always. */\r
 259         *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;\r
 260 \r
 261         /* Start the first task. */\r
 262         prvPortStartFirstTask();\r
 263 \r
 264         /* Should not get here! */\r
 265         return 0;\r
 266 }\r
 267 /*-----------------------------------------------------------*/\r
 268 \r
 269 void vPortEndScheduler( void )\r
 270 {\r
 271         /* It is unlikely that the CM4F port will require this function as there\r
 272         is nothing to return to.  */\r
 273 }\r
 274 /*-----------------------------------------------------------*/\r
 275 \r
 276 void vPortYieldFromISR( void )\r
 277 {\r
 278         /* Set a PendSV to request a context switch. */\r
 279         portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
 280 }\r
 281 /*-----------------------------------------------------------*/\r
 282 \r
 283 void vPortEnterCritical( void )\r
 284 {\r
 285         portDISABLE_INTERRUPTS();\r
 286         uxCriticalNesting++;\r
 287 }\r
 288 /*-----------------------------------------------------------*/\r
 289 \r
 290 void vPortExitCritical( void )\r
 291 {\r
 292         uxCriticalNesting--;\r
 293         if( uxCriticalNesting == 0 )\r
 294         {\r
 295                 portENABLE_INTERRUPTS();\r
 296         }\r
 297 }\r
 298 /*-----------------------------------------------------------*/\r
 299 \r
 300 __attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )\r
 301 {\r
 302         __asm volatile                                                                                                          \\r
 303         (                                                                                                                                       \\r
 304                 "       mrs r0, basepri                                                                                 \n" \\r
 305                 "       mov r1, %0                                                                                              \n"     \\r
 306                 "       msr basepri, r1                                                                                 \n" \\r
 307                 "       bx lr                                                                                                   \n" \\r
 308                 :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "r0", "r1"    \\r
 309         );\r
 310 \r
 311         /* This return will not be reached but is necessary to prevent compiler\r
 312         warnings. */\r
 313         return 0;\r
 314 }\r
 315 /*-----------------------------------------------------------*/\r
 316 \r
 317 __attribute__(( naked )) void vPortClearInterruptMask( unsigned long ulNewMaskValue )\r
 318 {\r
 319         __asm volatile                                                                                                  \\r
 320         (                                                                                                                               \\r
 321                 "       msr basepri, r0                                                                         \n"     \\r
 322                 "       bx lr                                                                                           \n" \\r
 323                 :::"r0"                                                                                                         \\r
 324         );\r
 325 }\r
 326 /*-----------------------------------------------------------*/\r
 327 \r
 328 void xPortPendSVHandler( void )\r
 329 {\r
 330         /* This is a naked function. */\r
 331 \r
 332         __asm volatile\r
 333         (\r
 334         "       mrs r0, psp                                                     \n"\r
 335         "                                                                               \n"\r
 336         "       ldr     r3, pxCurrentTCBConst                           \n" /* Get the location of the current TCB. */\r
 337         "       ldr     r2, [r3]                                                \n"\r
 338         "                                                                               \n"\r
 339         "       tst r14, #0x10                                          \n" /* Is the task using the FPU context?  If so, push high vfp registers. */\r
 340         "       it eq                                                           \n"\r
 341         "       vstmdbeq r0!, {s16-s31}                         \n"\r
 342         "                                                                               \n"\r
 343         "       stmdb r0!, {r4-r11, r14}                        \n" /* Save the core registers. */\r
 344         "                                                                               \n"\r
 345         "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 346         "                                                                               \n"\r
 347         "       stmdb sp!, {r3, r14}                            \n"\r
 348         "       mov r0, %0                                                      \n"\r
 349         "       msr basepri, r0                                         \n"\r
 350         "       bl vTaskSwitchContext                           \n"\r
 351         "       mov r0, #0                                                      \n"\r
 352         "       msr basepri, r0                                         \n"\r
 353         "       ldmia sp!, {r3, r14}                            \n"\r
 354         "                                                                               \n"\r
 355         "       ldr r1, [r3]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 356         "       ldr r0, [r1]                                            \n"\r
 357         "                                                                               \n"\r
 358         "       ldmia r0!, {r4-r11, r14}                        \n" /* Pop the core registers. */\r
 359         "                                                                               \n"\r
 360         "       tst r14, #0x10                                          \n" /* Is the task using the FPU context?  If so, pop the high vfp registers too. */\r
 361         "       it eq                                                           \n"\r
 362         "       vldmiaeq r0!, {s16-s31}                         \n"\r
 363         "                                                                               \n"\r
 364         "       msr psp, r0                                                     \n"\r
 365         "       bx r14                                                          \n"\r
 366         "                                                                               \n"\r
 367         "       .align 2                                                        \n"\r
 368         "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 369         ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 370         );\r
 371 }\r
 372 /*-----------------------------------------------------------*/\r
 373 \r
 374 void xPortSysTickHandler( void )\r
 375 {\r
 376         /* If using preemption, also force a context switch. */\r
 377         #if configUSE_PREEMPTION == 1\r
 378                 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
 379         #endif\r
 380 \r
 381         /* Only reset the systick load register if configUSE_TICKLESS_IDLE is set to\r
 382         1.  If it is set to 0 tickless idle is not being used.  If it is set to a\r
 383         value other than 0 or 1 then a timer other than the SysTick is being used\r
 384         to generate the tick interrupt. */\r
 385         #if configUSE_TICKLESS_IDLE == 1\r
 386                 portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;\r
 387         #endif\r
 388 \r
 389         ( void ) portSET_INTERRUPT_MASK_FROM_ISR();\r
 390         {\r
 391                 vTaskIncrementTick();\r
 392         }\r
 393         portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );\r
 394 }\r
 395 /*-----------------------------------------------------------*/\r
 396 \r
 397 #if configUSE_TICKLESS_IDLE == 1\r
 398 \r
 399         __attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
 400         {\r
 401         unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;\r
 402         portTickType xModifiableIdleTime;\r
 403 \r
 404                 /* Make sure the SysTick reload value does not overflow the counter. */\r
 405                 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
 406                 {\r
 407                         xExpectedIdleTime = xMaximumPossibleSuppressedTicks;\r
 408                 }\r
 409 \r
 410                 /* Calculate the reload value required to wait xExpectedIdleTime\r
 411                 tick periods.  -1 is used because this code will execute part way\r
 412                 through one of the tick periods, and the fraction of a tick period is\r
 413                 accounted for later. */\r
 414                 ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );\r
 415                 if( ulReloadValue > ulStoppedTimerCompensation )\r
 416                 {\r
 417                         ulReloadValue -= ulStoppedTimerCompensation;\r
 418                 }\r
 419 \r
 420                 /* Stop the SysTick momentarily.  The time the SysTick is stopped for\r
 421                 is accounted for as best it can be, but using the tickless mode will\r
 422                 inevitably result in some tiny drift of the time maintained by the\r
 423                 kernel with respect to calendar time. */\r
 424                 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;\r
 425 \r
 426                 /* If a context switch is pending then abandon the low power entry as\r
 427                 the context switch might have been pended by an external interrupt that\r
 428                 requires processing. */\r
 429                 if( ( portNVIC_INT_CTRL_REG & portNVIC_PENDSVSET_BIT ) != 0 )\r
 430                 {\r
 431                         /* Restart SysTick. */\r
 432                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 433                 }\r
 434                 else\r
 435                 {\r
 436                         /* Adjust the reload value to take into account that the current\r
 437                         time slice is already partially complete. */\r
 438                         ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );\r
 439                         portNVIC_SYSTICK_LOAD_REG = ulReloadValue;\r
 440 \r
 441                         /* Clear the SysTick count flag and set the count value back to\r
 442                         zero. */\r
 443                         portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
 444 \r
 445                         /* Restart SysTick. */\r
 446                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 447 \r
 448                         /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can\r
 449                         set its parameter to 0 to indicate that its implementation contains\r
 450                         its own wait for interrupt or wait for event instruction, and so wfi\r
 451                         should not be executed again.  However, the original expected idle\r
 452                         time variable must remain unmodified, so a copy is taken. */\r
 453                         xModifiableIdleTime = xExpectedIdleTime;\r
 454                         configPRE_SLEEP_PROCESSING( xModifiableIdleTime );\r
 455                         if( xModifiableIdleTime > 0 )\r
 456                         {\r
 457                                 __asm volatile( "wfi" );\r
 458                         }\r
 459                         configPOST_SLEEP_PROCESSING( xExpectedIdleTime );\r
 460 \r
 461                         /* Stop SysTick.  Again, the time the SysTick is stopped for is\r
 462                         accounted for as best it can be, but using the tickless mode will\r
 463                         inevitably result in some tiny drift of the time maintained by the\r
 464                         kernel with respect to calendar time. */\r
 465                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;\r
 466 \r
 467                         if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
 468                         {\r
 469                                 /* The tick interrupt has already executed, and the SysTick\r
 470                                 count reloaded with the portNVIC_SYSTICK_LOAD_REG value.\r
 471                                 Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of\r
 472                                 this tick period. */\r
 473                                 portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
 474 \r
 475                                 /* The tick interrupt handler will already have pended the tick\r
 476                                 processing in the kernel.  As the pending tick will be\r
 477                                 processed as soon as this function exits, the tick value\r
 478                                 maintained by the tick is stepped forward by one less than the\r
 479                                 time spent waiting. */\r
 480                                 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;\r
 481                         }\r
 482                         else\r
 483                         {\r
 484                                 /* Something other than the tick interrupt ended the sleep.\r
 485                                 Work out how long the sleep lasted. */\r
 486                                 ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;\r
 487 \r
 488                                 /* How many complete tick periods passed while the processor\r
 489                                 was waiting? */\r
 490                                 ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;\r
 491 \r
 492                                 /* The reload value is set to whatever fraction of a single tick\r
 493                                 period remains. */\r
 494                                 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;\r
 495                         }\r
 496 \r
 497                         /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG\r
 498                         again, then set portNVIC_SYSTICK_LOAD_REG back to its standard\r
 499                         value. */\r
 500                         portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
 501                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 502 \r
 503                         vTaskStepTick( ulCompleteTickPeriods );\r
 504                 }\r
 505         }\r
 506 \r
 507 #endif /* #if configUSE_TICKLESS_IDLE */\r
 508 /*-----------------------------------------------------------*/\r
 509 \r
 510 /*\r
 511  * Setup the systick timer to generate the tick interrupts at the required\r
 512  * frequency.\r
 513  */\r
 514 __attribute__(( weak )) void vPortSetupTimerInterrupt( void )\r
 515 {\r
 516         /* Calculate the constants required to configure the tick interrupt. */\r
 517         #if configUSE_TICKLESS_IDLE == 1\r
 518         {\r
 519                 ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 520                 xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
 521                 ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );\r
 522         }\r
 523         #endif /* configUSE_TICKLESS_IDLE */\r
 524 \r
 525         /* Configure SysTick to interrupt at the requested rate. */\r
 526         portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;\r
 527         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 528 }\r
 529 /*-----------------------------------------------------------*/\r
 530 \r
 531 /* This is a naked function. */\r
 532 static void vPortEnableVFP( void )\r
 533 {\r
 534         __asm volatile\r
 535         (\r
 536                 "       ldr.w r0, =0xE000ED88           \n" /* The FPU enable bits are in the CPACR. */\r
 537                 "       ldr r1, [r0]                            \n"\r
 538                 "                                                               \n"\r
 539                 "       orr r1, r1, #( 0xf << 20 )      \n" /* Enable CP10 and CP11 coprocessors, then save back. */\r
 540                 "       str r1, [r0]                            \n"\r
 541                 "       bx r14                                          "\r
 542         );\r
 543 }\r
 544 \r