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Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change...
[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM33 / non_secure / portmacro.h
1 /*\r
2  * FreeRTOS Kernel V10.2.0\r
3  * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
4  *\r
5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
6  * this software and associated documentation files (the "Software"), to deal in\r
7  * the Software without restriction, including without limitation the rights to\r
8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
10  * subject to the following conditions:\r
11  *\r
12  * The above copyright notice and this permission notice shall be included in all\r
13  * copies or substantial portions of the Software.\r
14  *\r
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
21  *\r
22  * http://www.FreeRTOS.org\r
23  * http://aws.amazon.com/freertos\r
24  *\r
25  * 1 tab == 4 spaces!\r
26  */\r
27 \r
28 #ifndef PORTMACRO_H\r
29 #define PORTMACRO_H\r
30 \r
31 #ifdef __cplusplus\r
32 extern "C" {\r
33 #endif\r
34 \r
35 /*------------------------------------------------------------------------------\r
36  * Port specific definitions.\r
37  *\r
38  * The settings in this file configure FreeRTOS correctly for the given hardware\r
39  * and compiler.\r
40  *\r
41  * These settings should not be altered.\r
42  *------------------------------------------------------------------------------\r
43  */\r
44 \r
45 #ifndef configENABLE_FPU\r
46         #error configENABLE_FPU must be defined in FreeRTOSConfig.h.\r
47 #endif /* configENABLE_FPU */\r
48 \r
49 #ifndef configENABLE_MPU\r
50         #error configENABLE_MPU must be defined in FreeRTOSConfig.h.\r
51 #endif /* configENABLE_MPU */\r
52 \r
53 #ifndef configENABLE_TRUSTZONE\r
54         #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.\r
55 #endif /* configENABLE_TRUSTZONE */\r
56 /*-----------------------------------------------------------*/\r
57 \r
58 /**\r
59  * @brief Type definitions.\r
60  */\r
61 #define portCHAR                                                                                        char\r
62 #define portFLOAT                                                                                       float\r
63 #define portDOUBLE                                                                                      double\r
64 #define portLONG                                                                                        long\r
65 #define portSHORT                                                                                       short\r
66 #define portSTACK_TYPE                                                                          uint32_t\r
67 #define portBASE_TYPE                                                                           long\r
68 \r
69 typedef portSTACK_TYPE                                                                          StackType_t;\r
70 typedef long                                                                                            BaseType_t;\r
71 typedef unsigned long                                                                           UBaseType_t;\r
72 \r
73 #if( configUSE_16_BIT_TICKS == 1 )\r
74         typedef uint16_t TickType_t;\r
75         #define portMAX_DELAY ( TickType_t )                                    0xffff\r
76 #else\r
77         typedef uint32_t TickType_t;\r
78         #define portMAX_DELAY ( TickType_t )                                    0xffffffffUL\r
79 \r
80         /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
81          * not need to be guarded with a critical section. */\r
82         #define portTICK_TYPE_IS_ATOMIC                                                 1\r
83 #endif\r
84 /*-----------------------------------------------------------*/\r
85 \r
86 /**\r
87  * Architecture specifics.\r
88  */\r
89 #define portSTACK_GROWTH                                                                        ( -1 )\r
90 #define portTICK_PERIOD_MS                                                                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
91 #define portBYTE_ALIGNMENT                                                                      8\r
92 #define portNOP()\r
93 #define portINLINE                                                                                      __inline\r
94 #ifndef portFORCE_INLINE\r
95         #define portFORCE_INLINE                                                                inline __attribute__(( always_inline ))\r
96 #endif\r
97 #define portHAS_STACK_OVERFLOW_CHECKING                                         1\r
98 /*-----------------------------------------------------------*/\r
99 \r
100 /**\r
101  * @brief Extern declarations.\r
102  */\r
103 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
104 \r
105 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
106 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
107 \r
108 extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
109 extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
110 \r
111 #if( configENABLE_TRUSTZONE == 1 )\r
112         extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize );\r
113         extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* PRIVILEGED_FUNCTION */;\r
114 #endif /* configENABLE_TRUSTZONE */\r
115 \r
116 #if( configENABLE_MPU == 1 )\r
117         extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;\r
118         extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;\r
119 #endif /* configENABLE_MPU */\r
120 /*-----------------------------------------------------------*/\r
121 \r
122 /**\r
123  * @brief MPU specific constants.\r
124  */\r
125 #if( configENABLE_MPU == 1 )\r
126         #define portUSING_MPU_WRAPPERS                                                  1\r
127         #define portPRIVILEGE_BIT                                                               ( 0x80000000UL )\r
128 #else\r
129         #define portPRIVILEGE_BIT                                                               ( 0x0UL )\r
130 #endif /* configENABLE_MPU */\r
131 \r
132 \r
133 /* MPU regions. */\r
134 #define portPRIVILEGED_FLASH_REGION                                                     ( 0UL )\r
135 #define portUNPRIVILEGED_FLASH_REGION                                           ( 1UL )\r
136 #define portPRIVILEGED_RAM_REGION                                                       ( 2UL )\r
137 #define portUNPRIVILEGED_DEVICE_REGION                                          ( 3UL )\r
138 #define portSTACK_REGION                                                                        ( 4UL )\r
139 #define portFIRST_CONFIGURABLE_REGION                                           ( 5UL )\r
140 #define portLAST_CONFIGURABLE_REGION                                            ( 7UL )\r
141 #define portNUM_CONFIGURABLE_REGIONS                                            ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )\r
142 #define portTOTAL_NUM_REGIONS                                                           ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */\r
143 \r
144 /* Devices Region. */\r
145 #define portDEVICE_REGION_START_ADDRESS                                         ( 0x50000000 )\r
146 #define portDEVICE_REGION_END_ADDRESS                                           ( 0x5FFFFFFF )\r
147 \r
148 /* Device memory attributes used in MPU_MAIR registers.\r
149  *\r
150  * 8-bit values encoded as follows:\r
151  *  Bit[7:4] - 0000 - Device Memory\r
152  *  Bit[3:2] - 00 --> Device-nGnRnE\r
153  *                              01 --> Device-nGnRE\r
154  *                              10 --> Device-nGRE\r
155  *                              11 --> Device-GRE\r
156  *  Bit[1:0] - 00, Reserved.\r
157  */\r
158 #define portMPU_DEVICE_MEMORY_nGnRnE                                            ( 0x00 ) /* 0000 0000 */\r
159 #define portMPU_DEVICE_MEMORY_nGnRE                                                     ( 0x04 ) /* 0000 0100 */\r
160 #define portMPU_DEVICE_MEMORY_nGRE                                                      ( 0x08 ) /* 0000 1000 */\r
161 #define portMPU_DEVICE_MEMORY_GRE                                                       ( 0x0C ) /* 0000 1100 */\r
162 \r
163 /* Normal memory attributes used in MPU_MAIR registers. */\r
164 #define portMPU_NORMAL_MEMORY_NON_CACHEABLE                                     ( 0x44 ) /* Non-cacheable. */\r
165 #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE                      ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */\r
166 \r
167 /* Attributes used in MPU_RBAR registers. */\r
168 #define portMPU_REGION_NON_SHAREABLE                                            ( 0UL << 3UL )\r
169 #define portMPU_REGION_INNER_SHAREABLE                                          ( 1UL << 3UL )\r
170 #define portMPU_REGION_OUTER_SHAREABLE                                          ( 2UL << 3UL )\r
171 \r
172 #define portMPU_REGION_PRIVILEGED_READ_WRITE                            ( 0UL << 1UL )\r
173 #define portMPU_REGION_READ_WRITE                                                       ( 1UL << 1UL )\r
174 #define portMPU_REGION_PRIVILEGED_READ_ONLY                                     ( 2UL << 1UL )\r
175 #define portMPU_REGION_READ_ONLY                                                        ( 3UL << 1UL )\r
176 \r
177 #define portMPU_REGION_EXECUTE_NEVER                                            ( 1UL )\r
178 /*-----------------------------------------------------------*/\r
179 \r
180 /**\r
181  * @brief Settings to define an MPU region.\r
182  */\r
183 typedef struct MPURegionSettings\r
184 {\r
185         uint32_t ulRBAR;        /**< RBAR for the region. */\r
186         uint32_t ulRLAR;        /**< RLAR for the region. */\r
187 } MPURegionSettings_t;\r
188 \r
189 /**\r
190  * @brief MPU settings as stored in the TCB.\r
191  */\r
192 typedef struct MPU_SETTINGS\r
193 {\r
194         uint32_t ulMAIR0;       /**< MAIR0 for the task containing attributes for all the 4 per task regions. */\r
195         MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */\r
196 } xMPU_SETTINGS;\r
197 /*-----------------------------------------------------------*/\r
198 \r
199 /**\r
200  * @brief SVC numbers.\r
201  */\r
202 #define portSVC_ALLOCATE_SECURE_CONTEXT                                         0\r
203 #define portSVC_FREE_SECURE_CONTEXT                                                     1\r
204 #define portSVC_START_SCHEDULER                                                         2\r
205 #define portSVC_RAISE_PRIVILEGE                                                         3\r
206 /*-----------------------------------------------------------*/\r
207 \r
208 /**\r
209  * @brief Scheduler utilities.\r
210  */\r
211 #define portYIELD()                                                                                     vPortYield()\r
212 #define portNVIC_INT_CTRL_REG                                                           ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
213 #define portNVIC_PENDSVSET_BIT                                                          ( 1UL << 28UL )\r
214 #define portEND_SWITCHING_ISR( xSwitchRequired )                        if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
215 #define portYIELD_FROM_ISR( x )                                                         portEND_SWITCHING_ISR( x )\r
216 /*-----------------------------------------------------------*/\r
217 \r
218 /**\r
219  * @brief Critical section management.\r
220  */\r
221 #define portSET_INTERRUPT_MASK_FROM_ISR()                                       ulSetInterruptMaskFromISR()\r
222 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                            vClearInterruptMaskFromISR( x )\r
223 #define portDISABLE_INTERRUPTS()                                                        __asm volatile ( " cpsid i " ::: "memory" )\r
224 #define portENABLE_INTERRUPTS()                                                         __asm volatile ( " cpsie i " ::: "memory" )\r
225 #define portENTER_CRITICAL()                                                            vPortEnterCritical()\r
226 #define portEXIT_CRITICAL()                                                                     vPortExitCritical()\r
227 /*-----------------------------------------------------------*/\r
228 \r
229 /**\r
230  * @brief Task function macros as described on the FreeRTOS.org WEB site.\r
231  */\r
232 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )      void vFunction( void *pvParameters )\r
233 #define portTASK_FUNCTION( vFunction, pvParameters )            void vFunction( void *pvParameters )\r
234 /*-----------------------------------------------------------*/\r
235 \r
236 #if( configENABLE_TRUSTZONE == 1 )\r
237         /**\r
238          * @brief Allocate a secure context for the task.\r
239          *\r
240          * Tasks are not created with a secure context. Any task that is going to call\r
241          * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a\r
242          * secure context before it calls any secure function.\r
243          *\r
244          * @param[in] ulSecureStackSize The size of the secure stack to be allocated.\r
245          */\r
246         #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )        vPortAllocateSecureContext( ulSecureStackSize )\r
247 \r
248         /**\r
249          * @brief Called when a task is deleted to delete the task's secure context,\r
250          * if it has one.\r
251          *\r
252          * @param[in] pxTCB The TCB of the task being deleted.\r
253          */\r
254         #define portCLEAN_UP_TCB( pxTCB )                                                       vPortFreeSecureContext( ( uint32_t * ) pxTCB )\r
255 #else\r
256         #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )\r
257         #define portCLEAN_UP_TCB( pxTCB )\r
258 #endif /* configENABLE_TRUSTZONE */\r
259 /*-----------------------------------------------------------*/\r
260 \r
261 #if( configENABLE_MPU == 1 )\r
262         /**\r
263          * @brief Checks whether or not the processor is privileged.\r
264          *\r
265          * @return 1 if the processor is already privileged, 0 otherwise.\r
266          */\r
267         #define portIS_PRIVILEGED()                                                                     xIsPrivileged()\r
268 \r
269         /**\r
270          * @brief Raise an SVC request to raise privilege.\r
271          *\r
272          * The SVC handler checks that the SVC was raised from a system call and only\r
273          * then it raises the privilege. If this is called from any other place,\r
274          * the privilege is not raised.\r
275          */\r
276         #define portRAISE_PRIVILEGE()                                                           __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );\r
277 \r
278         /**\r
279          * @brief Lowers the privilege level by setting the bit 0 of the CONTROL\r
280          * register.\r
281          */\r
282         #define portRESET_PRIVILEGE()                                                           vResetPrivilege()\r
283 #else\r
284         #define portIS_PRIVILEGED()\r
285         #define portRAISE_PRIVILEGE()\r
286         #define portRESET_PRIVILEGE()\r
287 #endif /* configENABLE_MPU */\r
288 /*-----------------------------------------------------------*/\r
289 \r
290 #ifdef __cplusplus\r
291 }\r
292 #endif\r
293 \r
294 #endif /* PORTMACRO_H */\r