/*\r
- * FreeRTOS+TCP V2.0.3\r
- * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
- *\r
- * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
- * this software and associated documentation files (the "Software"), to deal in\r
- * the Software without restriction, including without limitation the rights to\r
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
- * the Software, and to permit persons to whom the Software is furnished to do so,\r
- * subject to the following conditions:\r
- *\r
- * The above copyright notice and this permission notice shall be included in all\r
- * copies or substantial portions of the Software.\r
- *\r
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
- *\r
- * http://aws.amazon.com/freertos\r
- * http://www.FreeRTOS.org\r
- */\r
-\r
+FreeRTOS+TCP V2.0.11\r
+Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+\r
+Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+this software and associated documentation files (the "Software"), to deal in\r
+the Software without restriction, including without limitation the rights to\r
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+the Software, and to permit persons to whom the Software is furnished to do so,\r
+subject to the following conditions:\r
+\r
+The above copyright notice and this permission notice shall be included in all\r
+copies or substantial portions of the Software.\r
+\r
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+\r
+ http://aws.amazon.com/freertos\r
+ http://www.FreeRTOS.org\r
+*/\r
\r
/* Standard includes. */\r
#include <stdint.h>\r
BaseType_t xNetworkInterfaceInitialise( void )\r
{\r
BaseType_t xReturn = pdPASS;\r
-static BaseType_t xHasInitialised = pdFALSE;\r
\r
- if( xHasInitialised == pdFALSE )\r
- {\r
- xHasInitialised = pdTRUE;\r
+ /* The interrupt will be turned on when a link is established. */\r
+ NVIC_DisableIRQ( ETHERNET_IRQn );\r
+\r
+ /* Disable receive and transmit DMA processes. */\r
+ LPC_ETHERNET->DMA_OP_MODE &= ~( DMA_OM_ST | DMA_OM_SR );\r
\r
- /* The interrupt will be turned on when a link is established. */\r
- NVIC_DisableIRQ( ETHERNET_IRQn );\r
+ /* Disable packet reception. */\r
+ LPC_ETHERNET->MAC_CONFIG &= ~( MAC_CFG_RE | MAC_CFG_TE );\r
\r
- /* Disable receive and transmit DMA processes. */\r
- LPC_ETHERNET->DMA_OP_MODE &= ~( DMA_OM_ST | DMA_OM_SR );\r
+ /* Call the LPCOpen function to initialise the hardware. */\r
+ Chip_ENET_Init( LPC_ETHERNET );\r
\r
- /* Disable packet reception. */\r
- LPC_ETHERNET->MAC_CONFIG &= ~( MAC_CFG_RE | MAC_CFG_TE );\r
+ /* Save MAC address. */\r
+ Chip_ENET_SetADDR( LPC_ETHERNET, ucMACAddress );\r
\r
- /* Call the LPCOpen function to initialise the hardware. */\r
- Chip_ENET_Init( LPC_ETHERNET );\r
+ /* Clear all MAC address hash entries. */\r
+ LPC_ETHERNET->MAC_HASHTABLE_HIGH = 0;\r
+ LPC_ETHERNET->MAC_HASHTABLE_LOW = 0;\r
\r
- /* Save MAC address. */\r
- Chip_ENET_SetADDR( LPC_ETHERNET, ucMACAddress );\r
+ #if( ipconfigUSE_LLMNR == 1 )\r
+ {\r
+ prvAddMACAddress( xLLMNR_MACAddress );\r
+ }\r
+ #endif /* ipconfigUSE_LLMNR == 1 */\r
\r
- /* Clear all MAC address hash entries. */\r
- LPC_ETHERNET->MAC_HASHTABLE_HIGH = 0;\r
- LPC_ETHERNET->MAC_HASHTABLE_LOW = 0;\r
+ /* Promiscuous flag (PR) and Receive All flag (RA) set to zero. The\r
+ registers MAC_HASHTABLE_[LOW|HIGH] will be loaded to allow certain\r
+ multi-cast addresses. */\r
+ LPC_ETHERNET->MAC_FRAME_FILTER = MAC_FF_HMC;\r
\r
- #if( ipconfigUSE_LLMNR == 1 )\r
+ #if( configUSE_RMII == 1 )\r
+ {\r
+ if( lpc_phy_init( pdTRUE, prvDelay ) != SUCCESS )\r
{\r
- prvAddMACAddress( xLLMNR_MACAddress );\r
+ xReturn = pdFAIL;\r
}\r
- #endif /* ipconfigUSE_LLMNR == 1 */\r
-\r
- /* Promiscuous flag (PR) and Receive All flag (RA) set to zero. The\r
- registers MAC_HASHTABLE_[LOW|HIGH] will be loaded to allow certain\r
- multi-cast addresses. */\r
- LPC_ETHERNET->MAC_FRAME_FILTER = MAC_FF_HMC;\r
-\r
- #if( configUSE_RMII == 1 )\r
+ }\r
+ #else\r
+ {\r
+ #warning This path has not been tested.\r
+ if( lpc_phy_init( pdFALSE, prvDelay ) != SUCCESS )\r
{\r
- if( lpc_phy_init( pdTRUE, prvDelay ) != SUCCESS )\r
- {\r
- xReturn = pdFAIL;\r
- }\r
+ xReturn = pdFAIL;\r
}\r
- #else\r
+ }\r
+ #endif\r
+\r
+ if( xReturn == pdPASS )\r
+ {\r
+ /* Guard against the task being created more than once and the\r
+ descriptors being initialised more than once. */\r
+ if( xRxHanderTask == NULL )\r
{\r
- #warning This path has not been tested.\r
- if( lpc_phy_init( pdFALSE, prvDelay ) != SUCCESS )\r
- {\r
- xReturn = pdFAIL;\r
- }\r
+ xReturn = xTaskCreate( prvEMACHandlerTask, "EMAC", nwRX_TASK_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, &xRxHanderTask );\r
+ configASSERT( xReturn );\r
}\r
- #endif\r
\r
- if( xReturn == pdPASS )\r
+ if( xTXDescriptorSemaphore == NULL )\r
{\r
- if( xTXDescriptorSemaphore == NULL )\r
- {\r
- /* Create a counting semaphore, with a value of 'configNUM_TX_DESCRIPTORS'\r
- and a maximum of 'configNUM_TX_DESCRIPTORS'. */\r
- xTXDescriptorSemaphore = xSemaphoreCreateCounting( ( UBaseType_t ) configNUM_TX_DESCRIPTORS, ( UBaseType_t ) configNUM_TX_DESCRIPTORS );\r
- configASSERT( xTXDescriptorSemaphore );\r
- }\r
+ /* Create a counting semaphore, with a value of 'configNUM_TX_DESCRIPTORS'\r
+ and a maximum of 'configNUM_TX_DESCRIPTORS'. */\r
+ xTXDescriptorSemaphore = xSemaphoreCreateCounting( ( UBaseType_t ) configNUM_TX_DESCRIPTORS, ( UBaseType_t ) configNUM_TX_DESCRIPTORS );\r
+ configASSERT( xTXDescriptorSemaphore );\r
+ }\r
\r
- /* Enable MAC interrupts. */\r
- LPC_ETHERNET->DMA_INT_EN = nwDMA_INTERRUPT_MASK;\r
+ /* Enable MAC interrupts. */\r
+ LPC_ETHERNET->DMA_INT_EN = nwDMA_INTERRUPT_MASK;\r
+ }\r
\r
- /* Auto-negotiate was already started. Wait for it to complete. */\r
- xReturn = prvSetLinkSpeed();\r
+ if( xReturn != pdFAIL )\r
+ {\r
+ /* Auto-negotiate was already started. Wait for it to complete. */\r
+ xReturn = prvSetLinkSpeed();\r
\r
- if( xReturn == pdPASS )\r
- {\r
- /* Initialise the descriptors. */\r
- prvSetupTxDescriptors();\r
- prvSetupRxDescriptors();\r
+ if( xReturn == pdPASS )\r
+ {\r
+ /* Initialise the descriptors. */\r
+ prvSetupTxDescriptors();\r
+ prvSetupRxDescriptors();\r
\r
- /* Clear all interrupts. */\r
- LPC_ETHERNET->DMA_STAT = DMA_ST_ALL;\r
+ /* Clear all interrupts. */\r
+ LPC_ETHERNET->DMA_STAT = DMA_ST_ALL;\r
\r
- /* Enable receive and transmit DMA processes. */\r
- LPC_ETHERNET->DMA_OP_MODE |= DMA_OM_ST | DMA_OM_SR;\r
+ /* Enable receive and transmit DMA processes. */\r
+ LPC_ETHERNET->DMA_OP_MODE |= DMA_OM_ST | DMA_OM_SR;\r
\r
- /* Set Receiver / Transmitter Enable. */\r
- LPC_ETHERNET->MAC_CONFIG |= MAC_CFG_RE | MAC_CFG_TE;\r
+ /* Set Receiver / Transmitter Enable. */\r
+ LPC_ETHERNET->MAC_CONFIG |= MAC_CFG_RE | MAC_CFG_TE;\r
\r
- /* Start receive polling. */\r
- LPC_ETHERNET->DMA_REC_POLL_DEMAND = 1;\r
+ /* Start receive polling. */\r
+ LPC_ETHERNET->DMA_REC_POLL_DEMAND = 1;\r
\r
- /* Enable interrupts in the NVIC. */\r
- NVIC_SetPriority( ETHERNET_IRQn, configMAC_INTERRUPT_PRIORITY );\r
- NVIC_EnableIRQ( ETHERNET_IRQn );\r
- }\r
- /* Guard against the task being created more than once and the\r
- descriptors being initialised more than once. */\r
- if( xRxHanderTask == NULL )\r
- {\r
- xReturn = xTaskCreate( prvEMACHandlerTask, "EMAC", nwRX_TASK_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, &xRxHanderTask );\r
- configASSERT( xReturn );\r
- }\r
+ /* Enable interrupts in the NVIC. */\r
+ NVIC_SetPriority( ETHERNET_IRQn, configMAC_INTERRUPT_PRIORITY );\r
+ NVIC_EnableIRQ( ETHERNET_IRQn );\r
}\r
}\r
\r
- /* Once prvEMACHandlerTask() has started, the variable\r
- 'ulPHYLinkStatus' will be updated by that task. \r
- The IP-task will keep on calling this function untill\r
- it finally returns pdPASS.\r
- Only then can the DHCP-procedure start (if configured). */\r
- if( ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) != 0 )\r
- {\r
- xReturn = pdPASS;\r
- }\r
- else\r
- {\r
- xReturn = pdFAIL;\r
- }\r
-\r
return xReturn;\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* The DMA descriptor will 'own' this Network Buffer,\r
until it has been sent. So don't release it now. */\r
- bReleaseAfterSend = pdFALSE;\r
+ bReleaseAfterSend = false;\r
}\r
#else\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
+uint32_t ulDataAvailable;\r
+\r
configPLACE_IN_SECTION_RAM\r
static BaseType_t prvNetworkInterfaceInput()\r
{\r
#if( ipconfigZERO_COPY_RX_DRIVER != 0 )\r
NetworkBufferDescriptor_t *pxNewDescriptor;\r
#endif /* ipconfigZERO_COPY_RX_DRIVER */\r
-IPStackEvent_t xRxEvent = { eNetworkRxEvent, NULL };\r
+#if( ipconfigUSE_LINKED_RX_MESSAGES == 0 )\r
+ IPStackEvent_t xRxEvent = { eNetworkRxEvent, NULL };\r
+#endif\r
\r
/* Process each descriptor that is not still in use by the DMA. */\r
ulStatus = xDMARxDescriptors[ ulNextRxDescriptorToProcess ].STATUS;\r
if( ( ulStatus & nwRX_STATUS_ERROR_BITS ) != 0 )\r
{\r
/* There is some reception error. */\r
+ intCount[ 3 ]++;\r
/* Clear error bits. */\r
ulStatus &= ~( ( uint32_t )nwRX_STATUS_ERROR_BITS );\r
}\r
else\r
{\r
iptraceNETWORK_INTERFACE_RECEIVE();\r
+\r
+ /* The data that was available at the top of this\r
+ loop has been sent, so is no longer available. */\r
+ ulDataAvailable = pdFALSE;\r
}\r
}\r
}\r
}\r
+ else\r
+ {\r
+ /* The packet is discarded as uninteresting. */\r
+ ulDataAvailable = pdFALSE;\r
+ }\r
/* Got here because received data was sent to the IP task or the\r
data contained an error and was discarded. Give the descriptor\r
back to the DMA. */\r
/* Remember that an RX event has happened. */\r
ulISREvents |= EMAC_IF_RX_EVENT;\r
vTaskNotifyGiveFromISR( xRxHanderTask, &xHigherPriorityTaskWoken );\r
+ intCount[ 0 ]++;\r
}\r
\r
/* TX group interrupt(s). */\r
/* Remember that a TX event has happened. */\r
ulISREvents |= EMAC_IF_TX_EVENT;\r
vTaskNotifyGiveFromISR( xRxHanderTask, &xHigherPriorityTaskWoken );\r
+ intCount[ 1 ]++;\r
}\r
\r
/* Test for 'Abnormal interrupt summary'. */\r
\r
if( ( ulPhyStatus & PHY_LINK_FULLDUPLX ) != 0x00 )\r
{\r
- Chip_ENET_SetDuplex( LPC_ETHERNET, pdTRUE );\r
+ Chip_ENET_SetDuplex( LPC_ETHERNET, true );\r
}\r
else\r
{\r
- Chip_ENET_SetDuplex( LPC_ETHERNET, pdFALSE );\r
+ Chip_ENET_SetDuplex( LPC_ETHERNET, false );\r
}\r
\r
xReturn = pdPASS;\r
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