]> git.sur5r.net Git - freertos/commit
Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup check in...
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 13 Oct 2019 22:53:00 +0000 (22:53 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 13 Oct 2019 22:53:00 +0000 (22:53 +0000)
commit5f42c3f76cb2004e556c23b06338327c375e68a6
treeccba3f32e15e66c7b499c0a73933fdc07709185d
parent24d8d2669677d4a45f5196729b28f96ac92d5b19
Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup check in only as still a work in progress.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2737 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.cproject
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.project
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/FreeRTOSConfig.h
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/blinky_demo/main_blinky.c
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/design.dts [new file with mode: 0644]
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/design.reglist [new file with mode: 0644]
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/freedom-metal/gloss/crt0.S
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/full_demo/RegTest.S [new file with mode: 0644]
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/full_demo/main_full.c [new file with mode: 0644]
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/main.c