Cortex-A5 IAR port:

- Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2285 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
index 1bfca7fc2b4ecec616811668f4d1eb18a16a6053..b2a4f708c0088ad68e04f29b4a9784b5bd8ae356 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
@@ -58,6 +58,7 @@
        EXTERN  vTaskSwitchContext\r
        EXTERN  ulPortYieldRequired\r
        EXTERN  ulPortInterruptNesting\r
+       EXTERN  vApplicationIRQHandler\r
 \r
        PUBLIC  FreeRTOS_SWI_Handler\r
        PUBLIC  FreeRTOS_IRQ_Handler\r
@@ -126,15 +127,13 @@ FreeRTOS_IRQ_Handler
        AND             r2, r2, #4\r
        SUB             sp, sp, r2\r
 \r
-       ; Obtain the address of the interrupt handler, then call it.\r
+       ; Obtain the address of the interrupt handler, then pass it into the ISR\r
+       ; callback.\r
        PUSH    {r0-r3, lr}\r
        LDR             r1, =configINTERRUPT_VECTOR_ADDRESS\r
        LDR             r0, [r1]\r
-       STR             r1, [r1] ; [SAMA5] Write to IVR in case protect mode is being used.\r
-       DSB\r
-       ISB\r
-       CPSIE   i\r
-       BLX             r0\r
+       LDR             r1, =vApplicationIRQHandler\r
+       BLX             r1\r
        POP             {r0-r3, lr}\r
        ADD             sp, sp, r2\r
 \r