+#ifndef __GPIO_H__\r
+#define __GPIO_H__\r
+\r
+/* Generated automatically for XMC4500_QFP144 on: Mon Jan 14 10:10:13 2013*/\r
+\r
+#include <XMC4500.h>\r
+\r
+#define INPUT 0x00U\r
+#define INPUT_PD 0x08U\r
+#define INPUT_PU 0x10U\r
+#define INPUT_PPS 0x18U\r
+#define INPUT_INV 0x20U\r
+#define INPUT_INV_PD 0x28U\r
+#define INPUT_INV_PU 0x30U\r
+#define INPUT_INV_PPS 0x38U\r
+#define OUTPUT_PP_GP 0x80U\r
+#define OUTPUT_PP_AF1 0x88U\r
+#define OUTPUT_PP_AF2 0x90U\r
+#define OUTPUT_PP_AF3 0x98U\r
+#define OUTPUT_PP_AF4 0xA0U\r
+#define OUTPUT_OD_GP 0xC0U\r
+#define OUTPUT_OD_AF1 0xC8U\r
+#define OUTPUT_OD_AF2 0xD0U\r
+#define OUTPUT_OD_AF3 0xD8U\r
+#define OUTPUT_OD_AF4 0XE0U\r
+\r
+#define WEAK 0x7UL\r
+#define MEDIUM 0x4UL\r
+#define STRONG 0x2UL\r
+#define VERYSTRONG 0x0UL\r
+\r
+#define SOFTWARE 0x0UL\r
+#define HW0 0x1UL\r
+#define HW1 0x2UL\r
+\r
+__STATIC_INLINE void P0_0_set_mode(uint8_t mode){\r
+ PORT0->IOCR0 &= ~0x000000f8UL;\r
+ PORT0->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P0_0_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x00000007UL;\r
+ PORT0->PDR0 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P0_0_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00000003UL;\r
+ PORT0->HWSEL |= config << 0;\r
+}\r
+\r
+__STATIC_INLINE void P0_0_set(void){\r
+ PORT0->OMR = 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_0_reset(void){\r
+ PORT0->OMR = 0x00010000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_0_toggle(void){\r
+ PORT0->OMR = 0x00010001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_0_read(void){\r
+ return(PORT0->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_1_set_mode(uint8_t mode){\r
+ PORT0->IOCR0 &= ~0x0000f800UL;\r
+ PORT0->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P0_1_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x00000070UL;\r
+ PORT0->PDR0 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P0_1_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x0000000cUL;\r
+ PORT0->HWSEL |= config << 2;\r
+}\r
+\r
+__STATIC_INLINE void P0_1_set(void){\r
+ PORT0->OMR = 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_1_reset(void){\r
+ PORT0->OMR = 0x00020000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_1_toggle(void){\r
+ PORT0->OMR = 0x00020002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_1_read(void){\r
+ return(PORT0->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_2_set_mode(uint8_t mode){\r
+ PORT0->IOCR0 &= ~0x00f80000UL;\r
+ PORT0->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P0_2_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x00000700UL;\r
+ PORT0->PDR0 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P0_2_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00000030UL;\r
+ PORT0->HWSEL |= config << 4;\r
+}\r
+\r
+__STATIC_INLINE void P0_2_set(void){\r
+ PORT0->OMR = 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_2_reset(void){\r
+ PORT0->OMR = 0x00040000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_2_toggle(void){\r
+ PORT0->OMR = 0x00040004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_2_read(void){\r
+ return(PORT0->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_3_set_mode(uint8_t mode){\r
+ PORT0->IOCR0 &= ~0xf8000000UL;\r
+ PORT0->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P0_3_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x00007000UL;\r
+ PORT0->PDR0 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P0_3_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x000000c0UL;\r
+ PORT0->HWSEL |= config << 6;\r
+}\r
+\r
+__STATIC_INLINE void P0_3_set(void){\r
+ PORT0->OMR = 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_3_reset(void){\r
+ PORT0->OMR = 0x00080000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_3_toggle(void){\r
+ PORT0->OMR = 0x00080008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_3_read(void){\r
+ return(PORT0->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_4_set_mode(uint8_t mode){\r
+ PORT0->IOCR4 &= ~0x000000f8UL;\r
+ PORT0->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P0_4_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x00070000UL;\r
+ PORT0->PDR0 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P0_4_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00000300UL;\r
+ PORT0->HWSEL |= config << 8;\r
+}\r
+\r
+__STATIC_INLINE void P0_4_set(void){\r
+ PORT0->OMR = 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_4_reset(void){\r
+ PORT0->OMR = 0x00100000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_4_toggle(void){\r
+ PORT0->OMR = 0x00100010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_4_read(void){\r
+ return(PORT0->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_5_set_mode(uint8_t mode){\r
+ PORT0->IOCR4 &= ~0x0000f800UL;\r
+ PORT0->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P0_5_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x00700000UL;\r
+ PORT0->PDR0 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P0_5_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00000c00UL;\r
+ PORT0->HWSEL |= config << 10;\r
+}\r
+\r
+__STATIC_INLINE void P0_5_set(void){\r
+ PORT0->OMR = 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_5_reset(void){\r
+ PORT0->OMR = 0x00200000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_5_toggle(void){\r
+ PORT0->OMR = 0x00200020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_5_read(void){\r
+ return(PORT0->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_6_set_mode(uint8_t mode){\r
+ PORT0->IOCR4 &= ~0x00f80000UL;\r
+ PORT0->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P0_6_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x07000000UL;\r
+ PORT0->PDR0 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P0_6_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00003000UL;\r
+ PORT0->HWSEL |= config << 12;\r
+}\r
+\r
+__STATIC_INLINE void P0_6_set(void){\r
+ PORT0->OMR = 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_6_reset(void){\r
+ PORT0->OMR = 0x00400000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_6_toggle(void){\r
+ PORT0->OMR = 0x00400040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_6_read(void){\r
+ return(PORT0->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_7_set_mode(uint8_t mode){\r
+ PORT0->IOCR4 &= ~0xf8000000UL;\r
+ PORT0->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P0_7_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR0 &= ~0x70000000UL;\r
+ PORT0->PDR0 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P0_7_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x0000c000UL;\r
+ PORT0->HWSEL |= config << 14;\r
+}\r
+\r
+__STATIC_INLINE void P0_7_set(void){\r
+ PORT0->OMR = 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_7_reset(void){\r
+ PORT0->OMR = 0x00800000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_7_toggle(void){\r
+ PORT0->OMR = 0x00800080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_7_read(void){\r
+ return(PORT0->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_8_set_mode(uint8_t mode){\r
+ PORT0->IOCR8 &= ~0x000000f8UL;\r
+ PORT0->IOCR8 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P0_8_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x00000007UL;\r
+ PORT0->PDR1 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P0_8_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00030000UL;\r
+ PORT0->HWSEL |= config << 16;\r
+}\r
+\r
+__STATIC_INLINE void P0_8_set(void){\r
+ PORT0->OMR = 0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_8_reset(void){\r
+ PORT0->OMR = 0x01000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_8_toggle(void){\r
+ PORT0->OMR = 0x01000100UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_8_read(void){\r
+ return(PORT0->IN & 0x00000100UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_9_set_mode(uint8_t mode){\r
+ PORT0->IOCR8 &= ~0x0000f800UL;\r
+ PORT0->IOCR8 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P0_9_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x00000070UL;\r
+ PORT0->PDR1 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P0_9_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x000c0000UL;\r
+ PORT0->HWSEL |= config << 18;\r
+}\r
+\r
+__STATIC_INLINE void P0_9_set(void){\r
+ PORT0->OMR = 0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_9_reset(void){\r
+ PORT0->OMR = 0x02000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_9_toggle(void){\r
+ PORT0->OMR = 0x02000200UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_9_read(void){\r
+ return(PORT0->IN & 0x00000200UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_10_set_mode(uint8_t mode){\r
+ PORT0->IOCR8 &= ~0x00f80000UL;\r
+ PORT0->IOCR8 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P0_10_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x00000700UL;\r
+ PORT0->PDR1 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P0_10_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00300000UL;\r
+ PORT0->HWSEL |= config << 20;\r
+}\r
+\r
+__STATIC_INLINE void P0_10_set(void){\r
+ PORT0->OMR = 0x00000400UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_10_reset(void){\r
+ PORT0->OMR = 0x04000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_10_toggle(void){\r
+ PORT0->OMR = 0x04000400UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_10_read(void){\r
+ return(PORT0->IN & 0x00000400UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_11_set_mode(uint8_t mode){\r
+ PORT0->IOCR8 &= ~0xf8000000UL;\r
+ PORT0->IOCR8 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P0_11_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x00007000UL;\r
+ PORT0->PDR1 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P0_11_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x00c00000UL;\r
+ PORT0->HWSEL |= config << 22;\r
+}\r
+\r
+__STATIC_INLINE void P0_11_set(void){\r
+ PORT0->OMR = 0x00000800UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_11_reset(void){\r
+ PORT0->OMR = 0x08000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_11_toggle(void){\r
+ PORT0->OMR = 0x08000800UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_11_read(void){\r
+ return(PORT0->IN & 0x00000800UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_12_set_mode(uint8_t mode){\r
+ PORT0->IOCR12 &= ~0x000000f8UL;\r
+ PORT0->IOCR12 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P0_12_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x00070000UL;\r
+ PORT0->PDR1 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P0_12_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x03000000UL;\r
+ PORT0->HWSEL |= config << 24;\r
+}\r
+\r
+__STATIC_INLINE void P0_12_set(void){\r
+ PORT0->OMR = 0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_12_reset(void){\r
+ PORT0->OMR = 0x10000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_12_toggle(void){\r
+ PORT0->OMR = 0x10001000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_12_read(void){\r
+ return(PORT0->IN & 0x00001000UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_13_set_mode(uint8_t mode){\r
+ PORT0->IOCR12 &= ~0x0000f800UL;\r
+ PORT0->IOCR12 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P0_13_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x00700000UL;\r
+ PORT0->PDR1 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P0_13_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x0c000000UL;\r
+ PORT0->HWSEL |= config << 26;\r
+}\r
+\r
+__STATIC_INLINE void P0_13_set(void){\r
+ PORT0->OMR = 0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_13_reset(void){\r
+ PORT0->OMR = 0x20000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_13_toggle(void){\r
+ PORT0->OMR = 0x20002000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_13_read(void){\r
+ return(PORT0->IN & 0x00002000UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_14_set_mode(uint8_t mode){\r
+ PORT0->IOCR12 &= ~0x00f80000UL;\r
+ PORT0->IOCR12 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P0_14_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x07000000UL;\r
+ PORT0->PDR1 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P0_14_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0x30000000UL;\r
+ PORT0->HWSEL |= config << 28;\r
+}\r
+\r
+__STATIC_INLINE void P0_14_set(void){\r
+ PORT0->OMR = 0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_14_reset(void){\r
+ PORT0->OMR = 0x40000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_14_toggle(void){\r
+ PORT0->OMR = 0x40004000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_14_read(void){\r
+ return(PORT0->IN & 0x00004000UL);\r
+}\r
+\r
+__STATIC_INLINE void P0_15_set_mode(uint8_t mode){\r
+ PORT0->IOCR12 &= ~0xf8000000UL;\r
+ PORT0->IOCR12 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P0_15_set_driver_strength(uint8_t strength){\r
+ PORT0->PDR1 &= ~0x70000000UL;\r
+ PORT0->PDR1 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P0_15_set_hwsel(uint32_t config){\r
+ PORT0->HWSEL &= ~0xc0000000UL;\r
+ PORT0->HWSEL |= config << 30;\r
+}\r
+\r
+__STATIC_INLINE void P0_15_set(void){\r
+ PORT0->OMR = 0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_15_reset(void){\r
+ PORT0->OMR = 0x80000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P0_15_toggle(void){\r
+ PORT0->OMR = 0x80008000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P0_15_read(void){\r
+ return(PORT0->IN & 0x00008000UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_0_set_mode(uint8_t mode){\r
+ PORT1->IOCR0 &= ~0x000000f8UL;\r
+ PORT1->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P1_0_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x00000007UL;\r
+ PORT1->PDR0 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P1_0_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00000003UL;\r
+ PORT1->HWSEL |= config << 0;\r
+}\r
+\r
+__STATIC_INLINE void P1_0_set(void){\r
+ PORT1->OMR = 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_0_reset(void){\r
+ PORT1->OMR = 0x00010000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_0_toggle(void){\r
+ PORT1->OMR = 0x00010001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_0_read(void){\r
+ return(PORT1->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_1_set_mode(uint8_t mode){\r
+ PORT1->IOCR0 &= ~0x0000f800UL;\r
+ PORT1->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P1_1_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x00000070UL;\r
+ PORT1->PDR0 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P1_1_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x0000000cUL;\r
+ PORT1->HWSEL |= config << 2;\r
+}\r
+\r
+__STATIC_INLINE void P1_1_set(void){\r
+ PORT1->OMR = 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_1_reset(void){\r
+ PORT1->OMR = 0x00020000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_1_toggle(void){\r
+ PORT1->OMR = 0x00020002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_1_read(void){\r
+ return(PORT1->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_2_set_mode(uint8_t mode){\r
+ PORT1->IOCR0 &= ~0x00f80000UL;\r
+ PORT1->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P1_2_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x00000700UL;\r
+ PORT1->PDR0 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P1_2_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00000030UL;\r
+ PORT1->HWSEL |= config << 4;\r
+}\r
+\r
+__STATIC_INLINE void P1_2_set(void){\r
+ PORT1->OMR = 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_2_reset(void){\r
+ PORT1->OMR = 0x00040000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_2_toggle(void){\r
+ PORT1->OMR = 0x00040004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_2_read(void){\r
+ return(PORT1->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_3_set_mode(uint8_t mode){\r
+ PORT1->IOCR0 &= ~0xf8000000UL;\r
+ PORT1->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P1_3_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x00007000UL;\r
+ PORT1->PDR0 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P1_3_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x000000c0UL;\r
+ PORT1->HWSEL |= config << 6;\r
+}\r
+\r
+__STATIC_INLINE void P1_3_set(void){\r
+ PORT1->OMR = 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_3_reset(void){\r
+ PORT1->OMR = 0x00080000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_3_toggle(void){\r
+ PORT1->OMR = 0x00080008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_3_read(void){\r
+ return(PORT1->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_4_set_mode(uint8_t mode){\r
+ PORT1->IOCR4 &= ~0x000000f8UL;\r
+ PORT1->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P1_4_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x00070000UL;\r
+ PORT1->PDR0 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P1_4_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00000300UL;\r
+ PORT1->HWSEL |= config << 8;\r
+}\r
+\r
+__STATIC_INLINE void P1_4_set(void){\r
+ PORT1->OMR = 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_4_reset(void){\r
+ PORT1->OMR = 0x00100000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_4_toggle(void){\r
+ PORT1->OMR = 0x00100010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_4_read(void){\r
+ return(PORT1->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_5_set_mode(uint8_t mode){\r
+ PORT1->IOCR4 &= ~0x0000f800UL;\r
+ PORT1->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P1_5_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x00700000UL;\r
+ PORT1->PDR0 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P1_5_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00000c00UL;\r
+ PORT1->HWSEL |= config << 10;\r
+}\r
+\r
+__STATIC_INLINE void P1_5_set(void){\r
+ PORT1->OMR = 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_5_reset(void){\r
+ PORT1->OMR = 0x00200000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_5_toggle(void){\r
+ PORT1->OMR = 0x00200020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_5_read(void){\r
+ return(PORT1->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_6_set_mode(uint8_t mode){\r
+ PORT1->IOCR4 &= ~0x00f80000UL;\r
+ PORT1->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P1_6_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x07000000UL;\r
+ PORT1->PDR0 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P1_6_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00003000UL;\r
+ PORT1->HWSEL |= config << 12;\r
+}\r
+\r
+__STATIC_INLINE void P1_6_set(void){\r
+ PORT1->OMR = 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_6_reset(void){\r
+ PORT1->OMR = 0x00400000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_6_toggle(void){\r
+ PORT1->OMR = 0x00400040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_6_read(void){\r
+ return(PORT1->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_7_set_mode(uint8_t mode){\r
+ PORT1->IOCR4 &= ~0xf8000000UL;\r
+ PORT1->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P1_7_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR0 &= ~0x70000000UL;\r
+ PORT1->PDR0 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P1_7_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x0000c000UL;\r
+ PORT1->HWSEL |= config << 14;\r
+}\r
+\r
+__STATIC_INLINE void P1_7_set(void){\r
+ PORT1->OMR = 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_7_reset(void){\r
+ PORT1->OMR = 0x00800000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_7_toggle(void){\r
+ PORT1->OMR = 0x00800080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_7_read(void){\r
+ return(PORT1->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_8_set_mode(uint8_t mode){\r
+ PORT1->IOCR8 &= ~0x000000f8UL;\r
+ PORT1->IOCR8 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P1_8_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x00000007UL;\r
+ PORT1->PDR1 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P1_8_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00030000UL;\r
+ PORT1->HWSEL |= config << 16;\r
+}\r
+\r
+__STATIC_INLINE void P1_8_set(void){\r
+ PORT1->OMR = 0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_8_reset(void){\r
+ PORT1->OMR = 0x01000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_8_toggle(void){\r
+ PORT1->OMR = 0x01000100UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_8_read(void){\r
+ return(PORT1->IN & 0x00000100UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_9_set_mode(uint8_t mode){\r
+ PORT1->IOCR8 &= ~0x0000f800UL;\r
+ PORT1->IOCR8 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P1_9_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x00000070UL;\r
+ PORT1->PDR1 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P1_9_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x000c0000UL;\r
+ PORT1->HWSEL |= config << 18;\r
+}\r
+\r
+__STATIC_INLINE void P1_9_set(void){\r
+ PORT1->OMR = 0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_9_reset(void){\r
+ PORT1->OMR = 0x02000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_9_toggle(void){\r
+ PORT1->OMR = 0x02000200UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_9_read(void){\r
+ return(PORT1->IN & 0x00000200UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_10_set_mode(uint8_t mode){\r
+ PORT1->IOCR8 &= ~0x00f80000UL;\r
+ PORT1->IOCR8 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P1_10_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x00000700UL;\r
+ PORT1->PDR1 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P1_10_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00300000UL;\r
+ PORT1->HWSEL |= config << 20;\r
+}\r
+\r
+__STATIC_INLINE void P1_10_set(void){\r
+ PORT1->OMR = 0x00000400UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_10_reset(void){\r
+ PORT1->OMR = 0x04000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_10_toggle(void){\r
+ PORT1->OMR = 0x04000400UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_10_read(void){\r
+ return(PORT1->IN & 0x00000400UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_11_set_mode(uint8_t mode){\r
+ PORT1->IOCR8 &= ~0xf8000000UL;\r
+ PORT1->IOCR8 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P1_11_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x00007000UL;\r
+ PORT1->PDR1 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P1_11_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x00c00000UL;\r
+ PORT1->HWSEL |= config << 22;\r
+}\r
+\r
+__STATIC_INLINE void P1_11_set(void){\r
+ PORT1->OMR = 0x00000800UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_11_reset(void){\r
+ PORT1->OMR = 0x08000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_11_toggle(void){\r
+ PORT1->OMR = 0x08000800UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_11_read(void){\r
+ return(PORT1->IN & 0x00000800UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_12_set_mode(uint8_t mode){\r
+ PORT1->IOCR12 &= ~0x000000f8UL;\r
+ PORT1->IOCR12 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P1_12_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x00070000UL;\r
+ PORT1->PDR1 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P1_12_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x03000000UL;\r
+ PORT1->HWSEL |= config << 24;\r
+}\r
+\r
+__STATIC_INLINE void P1_12_set(void){\r
+ PORT1->OMR = 0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_12_reset(void){\r
+ PORT1->OMR = 0x10000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_12_toggle(void){\r
+ PORT1->OMR = 0x10001000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_12_read(void){\r
+ return(PORT1->IN & 0x00001000UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_13_set_mode(uint8_t mode){\r
+ PORT1->IOCR12 &= ~0x0000f800UL;\r
+ PORT1->IOCR12 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P1_13_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x00700000UL;\r
+ PORT1->PDR1 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P1_13_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x0c000000UL;\r
+ PORT1->HWSEL |= config << 26;\r
+}\r
+\r
+__STATIC_INLINE void P1_13_set(void){\r
+ PORT1->OMR = 0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_13_reset(void){\r
+ PORT1->OMR = 0x20000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_13_toggle(void){\r
+ PORT1->OMR = 0x20002000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_13_read(void){\r
+ return(PORT1->IN & 0x00002000UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_14_set_mode(uint8_t mode){\r
+ PORT1->IOCR12 &= ~0x00f80000UL;\r
+ PORT1->IOCR12 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P1_14_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x07000000UL;\r
+ PORT1->PDR1 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P1_14_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0x30000000UL;\r
+ PORT1->HWSEL |= config << 28;\r
+}\r
+\r
+__STATIC_INLINE void P1_14_set(void){\r
+ PORT1->OMR = 0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_14_reset(void){\r
+ PORT1->OMR = 0x40000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_14_toggle(void){\r
+ PORT1->OMR = 0x40004000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_14_read(void){\r
+ return(PORT1->IN & 0x00004000UL);\r
+}\r
+\r
+__STATIC_INLINE void P1_15_set_mode(uint8_t mode){\r
+ PORT1->IOCR12 &= ~0xf8000000UL;\r
+ PORT1->IOCR12 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P1_15_set_driver_strength(uint8_t strength){\r
+ PORT1->PDR1 &= ~0x70000000UL;\r
+ PORT1->PDR1 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P1_15_set_hwsel(uint32_t config){\r
+ PORT1->HWSEL &= ~0xc0000000UL;\r
+ PORT1->HWSEL |= config << 30;\r
+}\r
+\r
+__STATIC_INLINE void P1_15_set(void){\r
+ PORT1->OMR = 0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_15_reset(void){\r
+ PORT1->OMR = 0x80000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P1_15_toggle(void){\r
+ PORT1->OMR = 0x80008000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P1_15_read(void){\r
+ return(PORT1->IN & 0x00008000UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_0_set_mode(uint8_t mode){\r
+ PORT2->IOCR0 &= ~0x000000f8UL;\r
+ PORT2->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P2_0_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x00000007UL;\r
+ PORT2->PDR0 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P2_0_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00000003UL;\r
+ PORT2->HWSEL |= config << 0;\r
+}\r
+\r
+__STATIC_INLINE void P2_0_set(void){\r
+ PORT2->OMR = 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_0_reset(void){\r
+ PORT2->OMR = 0x00010000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_0_toggle(void){\r
+ PORT2->OMR = 0x00010001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_0_read(void){\r
+ return(PORT2->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_1_set_mode(uint8_t mode){\r
+ PORT2->IOCR0 &= ~0x0000f800UL;\r
+ PORT2->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P2_1_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x00000070UL;\r
+ PORT2->PDR0 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P2_1_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x0000000cUL;\r
+ PORT2->HWSEL |= config << 2;\r
+}\r
+\r
+__STATIC_INLINE void P2_1_set(void){\r
+ PORT2->OMR = 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_1_reset(void){\r
+ PORT2->OMR = 0x00020000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_1_toggle(void){\r
+ PORT2->OMR = 0x00020002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_1_read(void){\r
+ return(PORT2->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_2_set_mode(uint8_t mode){\r
+ PORT2->IOCR0 &= ~0x00f80000UL;\r
+ PORT2->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P2_2_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x00000700UL;\r
+ PORT2->PDR0 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P2_2_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00000030UL;\r
+ PORT2->HWSEL |= config << 4;\r
+}\r
+\r
+__STATIC_INLINE void P2_2_set(void){\r
+ PORT2->OMR = 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_2_reset(void){\r
+ PORT2->OMR = 0x00040000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_2_toggle(void){\r
+ PORT2->OMR = 0x00040004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_2_read(void){\r
+ return(PORT2->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_3_set_mode(uint8_t mode){\r
+ PORT2->IOCR0 &= ~0xf8000000UL;\r
+ PORT2->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P2_3_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x00007000UL;\r
+ PORT2->PDR0 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P2_3_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x000000c0UL;\r
+ PORT2->HWSEL |= config << 6;\r
+}\r
+\r
+__STATIC_INLINE void P2_3_set(void){\r
+ PORT2->OMR = 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_3_reset(void){\r
+ PORT2->OMR = 0x00080000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_3_toggle(void){\r
+ PORT2->OMR = 0x00080008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_3_read(void){\r
+ return(PORT2->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_4_set_mode(uint8_t mode){\r
+ PORT2->IOCR4 &= ~0x000000f8UL;\r
+ PORT2->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P2_4_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x00070000UL;\r
+ PORT2->PDR0 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P2_4_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00000300UL;\r
+ PORT2->HWSEL |= config << 8;\r
+}\r
+\r
+__STATIC_INLINE void P2_4_set(void){\r
+ PORT2->OMR = 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_4_reset(void){\r
+ PORT2->OMR = 0x00100000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_4_toggle(void){\r
+ PORT2->OMR = 0x00100010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_4_read(void){\r
+ return(PORT2->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_5_set_mode(uint8_t mode){\r
+ PORT2->IOCR4 &= ~0x0000f800UL;\r
+ PORT2->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P2_5_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x00700000UL;\r
+ PORT2->PDR0 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P2_5_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00000c00UL;\r
+ PORT2->HWSEL |= config << 10;\r
+}\r
+\r
+__STATIC_INLINE void P2_5_set(void){\r
+ PORT2->OMR = 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_5_reset(void){\r
+ PORT2->OMR = 0x00200000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_5_toggle(void){\r
+ PORT2->OMR = 0x00200020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_5_read(void){\r
+ return(PORT2->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_6_set_mode(uint8_t mode){\r
+ PORT2->IOCR4 &= ~0x00f80000UL;\r
+ PORT2->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P2_6_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x07000000UL;\r
+ PORT2->PDR0 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P2_6_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00003000UL;\r
+ PORT2->HWSEL |= config << 12;\r
+}\r
+\r
+__STATIC_INLINE void P2_6_set(void){\r
+ PORT2->OMR = 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_6_reset(void){\r
+ PORT2->OMR = 0x00400000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_6_toggle(void){\r
+ PORT2->OMR = 0x00400040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_6_read(void){\r
+ return(PORT2->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_7_set_mode(uint8_t mode){\r
+ PORT2->IOCR4 &= ~0xf8000000UL;\r
+ PORT2->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P2_7_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR0 &= ~0x70000000UL;\r
+ PORT2->PDR0 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P2_7_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x0000c000UL;\r
+ PORT2->HWSEL |= config << 14;\r
+}\r
+\r
+__STATIC_INLINE void P2_7_set(void){\r
+ PORT2->OMR = 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_7_reset(void){\r
+ PORT2->OMR = 0x00800000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_7_toggle(void){\r
+ PORT2->OMR = 0x00800080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_7_read(void){\r
+ return(PORT2->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_8_set_mode(uint8_t mode){\r
+ PORT2->IOCR8 &= ~0x000000f8UL;\r
+ PORT2->IOCR8 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P2_8_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x00000007UL;\r
+ PORT2->PDR1 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P2_8_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00030000UL;\r
+ PORT2->HWSEL |= config << 16;\r
+}\r
+\r
+__STATIC_INLINE void P2_8_set(void){\r
+ PORT2->OMR = 0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_8_reset(void){\r
+ PORT2->OMR = 0x01000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_8_toggle(void){\r
+ PORT2->OMR = 0x01000100UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_8_read(void){\r
+ return(PORT2->IN & 0x00000100UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_9_set_mode(uint8_t mode){\r
+ PORT2->IOCR8 &= ~0x0000f800UL;\r
+ PORT2->IOCR8 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P2_9_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x00000070UL;\r
+ PORT2->PDR1 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P2_9_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x000c0000UL;\r
+ PORT2->HWSEL |= config << 18;\r
+}\r
+\r
+__STATIC_INLINE void P2_9_set(void){\r
+ PORT2->OMR = 0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_9_reset(void){\r
+ PORT2->OMR = 0x02000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_9_toggle(void){\r
+ PORT2->OMR = 0x02000200UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_9_read(void){\r
+ return(PORT2->IN & 0x00000200UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_10_set_mode(uint8_t mode){\r
+ PORT2->IOCR8 &= ~0x00f80000UL;\r
+ PORT2->IOCR8 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P2_10_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x00000700UL;\r
+ PORT2->PDR1 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P2_10_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00300000UL;\r
+ PORT2->HWSEL |= config << 20;\r
+}\r
+\r
+__STATIC_INLINE void P2_10_set(void){\r
+ PORT2->OMR = 0x00000400UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_10_reset(void){\r
+ PORT2->OMR = 0x04000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_10_toggle(void){\r
+ PORT2->OMR = 0x04000400UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_10_read(void){\r
+ return(PORT2->IN & 0x00000400UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_11_set_mode(uint8_t mode){\r
+ PORT2->IOCR8 &= ~0xf8000000UL;\r
+ PORT2->IOCR8 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P2_11_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x00007000UL;\r
+ PORT2->PDR1 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P2_11_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x00c00000UL;\r
+ PORT2->HWSEL |= config << 22;\r
+}\r
+\r
+__STATIC_INLINE void P2_11_set(void){\r
+ PORT2->OMR = 0x00000800UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_11_reset(void){\r
+ PORT2->OMR = 0x08000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_11_toggle(void){\r
+ PORT2->OMR = 0x08000800UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_11_read(void){\r
+ return(PORT2->IN & 0x00000800UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_12_set_mode(uint8_t mode){\r
+ PORT2->IOCR12 &= ~0x000000f8UL;\r
+ PORT2->IOCR12 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P2_12_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x00070000UL;\r
+ PORT2->PDR1 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P2_12_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x03000000UL;\r
+ PORT2->HWSEL |= config << 24;\r
+}\r
+\r
+__STATIC_INLINE void P2_12_set(void){\r
+ PORT2->OMR = 0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_12_reset(void){\r
+ PORT2->OMR = 0x10000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_12_toggle(void){\r
+ PORT2->OMR = 0x10001000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_12_read(void){\r
+ return(PORT2->IN & 0x00001000UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_13_set_mode(uint8_t mode){\r
+ PORT2->IOCR12 &= ~0x0000f800UL;\r
+ PORT2->IOCR12 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P2_13_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x00700000UL;\r
+ PORT2->PDR1 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P2_13_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x0c000000UL;\r
+ PORT2->HWSEL |= config << 26;\r
+}\r
+\r
+__STATIC_INLINE void P2_13_set(void){\r
+ PORT2->OMR = 0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_13_reset(void){\r
+ PORT2->OMR = 0x20000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_13_toggle(void){\r
+ PORT2->OMR = 0x20002000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_13_read(void){\r
+ return(PORT2->IN & 0x00002000UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_14_set_mode(uint8_t mode){\r
+ PORT2->IOCR12 &= ~0x00f80000UL;\r
+ PORT2->IOCR12 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P2_14_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x07000000UL;\r
+ PORT2->PDR1 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P2_14_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0x30000000UL;\r
+ PORT2->HWSEL |= config << 28;\r
+}\r
+\r
+__STATIC_INLINE void P2_14_set(void){\r
+ PORT2->OMR = 0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_14_reset(void){\r
+ PORT2->OMR = 0x40000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_14_toggle(void){\r
+ PORT2->OMR = 0x40004000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_14_read(void){\r
+ return(PORT2->IN & 0x00004000UL);\r
+}\r
+\r
+__STATIC_INLINE void P2_15_set_mode(uint8_t mode){\r
+ PORT2->IOCR12 &= ~0xf8000000UL;\r
+ PORT2->IOCR12 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P2_15_set_driver_strength(uint8_t strength){\r
+ PORT2->PDR1 &= ~0x70000000UL;\r
+ PORT2->PDR1 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P2_15_set_hwsel(uint32_t config){\r
+ PORT2->HWSEL &= ~0xc0000000UL;\r
+ PORT2->HWSEL |= config << 30;\r
+}\r
+\r
+__STATIC_INLINE void P2_15_set(void){\r
+ PORT2->OMR = 0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_15_reset(void){\r
+ PORT2->OMR = 0x80000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P2_15_toggle(void){\r
+ PORT2->OMR = 0x80008000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P2_15_read(void){\r
+ return(PORT2->IN & 0x00008000UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_0_set_mode(uint8_t mode){\r
+ PORT3->IOCR0 &= ~0x000000f8UL;\r
+ PORT3->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P3_0_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x00000007UL;\r
+ PORT3->PDR0 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P3_0_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00000003UL;\r
+ PORT3->HWSEL |= config << 0;\r
+}\r
+\r
+__STATIC_INLINE void P3_0_set(void){\r
+ PORT3->OMR = 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_0_reset(void){\r
+ PORT3->OMR = 0x00010000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_0_toggle(void){\r
+ PORT3->OMR = 0x00010001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_0_read(void){\r
+ return(PORT3->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_1_set_mode(uint8_t mode){\r
+ PORT3->IOCR0 &= ~0x0000f800UL;\r
+ PORT3->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P3_1_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x00000070UL;\r
+ PORT3->PDR0 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P3_1_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x0000000cUL;\r
+ PORT3->HWSEL |= config << 2;\r
+}\r
+\r
+__STATIC_INLINE void P3_1_set(void){\r
+ PORT3->OMR = 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_1_reset(void){\r
+ PORT3->OMR = 0x00020000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_1_toggle(void){\r
+ PORT3->OMR = 0x00020002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_1_read(void){\r
+ return(PORT3->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_2_set_mode(uint8_t mode){\r
+ PORT3->IOCR0 &= ~0x00f80000UL;\r
+ PORT3->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P3_2_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x00000700UL;\r
+ PORT3->PDR0 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P3_2_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00000030UL;\r
+ PORT3->HWSEL |= config << 4;\r
+}\r
+\r
+__STATIC_INLINE void P3_2_set(void){\r
+ PORT3->OMR = 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_2_reset(void){\r
+ PORT3->OMR = 0x00040000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_2_toggle(void){\r
+ PORT3->OMR = 0x00040004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_2_read(void){\r
+ return(PORT3->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_3_set_mode(uint8_t mode){\r
+ PORT3->IOCR0 &= ~0xf8000000UL;\r
+ PORT3->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P3_3_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x00007000UL;\r
+ PORT3->PDR0 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P3_3_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x000000c0UL;\r
+ PORT3->HWSEL |= config << 6;\r
+}\r
+\r
+__STATIC_INLINE void P3_3_set(void){\r
+ PORT3->OMR = 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_3_reset(void){\r
+ PORT3->OMR = 0x00080000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_3_toggle(void){\r
+ PORT3->OMR = 0x00080008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_3_read(void){\r
+ return(PORT3->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_4_set_mode(uint8_t mode){\r
+ PORT3->IOCR4 &= ~0x000000f8UL;\r
+ PORT3->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P3_4_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x00070000UL;\r
+ PORT3->PDR0 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P3_4_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00000300UL;\r
+ PORT3->HWSEL |= config << 8;\r
+}\r
+\r
+__STATIC_INLINE void P3_4_set(void){\r
+ PORT3->OMR = 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_4_reset(void){\r
+ PORT3->OMR = 0x00100000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_4_toggle(void){\r
+ PORT3->OMR = 0x00100010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_4_read(void){\r
+ return(PORT3->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_5_set_mode(uint8_t mode){\r
+ PORT3->IOCR4 &= ~0x0000f800UL;\r
+ PORT3->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P3_5_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x00700000UL;\r
+ PORT3->PDR0 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P3_5_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00000c00UL;\r
+ PORT3->HWSEL |= config << 10;\r
+}\r
+\r
+__STATIC_INLINE void P3_5_set(void){\r
+ PORT3->OMR = 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_5_reset(void){\r
+ PORT3->OMR = 0x00200000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_5_toggle(void){\r
+ PORT3->OMR = 0x00200020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_5_read(void){\r
+ return(PORT3->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_6_set_mode(uint8_t mode){\r
+ PORT3->IOCR4 &= ~0x00f80000UL;\r
+ PORT3->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P3_6_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x07000000UL;\r
+ PORT3->PDR0 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P3_6_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00003000UL;\r
+ PORT3->HWSEL |= config << 12;\r
+}\r
+\r
+__STATIC_INLINE void P3_6_set(void){\r
+ PORT3->OMR = 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_6_reset(void){\r
+ PORT3->OMR = 0x00400000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_6_toggle(void){\r
+ PORT3->OMR = 0x00400040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_6_read(void){\r
+ return(PORT3->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_7_set_mode(uint8_t mode){\r
+ PORT3->IOCR4 &= ~0xf8000000UL;\r
+ PORT3->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P3_7_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR0 &= ~0x70000000UL;\r
+ PORT3->PDR0 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P3_7_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x0000c000UL;\r
+ PORT3->HWSEL |= config << 14;\r
+}\r
+\r
+__STATIC_INLINE void P3_7_set(void){\r
+ PORT3->OMR = 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_7_reset(void){\r
+ PORT3->OMR = 0x00800000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_7_toggle(void){\r
+ PORT3->OMR = 0x00800080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_7_read(void){\r
+ return(PORT3->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_8_set_mode(uint8_t mode){\r
+ PORT3->IOCR8 &= ~0x000000f8UL;\r
+ PORT3->IOCR8 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P3_8_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x00000007UL;\r
+ PORT3->PDR1 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P3_8_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00030000UL;\r
+ PORT3->HWSEL |= config << 16;\r
+}\r
+\r
+__STATIC_INLINE void P3_8_set(void){\r
+ PORT3->OMR = 0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_8_reset(void){\r
+ PORT3->OMR = 0x01000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_8_toggle(void){\r
+ PORT3->OMR = 0x01000100UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_8_read(void){\r
+ return(PORT3->IN & 0x00000100UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_9_set_mode(uint8_t mode){\r
+ PORT3->IOCR8 &= ~0x0000f800UL;\r
+ PORT3->IOCR8 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P3_9_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x00000070UL;\r
+ PORT3->PDR1 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P3_9_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x000c0000UL;\r
+ PORT3->HWSEL |= config << 18;\r
+}\r
+\r
+__STATIC_INLINE void P3_9_set(void){\r
+ PORT3->OMR = 0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_9_reset(void){\r
+ PORT3->OMR = 0x02000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_9_toggle(void){\r
+ PORT3->OMR = 0x02000200UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_9_read(void){\r
+ return(PORT3->IN & 0x00000200UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_10_set_mode(uint8_t mode){\r
+ PORT3->IOCR8 &= ~0x00f80000UL;\r
+ PORT3->IOCR8 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P3_10_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x00000700UL;\r
+ PORT3->PDR1 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P3_10_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00300000UL;\r
+ PORT3->HWSEL |= config << 20;\r
+}\r
+\r
+__STATIC_INLINE void P3_10_set(void){\r
+ PORT3->OMR = 0x00000400UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_10_reset(void){\r
+ PORT3->OMR = 0x04000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_10_toggle(void){\r
+ PORT3->OMR = 0x04000400UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_10_read(void){\r
+ return(PORT3->IN & 0x00000400UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_11_set_mode(uint8_t mode){\r
+ PORT3->IOCR8 &= ~0xf8000000UL;\r
+ PORT3->IOCR8 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P3_11_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x00007000UL;\r
+ PORT3->PDR1 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P3_11_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x00c00000UL;\r
+ PORT3->HWSEL |= config << 22;\r
+}\r
+\r
+__STATIC_INLINE void P3_11_set(void){\r
+ PORT3->OMR = 0x00000800UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_11_reset(void){\r
+ PORT3->OMR = 0x08000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_11_toggle(void){\r
+ PORT3->OMR = 0x08000800UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_11_read(void){\r
+ return(PORT3->IN & 0x00000800UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_12_set_mode(uint8_t mode){\r
+ PORT3->IOCR12 &= ~0x000000f8UL;\r
+ PORT3->IOCR12 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P3_12_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x00070000UL;\r
+ PORT3->PDR1 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P3_12_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x03000000UL;\r
+ PORT3->HWSEL |= config << 24;\r
+}\r
+\r
+__STATIC_INLINE void P3_12_set(void){\r
+ PORT3->OMR = 0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_12_reset(void){\r
+ PORT3->OMR = 0x10000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_12_toggle(void){\r
+ PORT3->OMR = 0x10001000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_12_read(void){\r
+ return(PORT3->IN & 0x00001000UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_13_set_mode(uint8_t mode){\r
+ PORT3->IOCR12 &= ~0x0000f800UL;\r
+ PORT3->IOCR12 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P3_13_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x00700000UL;\r
+ PORT3->PDR1 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P3_13_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x0c000000UL;\r
+ PORT3->HWSEL |= config << 26;\r
+}\r
+\r
+__STATIC_INLINE void P3_13_set(void){\r
+ PORT3->OMR = 0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_13_reset(void){\r
+ PORT3->OMR = 0x20000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_13_toggle(void){\r
+ PORT3->OMR = 0x20002000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_13_read(void){\r
+ return(PORT3->IN & 0x00002000UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_14_set_mode(uint8_t mode){\r
+ PORT3->IOCR12 &= ~0x00f80000UL;\r
+ PORT3->IOCR12 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P3_14_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x07000000UL;\r
+ PORT3->PDR1 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P3_14_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0x30000000UL;\r
+ PORT3->HWSEL |= config << 28;\r
+}\r
+\r
+__STATIC_INLINE void P3_14_set(void){\r
+ PORT3->OMR = 0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_14_reset(void){\r
+ PORT3->OMR = 0x40000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_14_toggle(void){\r
+ PORT3->OMR = 0x40004000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_14_read(void){\r
+ return(PORT3->IN & 0x00004000UL);\r
+}\r
+\r
+__STATIC_INLINE void P3_15_set_mode(uint8_t mode){\r
+ PORT3->IOCR12 &= ~0xf8000000UL;\r
+ PORT3->IOCR12 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P3_15_set_driver_strength(uint8_t strength){\r
+ PORT3->PDR1 &= ~0x70000000UL;\r
+ PORT3->PDR1 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P3_15_set_hwsel(uint32_t config){\r
+ PORT3->HWSEL &= ~0xc0000000UL;\r
+ PORT3->HWSEL |= config << 30;\r
+}\r
+\r
+__STATIC_INLINE void P3_15_set(void){\r
+ PORT3->OMR = 0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_15_reset(void){\r
+ PORT3->OMR = 0x80000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P3_15_toggle(void){\r
+ PORT3->OMR = 0x80008000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P3_15_read(void){\r
+ return(PORT3->IN & 0x00008000UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_0_set_mode(uint8_t mode){\r
+ PORT4->IOCR0 &= ~0x000000f8UL;\r
+ PORT4->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P4_0_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x00000007UL;\r
+ PORT4->PDR0 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P4_0_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x00000003UL;\r
+ PORT4->HWSEL |= config << 0;\r
+}\r
+\r
+__STATIC_INLINE void P4_0_set(void){\r
+ PORT4->OMR = 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_0_reset(void){\r
+ PORT4->OMR = 0x00010000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_0_toggle(void){\r
+ PORT4->OMR = 0x00010001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_0_read(void){\r
+ return(PORT4->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_1_set_mode(uint8_t mode){\r
+ PORT4->IOCR0 &= ~0x0000f800UL;\r
+ PORT4->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P4_1_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x00000070UL;\r
+ PORT4->PDR0 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P4_1_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x0000000cUL;\r
+ PORT4->HWSEL |= config << 2;\r
+}\r
+\r
+__STATIC_INLINE void P4_1_set(void){\r
+ PORT4->OMR = 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_1_reset(void){\r
+ PORT4->OMR = 0x00020000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_1_toggle(void){\r
+ PORT4->OMR = 0x00020002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_1_read(void){\r
+ return(PORT4->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_2_set_mode(uint8_t mode){\r
+ PORT4->IOCR0 &= ~0x00f80000UL;\r
+ PORT4->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P4_2_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x00000700UL;\r
+ PORT4->PDR0 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P4_2_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x00000030UL;\r
+ PORT4->HWSEL |= config << 4;\r
+}\r
+\r
+__STATIC_INLINE void P4_2_set(void){\r
+ PORT4->OMR = 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_2_reset(void){\r
+ PORT4->OMR = 0x00040000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_2_toggle(void){\r
+ PORT4->OMR = 0x00040004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_2_read(void){\r
+ return(PORT4->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_3_set_mode(uint8_t mode){\r
+ PORT4->IOCR0 &= ~0xf8000000UL;\r
+ PORT4->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P4_3_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x00007000UL;\r
+ PORT4->PDR0 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P4_3_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x000000c0UL;\r
+ PORT4->HWSEL |= config << 6;\r
+}\r
+\r
+__STATIC_INLINE void P4_3_set(void){\r
+ PORT4->OMR = 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_3_reset(void){\r
+ PORT4->OMR = 0x00080000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_3_toggle(void){\r
+ PORT4->OMR = 0x00080008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_3_read(void){\r
+ return(PORT4->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_4_set_mode(uint8_t mode){\r
+ PORT4->IOCR4 &= ~0x000000f8UL;\r
+ PORT4->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P4_4_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x00070000UL;\r
+ PORT4->PDR0 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P4_4_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x00000300UL;\r
+ PORT4->HWSEL |= config << 8;\r
+}\r
+\r
+__STATIC_INLINE void P4_4_set(void){\r
+ PORT4->OMR = 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_4_reset(void){\r
+ PORT4->OMR = 0x00100000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_4_toggle(void){\r
+ PORT4->OMR = 0x00100010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_4_read(void){\r
+ return(PORT4->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_5_set_mode(uint8_t mode){\r
+ PORT4->IOCR4 &= ~0x0000f800UL;\r
+ PORT4->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P4_5_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x00700000UL;\r
+ PORT4->PDR0 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P4_5_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x00000c00UL;\r
+ PORT4->HWSEL |= config << 10;\r
+}\r
+\r
+__STATIC_INLINE void P4_5_set(void){\r
+ PORT4->OMR = 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_5_reset(void){\r
+ PORT4->OMR = 0x00200000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_5_toggle(void){\r
+ PORT4->OMR = 0x00200020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_5_read(void){\r
+ return(PORT4->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_6_set_mode(uint8_t mode){\r
+ PORT4->IOCR4 &= ~0x00f80000UL;\r
+ PORT4->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P4_6_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x07000000UL;\r
+ PORT4->PDR0 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P4_6_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x00003000UL;\r
+ PORT4->HWSEL |= config << 12;\r
+}\r
+\r
+__STATIC_INLINE void P4_6_set(void){\r
+ PORT4->OMR = 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_6_reset(void){\r
+ PORT4->OMR = 0x00400000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_6_toggle(void){\r
+ PORT4->OMR = 0x00400040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_6_read(void){\r
+ return(PORT4->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P4_7_set_mode(uint8_t mode){\r
+ PORT4->IOCR4 &= ~0xf8000000UL;\r
+ PORT4->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P4_7_set_driver_strength(uint8_t strength){\r
+ PORT4->PDR0 &= ~0x70000000UL;\r
+ PORT4->PDR0 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P4_7_set_hwsel(uint32_t config){\r
+ PORT4->HWSEL &= ~0x0000c000UL;\r
+ PORT4->HWSEL |= config << 14;\r
+}\r
+\r
+__STATIC_INLINE void P4_7_set(void){\r
+ PORT4->OMR = 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_7_reset(void){\r
+ PORT4->OMR = 0x00800000UL;\r
+}\r
+\r
+__STATIC_INLINE void P4_7_toggle(void){\r
+ PORT4->OMR = 0x00800080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P4_7_read(void){\r
+ return(PORT4->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_0_set_mode(uint8_t mode){\r
+ PORT5->IOCR0 &= ~0x000000f8UL;\r
+ PORT5->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P5_0_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x00000007UL;\r
+ PORT5->PDR0 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P5_0_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00000003UL;\r
+ PORT5->HWSEL |= config << 0;\r
+}\r
+\r
+__STATIC_INLINE void P5_0_set(void){\r
+ PORT5->OMR = 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_0_reset(void){\r
+ PORT5->OMR = 0x00010000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_0_toggle(void){\r
+ PORT5->OMR = 0x00010001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_0_read(void){\r
+ return(PORT5->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_1_set_mode(uint8_t mode){\r
+ PORT5->IOCR0 &= ~0x0000f800UL;\r
+ PORT5->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P5_1_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x00000070UL;\r
+ PORT5->PDR0 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P5_1_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x0000000cUL;\r
+ PORT5->HWSEL |= config << 2;\r
+}\r
+\r
+__STATIC_INLINE void P5_1_set(void){\r
+ PORT5->OMR = 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_1_reset(void){\r
+ PORT5->OMR = 0x00020000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_1_toggle(void){\r
+ PORT5->OMR = 0x00020002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_1_read(void){\r
+ return(PORT5->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_2_set_mode(uint8_t mode){\r
+ PORT5->IOCR0 &= ~0x00f80000UL;\r
+ PORT5->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P5_2_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x00000700UL;\r
+ PORT5->PDR0 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P5_2_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00000030UL;\r
+ PORT5->HWSEL |= config << 4;\r
+}\r
+\r
+__STATIC_INLINE void P5_2_set(void){\r
+ PORT5->OMR = 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_2_reset(void){\r
+ PORT5->OMR = 0x00040000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_2_toggle(void){\r
+ PORT5->OMR = 0x00040004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_2_read(void){\r
+ return(PORT5->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_3_set_mode(uint8_t mode){\r
+ PORT5->IOCR0 &= ~0xf8000000UL;\r
+ PORT5->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P5_3_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x00007000UL;\r
+ PORT5->PDR0 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P5_3_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x000000c0UL;\r
+ PORT5->HWSEL |= config << 6;\r
+}\r
+\r
+__STATIC_INLINE void P5_3_set(void){\r
+ PORT5->OMR = 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_3_reset(void){\r
+ PORT5->OMR = 0x00080000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_3_toggle(void){\r
+ PORT5->OMR = 0x00080008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_3_read(void){\r
+ return(PORT5->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_4_set_mode(uint8_t mode){\r
+ PORT5->IOCR4 &= ~0x000000f8UL;\r
+ PORT5->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P5_4_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x00070000UL;\r
+ PORT5->PDR0 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P5_4_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00000300UL;\r
+ PORT5->HWSEL |= config << 8;\r
+}\r
+\r
+__STATIC_INLINE void P5_4_set(void){\r
+ PORT5->OMR = 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_4_reset(void){\r
+ PORT5->OMR = 0x00100000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_4_toggle(void){\r
+ PORT5->OMR = 0x00100010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_4_read(void){\r
+ return(PORT5->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_5_set_mode(uint8_t mode){\r
+ PORT5->IOCR4 &= ~0x0000f800UL;\r
+ PORT5->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P5_5_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x00700000UL;\r
+ PORT5->PDR0 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P5_5_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00000c00UL;\r
+ PORT5->HWSEL |= config << 10;\r
+}\r
+\r
+__STATIC_INLINE void P5_5_set(void){\r
+ PORT5->OMR = 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_5_reset(void){\r
+ PORT5->OMR = 0x00200000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_5_toggle(void){\r
+ PORT5->OMR = 0x00200020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_5_read(void){\r
+ return(PORT5->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_6_set_mode(uint8_t mode){\r
+ PORT5->IOCR4 &= ~0x00f80000UL;\r
+ PORT5->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P5_6_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x07000000UL;\r
+ PORT5->PDR0 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P5_6_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00003000UL;\r
+ PORT5->HWSEL |= config << 12;\r
+}\r
+\r
+__STATIC_INLINE void P5_6_set(void){\r
+ PORT5->OMR = 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_6_reset(void){\r
+ PORT5->OMR = 0x00400000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_6_toggle(void){\r
+ PORT5->OMR = 0x00400040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_6_read(void){\r
+ return(PORT5->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_7_set_mode(uint8_t mode){\r
+ PORT5->IOCR4 &= ~0xf8000000UL;\r
+ PORT5->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P5_7_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR0 &= ~0x70000000UL;\r
+ PORT5->PDR0 |= strength << 28;\r
+}\r
+\r
+__STATIC_INLINE void P5_7_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x0000c000UL;\r
+ PORT5->HWSEL |= config << 14;\r
+}\r
+\r
+__STATIC_INLINE void P5_7_set(void){\r
+ PORT5->OMR = 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_7_reset(void){\r
+ PORT5->OMR = 0x00800000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_7_toggle(void){\r
+ PORT5->OMR = 0x00800080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_7_read(void){\r
+ return(PORT5->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_8_set_mode(uint8_t mode){\r
+ PORT5->IOCR8 &= ~0x000000f8UL;\r
+ PORT5->IOCR8 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P5_8_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR1 &= ~0x00000007UL;\r
+ PORT5->PDR1 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P5_8_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00030000UL;\r
+ PORT5->HWSEL |= config << 16;\r
+}\r
+\r
+__STATIC_INLINE void P5_8_set(void){\r
+ PORT5->OMR = 0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_8_reset(void){\r
+ PORT5->OMR = 0x01000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_8_toggle(void){\r
+ PORT5->OMR = 0x01000100UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_8_read(void){\r
+ return(PORT5->IN & 0x00000100UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_9_set_mode(uint8_t mode){\r
+ PORT5->IOCR8 &= ~0x0000f800UL;\r
+ PORT5->IOCR8 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P5_9_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR1 &= ~0x00000070UL;\r
+ PORT5->PDR1 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P5_9_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x000c0000UL;\r
+ PORT5->HWSEL |= config << 18;\r
+}\r
+\r
+__STATIC_INLINE void P5_9_set(void){\r
+ PORT5->OMR = 0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_9_reset(void){\r
+ PORT5->OMR = 0x02000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_9_toggle(void){\r
+ PORT5->OMR = 0x02000200UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_9_read(void){\r
+ return(PORT5->IN & 0x00000200UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_10_set_mode(uint8_t mode){\r
+ PORT5->IOCR8 &= ~0x00f80000UL;\r
+ PORT5->IOCR8 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P5_10_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR1 &= ~0x00000700UL;\r
+ PORT5->PDR1 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P5_10_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00300000UL;\r
+ PORT5->HWSEL |= config << 20;\r
+}\r
+\r
+__STATIC_INLINE void P5_10_set(void){\r
+ PORT5->OMR = 0x00000400UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_10_reset(void){\r
+ PORT5->OMR = 0x04000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_10_toggle(void){\r
+ PORT5->OMR = 0x04000400UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_10_read(void){\r
+ return(PORT5->IN & 0x00000400UL);\r
+}\r
+\r
+__STATIC_INLINE void P5_11_set_mode(uint8_t mode){\r
+ PORT5->IOCR8 &= ~0xf8000000UL;\r
+ PORT5->IOCR8 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P5_11_set_driver_strength(uint8_t strength){\r
+ PORT5->PDR1 &= ~0x00007000UL;\r
+ PORT5->PDR1 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P5_11_set_hwsel(uint32_t config){\r
+ PORT5->HWSEL &= ~0x00c00000UL;\r
+ PORT5->HWSEL |= config << 22;\r
+}\r
+\r
+__STATIC_INLINE void P5_11_set(void){\r
+ PORT5->OMR = 0x00000800UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_11_reset(void){\r
+ PORT5->OMR = 0x08000000UL;\r
+}\r
+\r
+__STATIC_INLINE void P5_11_toggle(void){\r
+ PORT5->OMR = 0x08000800UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P5_11_read(void){\r
+ return(PORT5->IN & 0x00000800UL);\r
+}\r
+\r
+__STATIC_INLINE void P6_0_set_mode(uint8_t mode){\r
+ PORT6->IOCR0 &= ~0x000000f8UL;\r
+ PORT6->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P6_0_set_driver_strength(uint8_t strength){\r
+ PORT6->PDR0 &= ~0x00000007UL;\r
+ PORT6->PDR0 |= strength << 0;\r
+}\r
+\r
+__STATIC_INLINE void P6_0_set_hwsel(uint32_t config){\r
+ PORT6->HWSEL &= ~0x00000003UL;\r
+ PORT6->HWSEL |= config << 0;\r
+}\r
+\r
+__STATIC_INLINE void P6_0_set(void){\r
+ PORT6->OMR = 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_0_reset(void){\r
+ PORT6->OMR = 0x00010000UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_0_toggle(void){\r
+ PORT6->OMR = 0x00010001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P6_0_read(void){\r
+ return(PORT6->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P6_1_set_mode(uint8_t mode){\r
+ PORT6->IOCR0 &= ~0x0000f800UL;\r
+ PORT6->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P6_1_set_driver_strength(uint8_t strength){\r
+ PORT6->PDR0 &= ~0x00000070UL;\r
+ PORT6->PDR0 |= strength << 4;\r
+}\r
+\r
+__STATIC_INLINE void P6_1_set_hwsel(uint32_t config){\r
+ PORT6->HWSEL &= ~0x0000000cUL;\r
+ PORT6->HWSEL |= config << 2;\r
+}\r
+\r
+__STATIC_INLINE void P6_1_set(void){\r
+ PORT6->OMR = 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_1_reset(void){\r
+ PORT6->OMR = 0x00020000UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_1_toggle(void){\r
+ PORT6->OMR = 0x00020002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P6_1_read(void){\r
+ return(PORT6->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P6_2_set_mode(uint8_t mode){\r
+ PORT6->IOCR0 &= ~0x00f80000UL;\r
+ PORT6->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P6_2_set_driver_strength(uint8_t strength){\r
+ PORT6->PDR0 &= ~0x00000700UL;\r
+ PORT6->PDR0 |= strength << 8;\r
+}\r
+\r
+__STATIC_INLINE void P6_2_set_hwsel(uint32_t config){\r
+ PORT6->HWSEL &= ~0x00000030UL;\r
+ PORT6->HWSEL |= config << 4;\r
+}\r
+\r
+__STATIC_INLINE void P6_2_set(void){\r
+ PORT6->OMR = 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_2_reset(void){\r
+ PORT6->OMR = 0x00040000UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_2_toggle(void){\r
+ PORT6->OMR = 0x00040004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P6_2_read(void){\r
+ return(PORT6->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P6_3_set_mode(uint8_t mode){\r
+ PORT6->IOCR0 &= ~0xf8000000UL;\r
+ PORT6->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P6_3_set_driver_strength(uint8_t strength){\r
+ PORT6->PDR0 &= ~0x00007000UL;\r
+ PORT6->PDR0 |= strength << 12;\r
+}\r
+\r
+__STATIC_INLINE void P6_3_set_hwsel(uint32_t config){\r
+ PORT6->HWSEL &= ~0x000000c0UL;\r
+ PORT6->HWSEL |= config << 6;\r
+}\r
+\r
+__STATIC_INLINE void P6_3_set(void){\r
+ PORT6->OMR = 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_3_reset(void){\r
+ PORT6->OMR = 0x00080000UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_3_toggle(void){\r
+ PORT6->OMR = 0x00080008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P6_3_read(void){\r
+ return(PORT6->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P6_4_set_mode(uint8_t mode){\r
+ PORT6->IOCR4 &= ~0x000000f8UL;\r
+ PORT6->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P6_4_set_driver_strength(uint8_t strength){\r
+ PORT6->PDR0 &= ~0x00070000UL;\r
+ PORT6->PDR0 |= strength << 16;\r
+}\r
+\r
+__STATIC_INLINE void P6_4_set_hwsel(uint32_t config){\r
+ PORT6->HWSEL &= ~0x00000300UL;\r
+ PORT6->HWSEL |= config << 8;\r
+}\r
+\r
+__STATIC_INLINE void P6_4_set(void){\r
+ PORT6->OMR = 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_4_reset(void){\r
+ PORT6->OMR = 0x00100000UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_4_toggle(void){\r
+ PORT6->OMR = 0x00100010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P6_4_read(void){\r
+ return(PORT6->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P6_5_set_mode(uint8_t mode){\r
+ PORT6->IOCR4 &= ~0x0000f800UL;\r
+ PORT6->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P6_5_set_driver_strength(uint8_t strength){\r
+ PORT6->PDR0 &= ~0x00700000UL;\r
+ PORT6->PDR0 |= strength << 20;\r
+}\r
+\r
+__STATIC_INLINE void P6_5_set_hwsel(uint32_t config){\r
+ PORT6->HWSEL &= ~0x00000c00UL;\r
+ PORT6->HWSEL |= config << 10;\r
+}\r
+\r
+__STATIC_INLINE void P6_5_set(void){\r
+ PORT6->OMR = 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_5_reset(void){\r
+ PORT6->OMR = 0x00200000UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_5_toggle(void){\r
+ PORT6->OMR = 0x00200020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P6_5_read(void){\r
+ return(PORT6->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P6_6_set_mode(uint8_t mode){\r
+ PORT6->IOCR4 &= ~0x00f80000UL;\r
+ PORT6->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P6_6_set_driver_strength(uint8_t strength){\r
+ PORT6->PDR0 &= ~0x07000000UL;\r
+ PORT6->PDR0 |= strength << 24;\r
+}\r
+\r
+__STATIC_INLINE void P6_6_set_hwsel(uint32_t config){\r
+ PORT6->HWSEL &= ~0x00003000UL;\r
+ PORT6->HWSEL |= config << 12;\r
+}\r
+\r
+__STATIC_INLINE void P6_6_set(void){\r
+ PORT6->OMR = 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_6_reset(void){\r
+ PORT6->OMR = 0x00400000UL;\r
+}\r
+\r
+__STATIC_INLINE void P6_6_toggle(void){\r
+ PORT6->OMR = 0x00400040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P6_6_read(void){\r
+ return(PORT6->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_0_set_mode(uint8_t mode){\r
+ PORT14->IOCR0 &= ~0x000000f8UL;\r
+ PORT14->IOCR0 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P14_0_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_0_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000001UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_0_read(void){\r
+ return(PORT14->IN & 0x00000001UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_1_set_mode(uint8_t mode){\r
+ PORT14->IOCR0 &= ~0x0000f800UL;\r
+ PORT14->IOCR0 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P14_1_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_1_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000002UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_1_read(void){\r
+ return(PORT14->IN & 0x00000002UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_2_set_mode(uint8_t mode){\r
+ PORT14->IOCR0 &= ~0x00f80000UL;\r
+ PORT14->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P14_2_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_2_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_2_read(void){\r
+ return(PORT14->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_3_set_mode(uint8_t mode){\r
+ PORT14->IOCR0 &= ~0xf8000000UL;\r
+ PORT14->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P14_3_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_3_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_3_read(void){\r
+ return(PORT14->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_4_set_mode(uint8_t mode){\r
+ PORT14->IOCR4 &= ~0x000000f8UL;\r
+ PORT14->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P14_4_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_4_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_4_read(void){\r
+ return(PORT14->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_5_set_mode(uint8_t mode){\r
+ PORT14->IOCR4 &= ~0x0000f800UL;\r
+ PORT14->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P14_5_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_5_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_5_read(void){\r
+ return(PORT14->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_6_set_mode(uint8_t mode){\r
+ PORT14->IOCR4 &= ~0x00f80000UL;\r
+ PORT14->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P14_6_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_6_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_6_read(void){\r
+ return(PORT14->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_7_set_mode(uint8_t mode){\r
+ PORT14->IOCR4 &= ~0xf8000000UL;\r
+ PORT14->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P14_7_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_7_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_7_read(void){\r
+ return(PORT14->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_8_set_mode(uint8_t mode){\r
+ PORT14->IOCR8 &= ~0x000000f8UL;\r
+ PORT14->IOCR8 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P14_8_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_8_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_8_read(void){\r
+ return(PORT14->IN & 0x00000100UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_9_set_mode(uint8_t mode){\r
+ PORT14->IOCR8 &= ~0x0000f800UL;\r
+ PORT14->IOCR8 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P14_9_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_9_disable_digital(void){\r
+ PORT14->PDISC |= 0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_9_read(void){\r
+ return(PORT14->IN & 0x00000200UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_12_set_mode(uint8_t mode){\r
+ PORT14->IOCR12 &= ~0x000000f8UL;\r
+ PORT14->IOCR12 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P14_12_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_12_disable_digital(void){\r
+ PORT14->PDISC |= 0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_12_read(void){\r
+ return(PORT14->IN & 0x00001000UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_13_set_mode(uint8_t mode){\r
+ PORT14->IOCR12 &= ~0x0000f800UL;\r
+ PORT14->IOCR12 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P14_13_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_13_disable_digital(void){\r
+ PORT14->PDISC |= 0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_13_read(void){\r
+ return(PORT14->IN & 0x00002000UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_14_set_mode(uint8_t mode){\r
+ PORT14->IOCR12 &= ~0x00f80000UL;\r
+ PORT14->IOCR12 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P14_14_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_14_disable_digital(void){\r
+ PORT14->PDISC |= 0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_14_read(void){\r
+ return(PORT14->IN & 0x00004000UL);\r
+}\r
+\r
+__STATIC_INLINE void P14_15_set_mode(uint8_t mode){\r
+ PORT14->IOCR12 &= ~0xf8000000UL;\r
+ PORT14->IOCR12 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P14_15_enable_digital(void){\r
+ PORT14->PDISC &= ~0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE void P14_15_disable_digital(void){\r
+ PORT14->PDISC |= 0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P14_15_read(void){\r
+ return(PORT14->IN & 0x00008000UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_2_set_mode(uint8_t mode){\r
+ PORT15->IOCR0 &= ~0x00f80000UL;\r
+ PORT15->IOCR0 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P15_2_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_2_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000004UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_2_read(void){\r
+ return(PORT15->IN & 0x00000004UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_3_set_mode(uint8_t mode){\r
+ PORT15->IOCR0 &= ~0xf8000000UL;\r
+ PORT15->IOCR0 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P15_3_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_3_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000008UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_3_read(void){\r
+ return(PORT15->IN & 0x00000008UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_4_set_mode(uint8_t mode){\r
+ PORT15->IOCR4 &= ~0x000000f8UL;\r
+ PORT15->IOCR4 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P15_4_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_4_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000010UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_4_read(void){\r
+ return(PORT15->IN & 0x00000010UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_5_set_mode(uint8_t mode){\r
+ PORT15->IOCR4 &= ~0x0000f800UL;\r
+ PORT15->IOCR4 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P15_5_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_5_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000020UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_5_read(void){\r
+ return(PORT15->IN & 0x00000020UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_6_set_mode(uint8_t mode){\r
+ PORT15->IOCR4 &= ~0x00f80000UL;\r
+ PORT15->IOCR4 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P15_6_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_6_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000040UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_6_read(void){\r
+ return(PORT15->IN & 0x00000040UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_7_set_mode(uint8_t mode){\r
+ PORT15->IOCR4 &= ~0xf8000000UL;\r
+ PORT15->IOCR4 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P15_7_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_7_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000080UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_7_read(void){\r
+ return(PORT15->IN & 0x00000080UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_8_set_mode(uint8_t mode){\r
+ PORT15->IOCR8 &= ~0x000000f8UL;\r
+ PORT15->IOCR8 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P15_8_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_8_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000100UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_8_read(void){\r
+ return(PORT15->IN & 0x00000100UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_9_set_mode(uint8_t mode){\r
+ PORT15->IOCR8 &= ~0x0000f800UL;\r
+ PORT15->IOCR8 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P15_9_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_9_disable_digital(void){\r
+ PORT15->PDISC |= 0x00000200UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_9_read(void){\r
+ return(PORT15->IN & 0x00000200UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_12_set_mode(uint8_t mode){\r
+ PORT15->IOCR12 &= ~0x000000f8UL;\r
+ PORT15->IOCR12 |= mode << 0;\r
+}\r
+\r
+__STATIC_INLINE void P15_12_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_12_disable_digital(void){\r
+ PORT15->PDISC |= 0x00001000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_12_read(void){\r
+ return(PORT15->IN & 0x00001000UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_13_set_mode(uint8_t mode){\r
+ PORT15->IOCR12 &= ~0x0000f800UL;\r
+ PORT15->IOCR12 |= mode << 8;\r
+}\r
+\r
+__STATIC_INLINE void P15_13_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_13_disable_digital(void){\r
+ PORT15->PDISC |= 0x00002000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_13_read(void){\r
+ return(PORT15->IN & 0x00002000UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_14_set_mode(uint8_t mode){\r
+ PORT15->IOCR12 &= ~0x00f80000UL;\r
+ PORT15->IOCR12 |= mode << 16;\r
+}\r
+\r
+__STATIC_INLINE void P15_14_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_14_disable_digital(void){\r
+ PORT15->PDISC |= 0x00004000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_14_read(void){\r
+ return(PORT15->IN & 0x00004000UL);\r
+}\r
+\r
+__STATIC_INLINE void P15_15_set_mode(uint8_t mode){\r
+ PORT15->IOCR12 &= ~0xf8000000UL;\r
+ PORT15->IOCR12 |= mode << 24;\r
+}\r
+\r
+__STATIC_INLINE void P15_15_enable_digital(void){\r
+ PORT15->PDISC &= ~0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE void P15_15_disable_digital(void){\r
+ PORT15->PDISC |= 0x00008000UL;\r
+}\r
+\r
+__STATIC_INLINE uint32_t P15_15_read(void){\r
+ return(PORT15->IN & 0x00008000UL);\r
+}\r
+\r
+#endif\r