+++ /dev/null
-/****************************************************************************\r
-* © 2013 Microchip Technology Inc. and its subsidiaries.\r
-* You may use this software and any derivatives exclusively with\r
-* Microchip products.\r
-* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".\r
-* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,\r
-* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,\r
-* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP\r
-* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.\r
-* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,\r
-* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND\r
-* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS\r
-* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.\r
-* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL\r
-* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF\r
-* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.\r
-* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE\r
-* OF THESE TERMS.\r
-*/\r
-\r
-/** @defgroup interrupt interrupt\r
- * @{\r
- */\r
-/** @file interrupt.h\r
- \brief This is the header file for interrupt.c\r
- This program is designed to allow the other C programs to be able to use this component\r
-\r
- There are entry points for all C wrapper API implementation\r
-\r
-<b>Platform:</b> This is ARC-based component \r
-\r
-<b>Toolset:</b> Metaware IDE(8.5.1)\r
-<b>Reference:</b> smsc_reusable_fw_requirement.doc */\r
-\r
-/*******************************************************************************\r
- * SMSC version control information (Perforce):\r
- *\r
- * FILE: $File: //depot_pcs/FWEng/Release/projects/CEC1302_CLIB/release2/Source/hw_blks/kernel/skern/source/interrupt/interrupt.h $\r
- * REVISION: $Revision: #1 $\r
- * DATETIME: $DateTime: 2015/12/23 15:37:58 $\r
- * AUTHOR: $Author: akrishnan $\r
- *\r
- * Revision history (latest first):\r
- * #xx\r
- ***********************************************************************************\r
- */\r
-\r
-#ifndef _INTERRUPT_H_\r
-#define _INTERRUPT_H_\r
-\r
-\r
-/* public function prototypes */\r
-void interrupt_block_init(void);\r
-void null_handler(void);\r
-__irq void SysTick_Handler(void);\r
-\r
-/* macro for interrupt control */\r
-/* 16-bit timers interrupt control */\r
-#define sbit_TIMER0 ( 1UL << 0UL )\r
-#define sbit_TIMER1 ( 1UL << 1UL )\r
-#define sbit_TIMER2 ( 1UL << 2UL )\r
-#define sbit_TIMER3 ( 1UL << 3Ul )\r
-\r
-#define disable_timer0_irq() mCLR_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer0_irq() mSET_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer0_source() mCLR_SRC_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer0_source() mGET_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-#define disable_timer1_irq() mCLR_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer1_irq() mSET_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer1_source() mCLR_SRC_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer1_source() mGET_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-#define disable_timer2_irq() mCLR_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer2_irq() mSET_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer2_source() mCLR_SRC_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer2_source() mGET_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-#define disable_timer3_irq() mCLR_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer3_irq() mSET_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer3_source() mCLR_SRC_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer3_source() mGET_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-\r
-/* hibernation timers interrupt control */\r
-#define sbit_HTIMER0 b_bit20\r
-#define sbit_HTIMER1 b_bit14\r
-\r
-#define disable_htimer0_irq() mCLR_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define enable_htimer0_irq() mSET_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define clear_htimer0_source() mCLR_SRC_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_SOURCE)\r
-#define get_htimer0_source() mGET_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_SOURCE)\r
-\r
-#define disable_htimer1_irq() mCLR_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_htimer1_irq() mSET_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_htimer1_source() mCLR_SRC_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_htimer1_source() mGET_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-/* RTC interrupt control */\r
-#define b_bit18 (1 << 18)\r
-#define b_bit19 (1 << 19)\r
-#define sbit_RTC_INT b_bit18\r
-#define disable_rtc_irq() mCLR_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define enable_rtc_irq() mSET_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define clear_rtc_irq_source() mCLR_SRC_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define get_rtc_irq_source() mGET_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-/* RTC alarm interrupt control */\r
-#define sbit_RTC_ALM_INT b_bit19\r
-#define disable_rtc_alm_irq() mCLR_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define enable_rtc_alm_irq() mSET_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define clear_rtc_irq_alm_source() mCLR_SRC_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define get_rtc_irq_alm_source() mGET_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-\r
-/* week timer interrupt control */\r
-#define sbit_WKTIMER b_bit7\r
-\r
-#define disable_wktimer_irq() mCLR_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_wktimer_irq() mSET_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_wktimer_source() mCLR_SRC_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_wktimer_source() mGET_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-\r
-/* scan matrix interrupt control */\r
-#define sbit_SCANNER b_bit16\r
-#define disable_scanner_irq() mCLR_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_scanner_irq() mSET_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_scanner_source() mCLR_SRC_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_scanner_source() mGET_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-\r
-/* PS2 interrupt control */\r
-/* PS2 activity interrupt */\r
-#define sbit_PS2_ACT_0 b_bit13\r
-#define sbit_PS2_ACT_1 b_bit14\r
-#define sbit_PS2_ACT_2 b_bit15\r
-/* PS2 wakeup interrupt: detect start bit */\r
-#define sbit_PS2_WK_0A b_bit17\r
-#define sbit_PS2_WK_1B b_bit20\r
-#define sbit_PS2_WK_2 b_bit21\r
-\r
-/* PS2 activity interrupt control */\r
-#define disable_ps2_act_0_irq() mCLR_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_act_0_irq() mSET_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_act_0_source() mCLR_SRC_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_act_0_source() mGET_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_act_1_irq() mCLR_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_act_1_irq() mSET_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_act_1_source() mCLR_SRC_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_act_1_source() mGET_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_act_2_irq() mCLR_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_act_2_irq() mSET_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_act_2_source() mCLR_SRC_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_act_2_source() mGET_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-/* PS2 wakeup interrupt control */\r
-#define disable_ps2_wk_0_irq() mCLR_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_wk_0_irq() mSET_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_wk_0_source() mCLR_SRC_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_wk_0_source() mGET_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_wk_1_irq() mCLR_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_wk_1_irq() mSET_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_wk_1_source() mCLR_SRC_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_wk_1_source() mGET_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_wk_2_irq() mCLR_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_wk_2_irq() mSET_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_wk_2_source() mCLR_SRC_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_wk_2_source() mGET_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-\r
-/* ICT interrupt control */\r
-/* capture 0~5 interrupt */\r
-#define sbit_ICT_CAPTURE0 b_bit17\r
-#define sbit_ICT_CAPTURE1 b_bit18\r
-#define sbit_ICT_CAPTURE2 b_bit19\r
-#define sbit_ICT_CAPTURE3 b_bit20\r
-#define sbit_ICT_CAPTURE4 b_bit21\r
-#define sbit_ICT_CAPTURE5 b_bit22\r
-\r
-/* capture 0 interrupt control */\r
-#define disable_capture0_irq() mCLR_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_capture0_irq() mSET_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_capture0_source() mCLR_SRC_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_capture0_source() mGET_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-\r
-/* SMBus interrupt control */\r
-\r
-\r
-/* GPIO interrupt control */\r
-\r
-\r
-/* BC link interrupt control */\r
-/* bclink A~D interrupt */\r
-#define sbit_BCLINK_A_BUSY b_bit0\r
-#define sbit_BCLINK_A_ERR b_bit1\r
-#define sbit_BCLINK_A_INT b_bit2\r
-#define sbit_BCLINK_B_BUSY b_bit3\r
-#define sbit_BCLINK_B_ERR b_bit4\r
-#define sbit_BCLINK_B_INT b_bit5\r
-#define sbit_BCLINK_C_BUSY b_bit6\r
-#define sbit_BCLINK_C_ERR b_bit7\r
-#define sbit_BCLINK_C_INT b_bit8\r
-#define sbit_BCLINK_D_BUSY b_bit9\r
-#define sbit_BCLINK_D_ERR b_bit10\r
-#define sbit_BCLINK_D_INT b_bit11\r
-\r
-/* bclink B interrupt control */\r
-#define disable_bclink_b_busy_irq() mCLR_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_bclink_b_busy_irq() mSET_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_bclink_b_busy_source() mCLR_SRC_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_bclink_b_busy_source() mGET_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-#define disable_bclink_b_err_irq() mCLR_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_bclink_b_err_irq() mSET_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_bclink_b_err_source() mCLR_SRC_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_bclink_b_err_source() mGET_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-#define disable_bclink_b_int_irq() mCLR_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_bclink_b_int_irq() mSET_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_bclink_b_int_source() mCLR_SRC_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_bclink_b_int_source() mGET_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-/* UART interrupt control */\r
-#define sbit_UART_INT b_bit0\r
-\r
-#define disable_uart_irq() mCLR_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_ENABLE_SET)\r
-#define enable_uart_irq() mSET_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_ENABLE_SET)\r
-#define clear_uart_irq_source() mCLR_SRC_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_SOURCE)\r
-#define get_uart_irq_source() mGET_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_SOURCE)\r
-\r
-// GIRQ IDs for EC Interrupt Aggregator\r
-enum MEC_GIRQ_IDS\r
-{\r
- MEC_GIRQ08_ID = 0,\r
- MEC_GIRQ09_ID, \r
- MEC_GIRQ10_ID, \r
- MEC_GIRQ11_ID, \r
- MEC_GIRQ12_ID, \r
- MEC_GIRQ13_ID, \r
- MEC_GIRQ14_ID, \r
- MEC_GIRQ15_ID, \r
- MEC_GIRQ16_ID, \r
- MEC_GIRQ17_ID, \r
- MEC_GIRQ18_ID, \r
- MEC_GIRQ19_ID, \r
- MEC_GIRQ20_ID, \r
- MEC_GIRQ21_ID, \r
- MEC_GIRQ22_ID, \r
- MEC_GIRQ23_ID, \r
- MEC_GIRQ_ID_MAX\r
-};\r
-\r
-//Bitmask of GIRQ in ECIA Block Registers\r
-#define MEC_GIRQ08_BITMASK (1UL << (MEC_GIRQ08_ID + 8))\r
-#define MEC_GIRQ09_BITMASK (1UL << (MEC_GIRQ09_ID + 8)) \r
-#define MEC_GIRQ10_BITMASK (1UL << (MEC_GIRQ10_ID + 8)) \r
-#define MEC_GIRQ11_BITMASK (1UL << (MEC_GIRQ11_ID + 8)) \r
-#define MEC_GIRQ12_BITMASK (1UL << (MEC_GIRQ12_ID + 8)) \r
-#define MEC_GIRQ13_BITMASK (1UL << (MEC_GIRQ13_ID + 8)) \r
-#define MEC_GIRQ14_BITMASK (1UL << (MEC_GIRQ14_ID + 8)) \r
-#define MEC_GIRQ15_BITMASK (1UL << (MEC_GIRQ15_ID + 8)) \r
-#define MEC_GIRQ16_BITMASK (1UL << (MEC_GIRQ16_ID + 8)) \r
-#define MEC_GIRQ17_BITMASK (1UL << (MEC_GIRQ17_ID + 8)) \r
-#define MEC_GIRQ18_BITMASK (1UL << (MEC_GIRQ18_ID + 8)) \r
-#define MEC_GIRQ19_BITMASK (1UL << (MEC_GIRQ19_ID + 8)) \r
-#define MEC_GIRQ20_BITMASK (1UL << (MEC_GIRQ20_ID + 8)) \r
-#define MEC_GIRQ21_BITMASK (1UL << (MEC_GIRQ21_ID + 8)) \r
-#define MEC_GIRQ22_BITMASK (1UL << (MEC_GIRQ22_ID + 8)) \r
-#define MEC_GIRQ23_BITMASK (1UL << (MEC_GIRQ23_ID + 8)) \r
-\r
-#define INTERRUPT_MODE_ALL_AGGREGATED (0u)\r
-#define INTERRUPT_MODE_DIRECT (1u)\r
-\r
-// Bit map of GIRQs whose sources can be directly connected to the NVIC\r
-// GIRQs 12 - 18, 23\r
-#define ECIA_GIRQ_DIRECT_BITMAP (0x0087F000ul)\r
-\r
-/*\r
- * n = b[7:0] = zero-based direct mapped NVIC ID\r
- * m = b[15:8] = zero-based aggregated NVIC ID\r
- * a = b[23:16] = block Aggregator register block ID\r
- * b = b[31:24] = block bit position in Aggregator registers\r
-*/\r
-#define IROUTE(b,a,m,n) (((uint32_t)(n)&0xFFul) + \\r
- (((uint32_t)(m)&0xFFul)<<8u) + \\r
- ((((uint32_t)(a)-8ul)&0x0F)<<16u) + \\r
- (((uint32_t)(b)&0x1Ful)<<24))\r
-\r
-#define ECIA_NVIC_ID_BITPOS (0u)\r
-#define ECIA_IA_NVIC_ID_BITPOS (8u)\r
-#define ECIA_GIRQ_ID_BITPOS (16u)\r
-#define ECIA_GIRQ_BIT_BITPOS (24u)\r
-\r
-//\r
-// GIRQ08\r
-//\r
-#define GPIO_0140_IROUTE IROUTE(0,8,57,57)\r
-#define GPIO_0141_IROUTE IROUTE(1,8,57,57)\r
-#define GPIO_0142_IROUTE IROUTE(2,8,57,57)\r
-#define GPIO_0143_IROUTE IROUTE(3,8,57,57)\r
-#define GPIO_0144_IROUTE IROUTE(4,8,57,57)\r
-#define GPIO_0145_IROUTE IROUTE(5,8,57,57)\r
-#define GPIO_0147_IROUTE IROUTE(7,8,57,57)\r
-//\r
-#define GPIO_0150_IROUTE IROUTE(8,8,57,57)\r
-#define GPIO_0151_IROUTE IROUTE(9,8,57,57)\r
-#define GPIO_0152_IROUTE IROUTE(10,8,57,57)\r
-#define GPIO_0153_IROUTE IROUTE(11,8,57,57)\r
-#define GPIO_0154_IROUTE IROUTE(12,8,57,57)\r
-#define GPIO_0155_IROUTE IROUTE(13,8,57,57)\r
-#define GPIO_0156_IROUTE IROUTE(14,8,57,57)\r
-#define GPIO_0157_IROUTE IROUTE(15,8,57,57)\r
-//\r
-#define GPIO_0160_IROUTE IROUTE(16,8,57,57)\r
-#define GPIO_0161_IROUTE IROUTE(17,8,57,57)\r
-#define GPIO_0162_IROUTE IROUTE(18,8,57,57)\r
-#define GPIO_0163_IROUTE IROUTE(19,8,57,57)\r
-#define GPIO_0164_IROUTE IROUTE(20,8,57,57)\r
-#define GPIO_0165_IROUTE IROUTE(21,8,57,57)\r
-#define GPIO_0166_IROUTE IROUTE(22,8,57,57)\r
-#define GPIO_0167_IROUTE IROUTE(23,8,57,57)\r
-\r
-//\r
-// GIRQ09\r
-//\r
-#define GPIO_0100_IROUTE IROUTE(0,9,58,58)\r
-#define GPIO_0101_IROUTE IROUTE(1,9,58,58)\r
-#define GPIO_0102_IROUTE IROUTE(2,9,58,58)\r
-#define GPIO_0103_IROUTE IROUTE(3,9,58,58)\r
-#define GPIO_0104_IROUTE IROUTE(4,9,58,58)\r
-#define GPIO_0105_IROUTE IROUTE(5,9,58,58)\r
-#define GPIO_0105_IROUTE IROUTE(5,9,58,58)\r
-#define GPIO_0107_IROUTE IROUTE(7,9,58,58)\r
-//\r
-#define GPIO_0110_IROUTE IROUTE(8,9,58,58)\r
-#define GPIO_0111_IROUTE IROUTE(9,9,58,58)\r
-#define GPIO_0112_IROUTE IROUTE(10,9,58,58)\r
-#define GPIO_0113_IROUTE IROUTE(11,9,58,58)\r
-#define GPIO_0114_IROUTE IROUTE(12,9,58,58)\r
-#define GPIO_0115_IROUTE IROUTE(13,9,58,58)\r
-#define GPIO_0116_IROUTE IROUTE(14,9,58,58)\r
-#define GPIO_0117_IROUTE IROUTE(15,9,58,58)\r
-//\r
-#define GPIO_0120_IROUTE IROUTE(16,9,58,58)\r
-#define GPIO_0121_IROUTE IROUTE(17,9,58,58)\r
-#define GPIO_0122_IROUTE IROUTE(18,9,58,58)\r
-#define GPIO_0124_IROUTE IROUTE(20,9,58,58)\r
-#define GPIO_0125_IROUTE IROUTE(21,9,58,58)\r
-#define GPIO_0126_IROUTE IROUTE(22,9,58,58)\r
-#define GPIO_0127_IROUTE IROUTE(23,9,58,58)\r
-//\r
-#define GPIO_0130_IROUTE IROUTE(24,9,58,58)\r
-#define GPIO_0131_IROUTE IROUTE(25,9,58,58)\r
-#define GPIO_0132_IROUTE IROUTE(26,9,58,58)\r
-#define GPIO_0133_IROUTE IROUTE(27,9,58,58)\r
-#define GPIO_0134_IROUTE IROUTE(28,9,58,58)\r
-#define GPIO_0135_IROUTE IROUTE(29,9,58,58)\r
-#define GPIO_0136_IROUTE IROUTE(30,9,58,58)\r
-\r
-//\r
-// GIRQ10\r
-//\r
-#define GPIO_0040_IROUTE IROUTE(0,10,59,59)\r
-#define GPIO_0041_IROUTE IROUTE(1,10,59,59)\r
-#define GPIO_0042_IROUTE IROUTE(2,10,59,59)\r
-#define GPIO_0043_IROUTE IROUTE(3,10,59,59)\r
-#define GPIO_0044_IROUTE IROUTE(4,10,59,59)\r
-#define GPIO_0045_IROUTE IROUTE(5,10,59,59)\r
-#define GPIO_0045_IROUTE IROUTE(5,10,59,59)\r
-#define GPIO_0047_IROUTE IROUTE(7,10,59,59)\r
-//\r
-#define GPIO_0050_IROUTE IROUTE(8,10,59,59)\r
-#define GPIO_0051_IROUTE IROUTE(9,10,59,59)\r
-#define GPIO_0052_IROUTE IROUTE(10,10,59,59)\r
-#define GPIO_0053_IROUTE IROUTE(11,10,59,59)\r
-#define GPIO_0054_IROUTE IROUTE(12,10,59,59)\r
-#define GPIO_0055_IROUTE IROUTE(13,10,59,59)\r
-#define GPIO_0056_IROUTE IROUTE(14,10,59,59)\r
-#define GPIO_0057_IROUTE IROUTE(15,10,59,59)\r
-//\r
-#define GPIO_0060_IROUTE IROUTE(16,10,59,59)\r
-#define GPIO_0061_IROUTE IROUTE(17,10,59,59)\r
-#define GPIO_0062_IROUTE IROUTE(18,10,59,59)\r
-#define GPIO_0063_IROUTE IROUTE(19,10,59,59)\r
-#define GPIO_0064_IROUTE IROUTE(20,10,59,59)\r
-#define GPIO_0065_IROUTE IROUTE(21,10,59,59)\r
-#define GPIO_0066_IROUTE IROUTE(22,10,59,59)\r
-#define GPIO_0067_IROUTE IROUTE(23,10,59,59)\r
-//\r
-#define GPIO_0070_IROUTE IROUTE(24,10,59,59)\r
-#define GPIO_0071_IROUTE IROUTE(25,10,59,59)\r
-#define GPIO_0072_IROUTE IROUTE(26,10,59,59)\r
-#define GPIO_0073_IROUTE IROUTE(27,10,59,59)\r
-#define GPIO_0074_IROUTE IROUTE(28,10,59,59)\r
-#define GPIO_0075_IROUTE IROUTE(29,10,59,59)\r
-#define GPIO_0076_IROUTE IROUTE(30,10,59,59)\r
-\r
-//\r
-// GIRQ11\r
-//\r
-#define GPIO_0000_IROUTE IROUTE(0,11,60,60)\r
-#define GPIO_0001_IROUTE IROUTE(1,11,60,60)\r
-#define GPIO_0002_IROUTE IROUTE(2,11,60,60)\r
-#define GPIO_0003_IROUTE IROUTE(3,11,60,60)\r
-#define GPIO_0004_IROUTE IROUTE(4,11,60,60)\r
-#define GPIO_0005_IROUTE IROUTE(5,11,60,60)\r
-#define GPIO_0006_IROUTE IROUTE(6,11,60,60)\r
-#define GPIO_0007_IROUTE IROUTE(7,11,60,60)\r
-//\r
-#define GPIO_0010_IROUTE IROUTE(8,11,60,60)\r
-#define GPIO_0011_IROUTE IROUTE(9,11,60,60)\r
-#define GPIO_0012_IROUTE IROUTE(10,11,60,60)\r
-#define GPIO_0013_IROUTE IROUTE(11,11,60,60)\r
-#define GPIO_0014_IROUTE IROUTE(12,11,60,60)\r
-#define GPIO_0015_IROUTE IROUTE(13,11,60,60)\r
-#define GPIO_0016_IROUTE IROUTE(14,11,60,60)\r
-#define GPIO_0017_IROUTE IROUTE(15,11,60,60)\r
-//\r
-#define GPIO_0020_IROUTE IROUTE(16,11,60,60)\r
-#define GPIO_0021_IROUTE IROUTE(17,11,60,60)\r
-#define GPIO_0022_IROUTE IROUTE(18,11,60,60)\r
-#define GPIO_0023_IROUTE IROUTE(19,11,60,60)\r
-#define GPIO_0024_IROUTE IROUTE(20,11,60,60)\r
-#define GPIO_0025_IROUTE IROUTE(21,11,60,60)\r
-#define GPIO_0026_IROUTE IROUTE(22,11,60,60)\r
-#define GPIO_0027_IROUTE IROUTE(23,11,60,60)\r
-//\r
-#define GPIO_0030_IROUTE IROUTE(24,11,60,60)\r
-#define GPIO_0031_IROUTE IROUTE(25,11,60,60)\r
-#define GPIO_0032_IROUTE IROUTE(26,11,60,60)\r
-#define GPIO_0033_IROUTE IROUTE(27,11,60,60)\r
-#define GPIO_0034_IROUTE IROUTE(28,11,60,60)\r
-#define GPIO_0035_IROUTE IROUTE(29,11,60,60)\r
-#define GPIO_0036_IROUTE IROUTE(30,11,60,60)\r
-\r
-//\r
-// GIRQ12\r
-//\r
-#define SMB0_IROUTE IROUTE(0,12,61,0)\r
-#define SMB1_IROUTE IROUTE(1,12,61,1)\r
-#define SMB2_IROUTE IROUTE(2,12,61,2)\r
-#define SMB3_IROUTE IROUTE(3,12,61,3)\r
-// SMB wakes have no direct connection to NVIC, always aggregated\r
-#define SMB0_WAKE_IROUTE IROUTE(4,12,61,61)\r
-#define SMB1_WAKE_IROUTE IROUTE(5,12,61,61)\r
-#define SMB2_WAKE_IROUTE IROUTE(6,12,61,61)\r
-#define SMB3_WAKE_IROUTE IROUTE(7,12,61,61)\r
-#define SMB4_WAKE_IROUTE IROUTE(8,12,61,61)\r
-\r
-//\r
-// GIRQ13\r
-//\r
-#define DMA0_IROUTE IROUTE(16,13,62,4)\r
-#define DMA1_IROUTE IROUTE(17,13,62,5)\r
-#define DMA2_IROUTE IROUTE(18,13,62,6)\r
-#define DMA3_IROUTE IROUTE(19,13,62,7)\r
-#define DMA4_IROUTE IROUTE(20,13,62,8)\r
-#define DMA5_IROUTE IROUTE(21,13,62,9)\r
-#define DMA6_IROUTE IROUTE(22,13,62,10)\r
-#define DMA7_IROUTE IROUTE(23,13,62,11)\r
-#define DMA8_IROUTE IROUTE(24,13,62,81)\r
-#define DMA9_IROUTE IROUTE(25,13,62,82)\r
-#define DMA10_IROUTE IROUTE(26,13,62,83)\r
-#define DMA11_IROUTE IROUTE(27,13,62,84)\r
-\r
-//\r
-// GIRQ14\r
-//\r
-#define LPC_BERR_IROUTE IROUTE(2,14,63,12)\r
-\r
-//\r
-// GIRQ15\r
-//\r
-#define UART0_IROUTE IROUTE(0,15,64,13)\r
-#define EMI0_IROUTE IROUTE(2,15,64,14)\r
-#define ACPI_EC0_IBF_IROUTE IROUTE(6,15,64,15)\r
-#define ACPI_EC0_OBF_IROUTE IROUTE(7,15,64,16)\r
-#define ACPI_EC1_IBF_IROUTE IROUTE(8,15,64,17)\r
-#define ACPI_EC1_OBF_IROUTE IROUTE(9,15,64,18)\r
-#define ACPI_PM1_CTL_IROUTE IROUTE(10,15,64,19)\r
-#define ACPI_PM1_EN_IROUTE IROUTE(11,15,64,20)\r
-#define ACPI_PM1_STS_IROUTE IROUTE(12,15,64,21)\r
-#define EM8042_OBF_IROUTE IROUTE(13,15,64,22)\r
-#define EM8042_IBF_IROUTE IROUTE(14,15,64,23)\r
-#define MBOX_IROUTE IROUTE(15,15,64,24)\r
-#define MBOX_DATA_IROUTE IROUTE(16,15,64,40) \r
-\r
-//\r
-// GIRQ16\r
-//\r
-#define PECI_IROUTE IROUTE(3,16,65,25)\r
-\r
-//\r
-// GIRQ17\r
-//\r
-#define TACH0_IROUTE IROUTE(0,17,66,26)\r
-#define TACH1_IROUTE IROUTE(1,17,66,27)\r
-#define PS2_0_WAKE_IROUTE IROUTE(2,17,66,66)\r
-#define PS2_1_WAKE_IROUTE IROUTE(3,17,66,66)\r
-#define PS2_2_WAKE_IROUTE IROUTE(4,17,66,66)\r
-#define PS2_3_WAKE_IROUTE IROUTE(5,17,66,66)\r
-#define BC_WAKE_IROUTE IROUTE(6,17,66,66)\r
-#define ADC_SNGL_IROUTE IROUTE(10,17,66,28)\r
-#define ADC_RPT_IROUTE IROUTE(11,17,66,29)\r
-#define ADC2PWM1_IROUTE IROUTE(12,17,66,30)\r
-#define ADC2PWM2_IROUTE IROUTE(13,17,66,31)\r
-#define PS2_0_IROUTE IROUTE(14,17,66,32)\r
-#define PS2_1_IROUTE IROUTE(15,17,66,33)\r
-#define PS2_2_IROUTE IROUTE(16,17,66,34)\r
-#define PS2_3_IROUTE IROUTE(17,17,66,35)\r
-#define RTC_IROUTE IROUTE(18,17,66,91)\r
-#define RTC_ALARM_IROUTE IROUTE(19,17,66,92)\r
-#define HTIMER_IROUTE IROUTE(20,17,66,38)\r
-#define KSC_IROUTE IROUTE(21,17,66,39)\r
-#define KSC_WAKE_IROUTE IROUTE(22,17,66,66)\r
-#define RPM_STALL_IROUTE IROUTE(23,17,66,41)\r
-#define RPM_SPIN_IROUTE IROUTE(24,17,66,42)\r
-#define PFR_IROUTE IROUTE(25,17,66,43)\r
-#define LED0_IROUTE IROUTE(26,17,66,44)\r
-#define LED1_IROUTE IROUTE(27,17,66,45)\r
-#define LED2_IROUTE IROUTE(28,17,66,46)\r
-#define BCM_ERR_IROUTE IROUTE(29,17,66,47)\r
-#define BCM_BUSY_IROUTE IROUTE(30,17,66,48)\r
-\r
-//\r
-// GIRQ18\r
-//\r
-#define SPI0_TX_IROUTE IROUTE(0,18,67,36)\r
-#define SPI0_RX_IROUTE IROUTE(1,18,67,37)\r
-#define SPI1_TX_IROUTE IROUTE(2,18,67,55)\r
-#define SPI1_RX_IROUTE IROUTE(3,18,67,56)\r
-#define LED3_IROUTE IROUTE(4,18,67,85)\r
-#define PKE_ERR_IROUTE IROUTE(5,18,67,86)\r
-#define PKE_END_IROUTE IROUTE(6,18,67,87)\r
-#define NDRNG_IROUTE IROUTE(7,18,67,88)\r
-#define AES_IROUTE IROUTE(8,18,67,89)\r
-#define HASH_IROUTE IROUTE(9,18,67,90)\r
-\r
-//\r
-// GIRQ19, Aggregated only\r
-//\r
-#define LRESET_IROUTE IROUTE(0,19,68,68)\r
-#define VCC_PWRGD_IROUTE IROUTE(1,19,68,68)\r
-\r
-//\r
-// GIRQ20, Aggregated only\r
-//\r
-#define GPIO_0200_IROUTE IROUTE(0,20,69,69)\r
-#define GPIO_0201_IROUTE IROUTE(1,20,69,69)\r
-#define GPIO_0202_IROUTE IROUTE(2,20,69,69)\r
-#define GPIO_0203_IROUTE IROUTE(3,20,69,69)\r
-#define GPIO_0204_IROUTE IROUTE(4,20,69,69)\r
-#define GPIO_0206_IROUTE IROUTE(6,20,69,69)\r
-//\r
-#define GPIO_0210_IROUTE IROUTE(8,20,69,69)\r
-#define GPIO_0211_IROUTE IROUTE(9,20,69,69)\r
-#define GPIO_0212_IROUTE IROUTE(10,20,69,69)\r
-#define GPIO_0213_IROUTE IROUTE(11,20,69,69)\r
-\r
-//\r
-// GIRQ21\r
-//\r
-// No sources\r
-\r
-//\r
-// GIRQ22\r
-//\r
-// No sources\r
-\r
-//\r
-// GIRQ23\r
-//\r
-#define BTMR0_IROUTE IROUTE(0,23,72,49)\r
-#define BTMR1_IROUTE IROUTE(1,23,72,50)\r
-#define BTMR2_IROUTE IROUTE(2,23,72,51)\r
-#define BTMR3_IROUTE IROUTE(3,23,72,52)\r
-#define BTMR4_IROUTE IROUTE(4,23,72,53)\r
-#define BTMR5_IROUTE IROUTE(5,23,72,54)\r
-\r
-// GIRQ08 Bit Positions \r
-#define GIRQ08_GPIO_0140_BITPOS (0)\r
-#define GIRQ08_GPIO_0141_BITPOS (1)\r
-#define GIRQ08_GPIO_0142_BITPOS (2)\r
-#define GIRQ08_GPIO_0143_BITPOS (3)\r
-#define GIRQ08_GPIO_0144_BITPOS (4)\r
-#define GIRQ08_GPIO_0145_BITPOS (5)\r
-//#define GIRQ08_GPIO_0146_BITPOS (6) RESERVED\r
-#define GIRQ08_GPIO_0147_BITPOS (7)\r
-//\r
-#define GIRQ08_GPIO_0150_BITPOS (8)\r
-#define GIRQ08_GPIO_0151_BITPOS (9)\r
-#define GIRQ08_GPIO_0152_BITPOS (10)\r
-#define GIRQ08_GPIO_0153_BITPOS (11)\r
-#define GIRQ08_GPIO_0154_BITPOS (12)\r
-#define GIRQ08_GPIO_0155_BITPOS (13)\r
-#define GIRQ08_GPIO_0156_BITPOS (14) \r
-#define GIRQ08_GPIO_0157_BITPOS (15)\r
-//\r
-#define GIRQ08_GPIO_0160_BITPOS (16)\r
-#define GIRQ08_GPIO_0161_BITPOS (17)\r
-#define GIRQ08_GPIO_0162_BITPOS (18)\r
-#define GIRQ08_GPIO_0163_BITPOS (19)\r
-#define GIRQ08_GPIO_0164_BITPOS (20)\r
-#define GIRQ08_GPIO_0165_BITPOS (21)\r
-#define GIRQ08_GPIO_0166_BITPOS (22) \r
-#define GIRQ08_GPIO_0167_BITPOS (23)\r
-//\r
-#define GIRQ08_MASK (0x00FFFFBFul)\r
-#define GIRQ08_WAKE_CAPABLE_MASK (0x00FFFFBFul)\r
-//\r
-\r
-// GIRQ09 Bit Positions \r
-#define GIRQ09_GPIO_0100_BITPOS (0)\r
-#define GIRQ09_GPIO_0101_BITPOS (1)\r
-#define GIRQ09_GPIO_0102_BITPOS (2)\r
-#define GIRQ09_GPIO_0103_BITPOS (3)\r
-#define GIRQ09_GPIO_0104_BITPOS (4)\r
-#define GIRQ09_GPIO_0105_BITPOS (5)\r
-#define GIRQ09_GPIO_0106_BITPOS (6) \r
-#define GIRQ09_GPIO_0107_BITPOS (7)\r
-//\r
-#define GIRQ09_GPIO_0110_BITPOS (8)\r
-#define GIRQ09_GPIO_0111_BITPOS (9)\r
-#define GIRQ09_GPIO_0112_BITPOS (10)\r
-#define GIRQ09_GPIO_0113_BITPOS (11)\r
-#define GIRQ09_GPIO_0114_BITPOS (12)\r
-#define GIRQ09_GPIO_0115_BITPOS (13)\r
-#define GIRQ09_GPIO_0116_BITPOS (14) \r
-#define GIRQ09_GPIO_0117_BITPOS (15)\r
-//\r
-#define GIRQ09_GPIO_0120_BITPOS (16)\r
-#define GIRQ09_GPIO_0121_BITPOS (17)\r
-#define GIRQ09_GPIO_0122_BITPOS (18)\r
-//#define GIRQ09_GPIO_0123_BITPOS (19) RESERVED\r
-#define GIRQ09_GPIO_0124_BITPOS (20)\r
-#define GIRQ09_GPIO_0125_BITPOS (21)\r
-#define GIRQ09_GPIO_0126_BITPOS (22) \r
-#define GIRQ09_GPIO_0127_BITPOS (23)\r
-//\r
-#define GIRQ09_GPIO_0130_BITPOS (24)\r
-#define GIRQ09_GPIO_0131_BITPOS (25)\r
-#define GIRQ09_GPIO_0132_BITPOS (26)\r
-#define GIRQ09_GPIO_0133_BITPOS (27)\r
-#define GIRQ09_GPIO_0134_BITPOS (28)\r
-#define GIRQ09_GPIO_0135_BITPOS (29)\r
-#define GIRQ09_GPIO_0136_BITPOS (30) \r
-//#define GIRQ09_GPIO_0137_BITPOS (31) RESERVED\r
-//\r
-#define GIRQ09_MASK (0x7FF7FFFFul)\r
-#define GIRQ09_WAKE_CAPABLE_MASK (0x7FF7FFFFul)\r
-//\r
-\r
-// GIRQ10 Bit Positions \r
-#define GIRQ10_GPIO_0040_BITPOS (0)\r
-#define GIRQ10_GPIO_0041_BITPOS (1)\r
-#define GIRQ10_GPIO_0042_BITPOS (2)\r
-#define GIRQ10_GPIO_0043_BITPOS (3)\r
-#define GIRQ10_GPIO_0044_BITPOS (4)\r
-#define GIRQ10_GPIO_0045_BITPOS (5)\r
-#define GIRQ10_GPIO_0046_BITPOS (6) \r
-#define GIRQ10_GPIO_0047_BITPOS (7)\r
-//\r
-#define GIRQ10_GPIO_0050_BITPOS (8)\r
-#define GIRQ10_GPIO_0051_BITPOS (9)\r
-#define GIRQ10_GPIO_0052_BITPOS (10)\r
-#define GIRQ10_GPIO_0053_BITPOS (11)\r
-#define GIRQ10_GPIO_0054_BITPOS (12)\r
-#define GIRQ10_GPIO_0055_BITPOS (13)\r
-#define GIRQ10_GPIO_0056_BITPOS (14) \r
-#define GIRQ10_GPIO_0057_BITPOS (15)\r
-//\r
-#define GIRQ10_GPIO_0060_BITPOS (16)\r
-#define GIRQ10_GPIO_0061_BITPOS (17)\r
-#define GIRQ10_GPIO_0062_BITPOS (18)\r
-#define GIRQ10_GPIO_0063_BITPOS (19)\r
-#define GIRQ10_GPIO_0064_BITPOS (20)\r
-#define GIRQ10_GPIO_0065_BITPOS (21)\r
-#define GIRQ10_GPIO_0066_BITPOS (22) \r
-#define GIRQ10_GPIO_0067_BITPOS (23)\r
-//\r
-#define GIRQ10_GPIO_0070_BITPOS (24)\r
-#define GIRQ10_GPIO_0071_BITPOS (25)\r
-#define GIRQ10_GPIO_0072_BITPOS (26)\r
-#define GIRQ10_GPIO_0073_BITPOS (27)\r
-#define GIRQ10_GPIO_0074_BITPOS (28)\r
-#define GIRQ10_GPIO_0075_BITPOS (29)\r
-#define GIRQ10_GPIO_0076_BITPOS (30) \r
-//#define GIRQ10_GPIO_0077_BITPOS (31) RESERVED\r
-//\r
-#define GIRQ10_MASK (0x7FFFFFFFul)\r
-#define GIRQ10_WAKE_CAPABLE_MASK (0x7FFFFFFFul)\r
-//\r
-\r
-// GIRQ11 Bit Positions \r
-#define GIRQ11_GPIO_0000_BITPOS (0)\r
-#define GIRQ11_GPIO_0001_BITPOS (1)\r
-#define GIRQ11_GPIO_0002_BITPOS (2)\r
-#define GIRQ11_GPIO_0003_BITPOS (3)\r
-#define GIRQ11_GPIO_0004_BITPOS (4)\r
-#define GIRQ11_GPIO_0005_BITPOS (5)\r
-#define GIRQ11_GPIO_0006_BITPOS (6) \r
-#define GIRQ11_GPIO_0007_BITPOS (7)\r
-//\r
-#define GIRQ11_GPIO_0010_BITPOS (8)\r
-#define GIRQ11_GPIO_0011_BITPOS (9)\r
-#define GIRQ11_GPIO_0012_BITPOS (10)\r
-#define GIRQ11_GPIO_0013_BITPOS (11)\r
-#define GIRQ11_GPIO_0014_BITPOS (12)\r
-#define GIRQ11_GPIO_0015_BITPOS (13)\r
-#define GIRQ11_GPIO_0016_BITPOS (14) \r
-#define GIRQ11_GPIO_0017_BITPOS (15)\r
-//\r
-#define GIRQ11_GPIO_0020_BITPOS (16)\r
-#define GIRQ11_GPIO_0021_BITPOS (17)\r
-#define GIRQ11_GPIO_0022_BITPOS (18)\r
-#define GIRQ11_GPIO_0023_BITPOS (19)\r
-#define GIRQ11_GPIO_0024_BITPOS (20)\r
-#define GIRQ11_GPIO_0025_BITPOS (21)\r
-#define GIRQ11_GPIO_0026_BITPOS (22) \r
-#define GIRQ11_GPIO_0027_BITPOS (23)\r
-//\r
-#define GIRQ11_GPIO_0030_BITPOS (24)\r
-#define GIRQ11_GPIO_0031_BITPOS (25)\r
-#define GIRQ11_GPIO_0032_BITPOS (26)\r
-#define GIRQ11_GPIO_0033_BITPOS (27)\r
-#define GIRQ11_GPIO_0034_BITPOS (28)\r
-#define GIRQ11_GPIO_0035_BITPOS (29)\r
-#define GIRQ11_GPIO_0036_BITPOS (30) \r
-//#define GIRQ11_GPIO_0037_BITPOS (31) RESERVED\r
-//\r
-#define GIRQ11_MASK (0x7FFFFFFFul)\r
-#define GIRQ11_WAKE_CAPABLE_MASK (0x7FFFFFFFul)\r
-//\r
-\r
-// GIRQ12 Bit Positions \r
-#define GIRQ12_SMBUS0_BITPOS (0)\r
-#define GIRQ12_SMBUS1_BITPOS (1)\r
-#define GIRQ12_SMBUS2_BITPOS (2)\r
-#define GIRQ12_SMBUS3_BITPOS (3)\r
-#define GIRQ12_SMBUS0_WAKE_BITPOS (4)\r
-#define GIRQ12_SMBUS1_WAKE_BITPOS (5)\r
-#define GIRQ12_SMBUS2_WAKE_BITPOS (6)\r
-#define GIRQ12_SMBUS3_WAKE_BITPOS (7)\r
-#define GIRQ12_SMBUS4_WAKE_BITPOS (8)\r
-// RESERVED bits[31:9]\r
-#define GIRQ12_MASK (0x01FFul)\r
-#define GIRQ12_WAKE_CAPABLE_MASK (0x01F0ul)\r
-//\r
-\r
-// GIRQ13 Bit Positions \r
-#define GIRQ13_DMA0_BITPOS (16)\r
-#define GIRQ13_DMA1_BITPOS (17)\r
-#define GIRQ13_DMA2_BITPOS (18)\r
-#define GIRQ13_DMA3_BITPOS (19)\r
-#define GIRQ13_DMA4_BITPOS (20)\r
-#define GIRQ13_DMA5_BITPOS (21)\r
-#define GIRQ13_DMA6_BITPOS (22)\r
-#define GIRQ13_DMA7_BITPOS (23)\r
-#define GIRQ13_DMA8_BITPOS (24)\r
-#define GIRQ13_DMA9_BITPOS (25)\r
-#define GIRQ13_DMA10_BITPOS (26)\r
-#define GIRQ13_DMA11_BITPOS (27)\r
-//\r
-#define GIRQ13_MASK (0x0FFF0000ul)\r
-#define GIRQ13_WAKE_CAPABLE_MASK (0x00000000ul)\r
-//\r
-\r
-// GIRQ14 Bit Positions \r
-#define GIRQ14_LPC_BITPOS (2)\r
-//\r
-#define GIRQ14_MASK (0x04ul)\r
-#define GIRQ14_WAKE_CAPABLE_MASK (0x00ul)\r
-//\r
-\r
-// GIRQ15 Bit Positions \r
-#define GIRQ15_UART0_BITPOS (0)\r
-#define GIRQ15_IMAP_BITPOS (2)\r
-#define GIRQ15_KBD_K_BITPOS (3)\r
-#define GIRQ15_KBD_M_BITPOS (4)\r
-#define GIRQ15_ACPI0_IBF_BITPOS (6)\r
-#define GIRQ15_ACPI0_OBF_BITPOS (7)\r
-#define GIRQ15_ACPI1_IBF_BITPOS (8)\r
-#define GIRQ15_ACPI1_OBF_BITPOS (9)\r
-#define GIRQ15_ACPI_PM1CTL_BITPOS (10)\r
-#define GIRQ15_ACPI_PM1EN_BITPOS (11)\r
-#define GIRQ15_ACPI_PM1STS_BITPOS (12)\r
-#define GIRQ15_MF8042_OBF_BITPOS (13)\r
-#define GIRQ15_MF8042_IBF_BITPOS (14)\r
-#define GIRQ15_MAILBOX_BITPOS (15)\r
-#define GIRQ15_MAILBOX_DATA_BITPOS (16)\r
-//\r
-#define GIRQ15_MASK (0x01FFDDul)\r
-#define GIRQ15_WAKE_CAPABLE_MASK (0x000000ul)\r
-//\r
-\r
-// GIRQ16 Bit Positions \r
-#define GIRQ16_PECI_BITPOS (3)\r
-//\r
-#define GIRQ16_MASK (0x08ul)\r
-#define GIRQ16_WAKE_CAPABLE_MASK (0x00ul)\r
-//\r
-\r
-// GIRQ17 Bit Positions \r
-#define GIRQ17_TACH0_BITPOS (0)\r
-#define GIRQ17_TACH1_BITPOS (1)\r
-#define GIRQ17_PS2_0_WAKE_BITPOS (2)\r
-#define GIRQ17_PS2_1_WAKE_BITPOS (3)\r
-#define GIRQ17_PS2_2_WAKE_BITPOS (4)\r
-#define GIRQ17_PS2_3_WAKE_BITPOS (5)\r
-#define GIRQ17_BC_WAKE_BITPOS (6)\r
-// RESERVED b[9:7]\r
-#define GIRQ17_ADC_INT0_BITPOS (10)\r
-#define GIRQ17_ADC_INT1_BITPOS (11)\r
-#define GIRQ17_V2P_INT0_BITPOS (12)\r
-#define GIRQ17_V2P_INT1_BITPOS (13)\r
-#define GIRQ17_PS2_0_BITPOS (14)\r
-#define GIRQ17_PS2_1_BITPOS (15)\r
-#define GIRQ17_PS2_2_BITPOS (16)\r
-#define GIRQ17_PS2_3_BITPOS (17)\r
-// RESERVED b[19:18]\r
-#define GIRQ17_HIBTMR_BITPOS (20)\r
-#define GIRQ17_KEY_INT_BITPOS (21)\r
-#define GIRQ17_KEY_INT_WAKE_BITPOS (22)\r
-#define GIRQ17_RPM_STALL_BITPOS (23)\r
-#define GIRQ17_RPM_SPIN_BITPOS (24)\r
-#define GIRQ17_VBAT_BITPOS (25)\r
-#define GIRQ17_LED0_BITPOS (26)\r
-#define GIRQ17_LED1_BITPOS (27)\r
-#define GIRQ17_LED2_BITPOS (28)\r
-#define GIRQ17_MBC_ERR_BITPOS (29)\r
-#define GIRQ17_MBC_BUSY_BITPOS (30)\r
-//\r
-#define GIRQ17_MASK (0x7FF3FC7Ful)\r
-#define GIRQ17_WAKE_CAPABLE_MASK (0x0230007Cul)\r
-//\r
-\r
-// GIRQ18 Bit Positions \r
-#define GIRQ18_SPI0_TX_BITPOS (0)\r
-#define GIRQ18_SPI0_RX_BITPOS (1)\r
-#define GIRQ18_SPI1_TX_BITPOS (2)\r
-#define GIRQ18_SPI1_RX_BITPOS (3)\r
-#define GIRQ18_LED3_BITPOS (4) // NVIC 85\r
-#define GIRQ18_PKE_ERR_BITPOS (5) // NVIC 86\r
-#define GIRQ18_PKE_END_BITPOS (6) // NVIC 87\r
-#define GIRQ18_TRNG_BITPOS (7) // NVIC 88\r
-#define GIRQ18_AES_BITPOS (8) // NVIC 89\r
-#define GIRQ18_HASH_BITPOS (9) // NVIC 90\r
-//\r
-#define GIRQ18_MASK (0x0FFul)\r
-#define GIRQ18_WAKE_CAPABLE_MASK (0x000ul)\r
-//\r
-\r
-// GIRQ19 Bit Positions \r
-#define GIRQ19_LRESET_BITPOS (0)\r
-#define GIRQ19_VCC_PWRGD_BITPOS (1)\r
-//\r
-#define GIRQ19_MASK (0x03ul)\r
-#define GIRQ19_WAKE_CAPABLE_MASK (0x03ul)\r
-//\r
-\r
-// GIRQ20 Bit Positions \r
-#define GIRQ20_GPIO_0200_BITPOS (0)\r
-#define GIRQ20_GPIO_0201_BITPOS (1)\r
-#define GIRQ20_GPIO_0202_BITPOS (2)\r
-#define GIRQ20_GPIO_0203_BITPOS (3)\r
-#define GIRQ20_GPIO_0204_BITPOS (4)\r
-//#define GIRQ20_GPIO_0205_BITPOS (5)\r
-#define GIRQ20_GPIO_0206_BITPOS (6)\r
-//#define GIRQ20_GPIO_0207_BITPOS (7)\r
-//\r
-#define GIRQ20_GPIO_0210_BITPOS (8)\r
-#define GIRQ20_GPIO_0211_BITPOS (9)\r
-#define GIRQ20_GPIO_0212_BITPOS (10)\r
-#define GIRQ20_GPIO_0213_BITPOS (11)\r
-// \r
-#define GIRQ20_MASK (0x0F5Ful)\r
-#define GIRQ20_WAKE_CAPABLE_MASK (0x0F5Ful)\r
-//\r
-\r
-// GIRQ21 Bit Positions \r
-#define GIRQ21_MASK (0x00ul)\r
-#define GIRQ21_WAKE_CAPABLE_MASK (0x00ul)\r
-\r
-// GIRQ22 Bit Positions \r
-#define GIRQ22_MASK (0x00ul)\r
-#define GIRQ22_WAKE_CAPABLE_MASK (0x00ul)\r
-\r
-// GIRQ23 Bit Positions \r
-#define GIRQ23_TMR0_BITPOS (0)\r
-#define GIRQ23_TMR1_BITPOS (1)\r
-#define GIRQ23_TMR2_BITPOS (2)\r
-#define GIRQ23_TMR3_BITPOS (3)\r
-#define GIRQ23_TMR4_BITPOS (4)\r
-#define GIRQ23_TMR5_BITPOS (5)\r
-//\r
-#define GIRQ23_MASK (0x03Ful)\r
-#define GIRQ23_WAKE_CAPABLE_MASK (0x000ul)\r
-//\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* NVIC,ECIA Routing Policy for Direct Mode */\r
-/* ------------------------------------------------------------------------------- */\r
-/* In Direct Mode, some interrupts could be configured to be used as aggregated.\r
- * Configuration:\r
- * 1. Always set ECS Interrupt Direct enable bit. \r
- * 2. If GIRQn aggregated set Block Enable bit.\r
- * 3. If GIRQn direct then clear Block Enable bit and enable individual NVIC inputs.\r
- * Switching issues:\r
- * Aggregate enable/disable requires set/clear single GIRQn bit in GIRQ Block En/Clr registers.\r
- * Also requires set/clear of individual NVIC Enables.\r
- * \r
- * Note: interrupt_is_girq_direct() internal function uses this policy to detect \r
- * if any interrupt is configured as direct or aggregated\r
-*/\r
-\r
-/** Initialize EC Interrupt Aggregator\r
- * @param mode 1 - Direct Map mode, 0 - Fully Aggregated Mode \r
- * @param girq_bitmask - BitMask of GIRQ to be configured as aggregated \r
- * This parameter is only applicable in direct mode.\r
- * @note All GPIO's and wake capable sources are always \r
- * aggregated! GPIO's interrupts will still work in direct mode.\r
- * Block wakes are not be routed to the processor in direct \r
- * mode. \r
- * Note2: This function disables and enables global interrupt \r
- */\r
-void interrupt_init(uint8_t mode, uint32_t girq_bitmask);\r
-\r
-/** Set interrupt routing mode to aggregated or direct. \r
- * @param mode 1 = Direct (except GPIO & wake), 0 = All Aggregated \r
- * @note In direct mode, one could enable certain GIRQs as aggregated using \r
- * p_interrupt_ecia_block_enable_set function\r
- */\r
-void interrupt_mode_set(uint8_t mode);\r
-\r
-/** Clears all individual interrupts Enables and Source in ECIA,\r
- * and Clears all NVIC external enables and pending bits \r
- */\r
-void interrupt_reset(void);\r
-\r
-/** Enables interrupt for a device \r
- * @param dev_iroute - source IROUTING information \r
- * @note This function disables and enables global interrupt \r
- */\r
-void interrupt_device_enable(uint32_t dev_iroute);\r
-\r
-/** Disables interrupt for a device\r
- * @param dev_iroute - source IROUTING information \r
- * @note This function disables and enables global interrupt \r
- */\r
-void interrupt_device_disable(uint32_t dev_iroute);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* ECIA APIs using device IROUTE() as input */ \r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Clear Source in the ECIA for the device \r
- * @param devi - device IROUTING value \r
- */\r
-void interrupt_device_ecia_source_clear(const uint32_t dev_iroute);\r
-\r
-/** Get the Source bit in the ECIA for the device \r
- * @param devi - device IROUTING value \r
- * @return 0 if source bit not set; else non-zero value\r
- */\r
-uint32_t interrupt_device_ecia_source_get(const uint32_t dev_iroute);\r
-\r
-/** Get the Result bit in the ECIA for the device \r
- * @param devi - device IROUTING value \r
- * @return 0 if result bit not set; else non-zero value\r
- */\r
-uint32_t interrupt_device_ecia_result_get(const uint32_t dev_iroute);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* NVIC APIs using device IROUTE() as input */ \r
-/* ------------------------------------------------------------------------------- */\r
-/* Note that if the device interrupt is aggregated, then these APIs would affect the \r
- * NVIC corresponding to the aggregated GIRQ \r
- */\r
-\r
-/** Enable/Disable the NVIC (in the NVIC controller) for the device\r
- * @param dev_iroute : source IROUTING information (encoded in a uint32_t)\r
- * @param en_flag : 1 = Enable the NVIC IRQ, 0 = Disable the NVIC IRQ \r
- * @note Recommended to use interrupt_device_enable, interrupt_device_disable\r
- * to enable/disable interrupts for the device, since those APIs configure ECIA as well\r
- */\r
-void interrupt_device_nvic_enable(uint32_t dev_iroute, uint8_t en_flag);\r
-\r
-/** Set NVIC priority for specified peripheral interrupt source\r
- * @param dev_iroute - source IROUTING information (encoded in a uint32_t)\r
- * @param nvic_pri - NVIC Priority\r
- * @note 1. If ECIA is in aggregated mode, the priority affects all interrupt \r
- * sources in the GIRQ. \r
- * 2. This function disables and enables global interrupt \r
- */\r
-void interrupt_device_nvic_priority_set(const uint32_t dev_iroute, const uint8_t nvic_pri);\r
-\r
-/** Return NVIC priority for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- * @return uint32_t NVIC priority \r
- */\r
-uint32_t interrupt_device_nvic_priority_get(const uint32_t dev_iroute);\r
-\r
-/** Return NVIC pending for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- * @return uint8_t 0(not pending), 1 (pending in NVIC) \r
- * \r
- */\r
-uint8_t interrupt_device_nvic_pending_get(const uint32_t dev_iroute);\r
-\r
-/** Set NVIC pending for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- */\r
-void interrupt_device_nvic_pending_set(const uint32_t dev_iroute);\r
-\r
-/** Clears NVIC pending for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- * @return uint8_t 0(not pending), 1 (pending in NVIC) - before clear \r
- * @note This function disables and enables global interrupt \r
- */\r
-uint8_t interrupt_device_nvic_pending_clear(const uint32_t dev_iroute);\r
- \r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Functions - Operations on GIRQ Block Enable Set, Enable Clear *\r
- * and Status Register */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Enable specified GIRQ in ECIA block\r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- */\r
- void p_interrupt_ecia_block_enable_set(uint8_t girq_id);\r
- \r
- /** Enable GIRQs in ECIA Block \r
- * @param girq_bitmask - Bitmask of GIRQs to be enabled in ECIA Block \r
- */\r
-void p_interrupt_ecia_block_enable_bitmask_set(uint32_t girq_bitmask);\r
-\r
-/** Check if specified GIRQ block enabled or not\r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- * @return retVal - 1 if the particular GIRQ block enabled, else 0\r
- */\r
-uint8_t p_interrupt_ecia_block_enable_get(uint8_t girq_id);\r
-\r
-/** Set all GIRQ block enables */\r
-void p_interrupt_ecia_block_enable_all_set(void);\r
-\r
-/** Clear specified GIRQ in ECIA Block \r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- */\r
-void p_interrupt_ecia_block_enable_clr(uint8_t girq_id);\r
-\r
-/** Clear GIRQs in ECIA Block \r
- * @param girq_bitmask - Bitmask of GIRQs to be cleared in ECIA Block \r
- */\r
-void p_interrupt_ecia_block_enable_bitmask_clr(uint32_t girq_bitmask);\r
-\r
-/** p_interrupt_ecia_block_enable_all_clr - Clears all GIRQ block enables */\r
-void p_interrupt_ecia_block_enable_all_clr(void);\r
- \r
- /** Get status of GIRQ in ECIA Block\r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- * @return 0 if status bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_block_irq_status_get(uint8_t girq_id);\r
-\r
-/** Reads the Block IRQ Vector Register\r
- * @return 32-bit value\r
- */\r
-uint32_t p_interrupt_ecia_block_irq_all_status_get(void);\r
-\r
-/* ---------------------------------------------------------------------------- */\r
-/* Peripheral Functions - Operations on GIRQx Source, Enable, Result *\r
- * and Enable Registers */\r
-/* ---------------------------------------------------------------------------- */\r
-\r
-/** Clear specified interrupt source bit in GIRQx\r
- * @param girq_id - enum MEC_GIRQ_IDS\r
- * @param bitnum -[0, 31]\r
- */\r
-void p_interrupt_ecia_girq_source_clr(int16_t girq_id, uint8_t bitnum);\r
-\r
-/** Read the specified interrupt source bit in GIRQx\r
- * @param girq_id - enum MEC_GIRQ_IDS\r
- * @param bitnum -[0, 31]\r
- * @return 0 if source bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_girq_source_get(int16_t girq_id, uint8_t bitnum);\r
-\r
-/** Enable the specified interrupt in GIRQx\r
- * girq_id - enum MEC_GIRQ_IDS\r
- * bitnum = [0, 31]\r
- */\r
-void p_interrupt_ecia_girq_enable_set(uint16_t girq_id, uint8_t bitnum);\r
-\r
-/** Disable the specified interrupt in GIRQx\r
- * girq_id - enum MEC_GIRQ_IDS\r
- * bitnum = [0, 31]\r
- */\r
-void p_interrupt_ecia_girq_enable_clr(uint16_t girq_id, uint8_t bitnum);\r
-\r
-/** Read the status of the specified interrupt in GIRQx\r
- * girq_id - enum MEC_GIRQ_IDS\r
- * bitnum = [0, 31]\r
- * @return 0 if enable bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_girq_enable_get(uint16_t girq_id, uint8_t bitnum);\r
-\r
-/** Read the result bit of the interrupt in GIRQx\r
- * @param girq_id - enum MEC_GIRQ_IDS\r
- * @param bitnum -[0, 31]\r
- * @return 0 if enable bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_girq_result_get(int16_t girq_id, uint8_t bitnum);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Function - Operations on all GIRQs */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Clear all aggregator GIRQn status registers */\r
-void p_interrupt_ecia_girqs_source_reset(void);\r
-\r
-/** Clear all aggregator GIRQn enables */\r
- void p_interrupt_ecia_girqs_enable_reset(void);\r
- \r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Function - Function to set interrupt control */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Set interrupt control \r
- * @param nvic_en_flag : 0 = Alternate NVIC disabled, 1 = Alternate NVIC enabled\r
- */\r
- void p_interrupt_control_set(uint8_t nvic_en_flag);\r
- \r
- /** Read interrupt control \r
- * @return uint8_t - 0 = Alternate NVIC disabled, 1 = Alternate NVIC enabled\r
- */\r
-uint8_t p_interrupt_control_get(void);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Functions - NVIC */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Enable/Disable the NVIC IRQ in the NVIC interrupt controller\r
- * @param nvic_num : NVIC number (see enum IRQn_Type)\r
- * @param en_flag : 1 = Enable the NVIC IRQ, 0 = Disable the NVIC IRQ\r
- * @note Application should perform this operation\r
- */\r
- void p_interrupt_nvic_enable(IRQn_Type nvic_num, uint8_t en_flag);\r
- \r
- /** ecia_nvic_clr_en - Clear all NVIC external enables */ \r
-void p_interrupt_nvic_extEnables_clr(void);\r
-\r
-/** Clear all NVIC external enables and pending bits */\r
-void p_interrupt_nvic_enpend_clr(void);\r
-\r
-/** Set NVIC external priorities to POR value */\r
-void p_interrupt_nvic_priorities_default_set(void);\r
-\r
-/** Set NVIC external priorities to specified priority (0 - 7)\r
- * @param zero-based 3-bit priority value: 0=highest, 7=lowest.\r
- * @note NVIC highest priority is the value 0, lowest is all 1's.\r
- * Each external interrupt has an 8-bit register and the priority \r
- * is left justified in the registers. MECxxx implements 8 priority \r
- * levels or bits [7:5] in the register. Lowest priority = 0xE0\r
- */\r
-void p_interrupt_nvic_priorities_set(uint8_t new_pri);\r
-\r
-#endif /*_INTERRUPT_H_*/\r
-\r
-/** @}\r
- */\r
-\r
-\r
-\r
+++ /dev/null
-/****************************************************************************\r
-* © 2013 Microchip Technology Inc. and its subsidiaries.\r
-* You may use this software and any derivatives exclusively with\r
-* Microchip products.\r
-* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".\r
-* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,\r
-* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,\r
-* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP\r
-* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.\r
-* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,\r
-* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND\r
-* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS\r
-* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.\r
-* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL\r
-* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF\r
-* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.\r
-* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE\r
-* OF THESE TERMS.\r
-*/\r
-\r
-/** @defgroup interrupt interrupt\r
- * @{\r
- */\r
-/** @file interrupt.h\r
- \brief This is the header file for interrupt.c\r
- This program is designed to allow the other C programs to be able to use this component\r
-\r
- There are entry points for all C wrapper API implementation\r
-\r
-<b>Platform:</b> This is ARC-based component \r
-\r
-<b>Toolset:</b> Metaware IDE(8.5.1)\r
-<b>Reference:</b> smsc_reusable_fw_requirement.doc */\r
-\r
-/*******************************************************************************\r
- * SMSC version control information (Perforce):\r
- *\r
- * FILE: $File: //depot_pcs/FWEng/Release/projects/CEC1302_CLIB/release2/Source/hw_blks/kernel/skern/source/interrupt/interrupt.h $\r
- * REVISION: $Revision: #1 $\r
- * DATETIME: $DateTime: 2015/12/23 15:37:58 $\r
- * AUTHOR: $Author: akrishnan $\r
- *\r
- * Revision history (latest first):\r
- * #xx\r
- ***********************************************************************************\r
- */\r
-\r
-#ifndef _INTERRUPT_H_\r
-#define _INTERRUPT_H_\r
-\r
-\r
-/* public function prototypes */\r
-void interrupt_block_init(void);\r
-void null_handler(void);\r
-__irq void SysTick_Handler(void);\r
-\r
-/* macro for interrupt control */\r
-/* 16-bit timers interrupt control */\r
-#define sbit_TIMER0 b_bit0\r
-#define sbit_TIMER1 b_bit1\r
-#define sbit_TIMER2 b_bit2\r
-#define sbit_TIMER3 b_bit3\r
-\r
-#define disable_timer0_irq() mCLR_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer0_irq() mSET_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer0_source() mCLR_SRC_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer0_source() mGET_BIT(sbit_TIMER0, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-#define disable_timer1_irq() mCLR_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer1_irq() mSET_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer1_source() mCLR_SRC_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer1_source() mGET_BIT(sbit_TIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-#define disable_timer2_irq() mCLR_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer2_irq() mSET_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer2_source() mCLR_SRC_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer2_source() mGET_BIT(sbit_TIMER2, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-#define disable_timer3_irq() mCLR_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_timer3_irq() mSET_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_timer3_source() mCLR_SRC_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_timer3_source() mGET_BIT(sbit_TIMER3, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-\r
-/* hibernation timers interrupt control */\r
-#define sbit_HTIMER0 b_bit20\r
-#define sbit_HTIMER1 b_bit14\r
-\r
-#define disable_htimer0_irq() mCLR_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define enable_htimer0_irq() mSET_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define clear_htimer0_source() mCLR_SRC_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_SOURCE)\r
-#define get_htimer0_source() mGET_BIT(sbit_HTIMER0, MMCR_EC_GIRQ17_SOURCE)\r
-\r
-#define disable_htimer1_irq() mCLR_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_htimer1_irq() mSET_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_htimer1_source() mCLR_SRC_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_htimer1_source() mGET_BIT(sbit_HTIMER1, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-/* RTC interrupt control */\r
-#define b_bit18 (1 << 18)\r
-#define b_bit19 (1 << 19)\r
-#define sbit_RTC_INT b_bit18\r
-#define disable_rtc_irq() mCLR_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define enable_rtc_irq() mSET_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define clear_rtc_irq_source() mCLR_SRC_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define get_rtc_irq_source() mGET_BIT(sbit_RTC_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-/* RTC alarm interrupt control */\r
-#define sbit_RTC_ALM_INT b_bit19\r
-#define disable_rtc_alm_irq() mCLR_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define enable_rtc_alm_irq() mSET_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define clear_rtc_irq_alm_source() mCLR_SRC_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-#define get_rtc_irq_alm_source() mGET_BIT(sbit_RTC_ALM_INT, MMCR_EC_GIRQ17_ENABLE_SET)\r
-\r
-/* week timer interrupt control */\r
-#define sbit_WKTIMER b_bit7\r
-\r
-#define disable_wktimer_irq() mCLR_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_wktimer_irq() mSET_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_wktimer_source() mCLR_SRC_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_wktimer_source() mGET_BIT(sbit_WKTIMER, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-\r
-/* scan matrix interrupt control */\r
-#define sbit_SCANNER b_bit16\r
-#define disable_scanner_irq() mCLR_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_scanner_irq() mSET_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_scanner_source() mCLR_SRC_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_scanner_source() mGET_BIT(sbit_SCANNER, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-\r
-/* PS2 interrupt control */\r
-/* PS2 activity interrupt */\r
-#define sbit_PS2_ACT_0 b_bit13\r
-#define sbit_PS2_ACT_1 b_bit14\r
-#define sbit_PS2_ACT_2 b_bit15\r
-/* PS2 wakeup interrupt: detect start bit */\r
-#define sbit_PS2_WK_0A b_bit17\r
-#define sbit_PS2_WK_1B b_bit20\r
-#define sbit_PS2_WK_2 b_bit21\r
-\r
-/* PS2 activity interrupt control */\r
-#define disable_ps2_act_0_irq() mCLR_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_act_0_irq() mSET_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_act_0_source() mCLR_SRC_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_act_0_source() mGET_BIT(sbit_PS2_ACT_0, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_act_1_irq() mCLR_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_act_1_irq() mSET_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_act_1_source() mCLR_SRC_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_act_1_source() mGET_BIT(sbit_PS2_ACT_1, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_act_2_irq() mCLR_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_act_2_irq() mSET_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_act_2_source() mCLR_SRC_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_act_2_source() mGET_BIT(sbit_PS2_ACT_2, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-/* PS2 wakeup interrupt control */\r
-#define disable_ps2_wk_0_irq() mCLR_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_wk_0_irq() mSET_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_wk_0_source() mCLR_SRC_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_wk_0_source() mGET_BIT(sbit_PS2_WK_0A, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_wk_1_irq() mCLR_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_wk_1_irq() mSET_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_wk_1_source() mCLR_SRC_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_wk_1_source() mGET_BIT(sbit_PS2_WK_1B, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-#define disable_ps2_wk_2_irq() mCLR_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define enable_ps2_wk_2_irq() mSET_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_ENABLE_SET)\r
-#define clear_ps2_wk_2_source() mCLR_SRC_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_SOURCE)\r
-#define get_ps2_wk_2_source() mGET_BIT(sbit_PS2_WK_2, MMCR_EC_GIRQ19_SOURCE)\r
-\r
-\r
-/* ICT interrupt control */\r
-/* capture 0~5 interrupt */\r
-#define sbit_ICT_CAPTURE0 b_bit17\r
-#define sbit_ICT_CAPTURE1 b_bit18\r
-#define sbit_ICT_CAPTURE2 b_bit19\r
-#define sbit_ICT_CAPTURE3 b_bit20\r
-#define sbit_ICT_CAPTURE4 b_bit21\r
-#define sbit_ICT_CAPTURE5 b_bit22\r
-\r
-/* capture 0 interrupt control */\r
-#define disable_capture0_irq() mCLR_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define enable_capture0_irq() mSET_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_ENABLE_SET)\r
-#define clear_capture0_source() mCLR_SRC_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_SOURCE)\r
-#define get_capture0_source() mGET_BIT(sbit_ICT_CAPTURE0, MMCR_EC_GIRQ23_SOURCE)\r
-\r
-\r
-/* SMBus interrupt control */\r
-\r
-\r
-/* GPIO interrupt control */\r
-\r
-\r
-/* BC link interrupt control */\r
-/* bclink A~D interrupt */\r
-#define sbit_BCLINK_A_BUSY b_bit0\r
-#define sbit_BCLINK_A_ERR b_bit1\r
-#define sbit_BCLINK_A_INT b_bit2\r
-#define sbit_BCLINK_B_BUSY b_bit3\r
-#define sbit_BCLINK_B_ERR b_bit4\r
-#define sbit_BCLINK_B_INT b_bit5\r
-#define sbit_BCLINK_C_BUSY b_bit6\r
-#define sbit_BCLINK_C_ERR b_bit7\r
-#define sbit_BCLINK_C_INT b_bit8\r
-#define sbit_BCLINK_D_BUSY b_bit9\r
-#define sbit_BCLINK_D_ERR b_bit10\r
-#define sbit_BCLINK_D_INT b_bit11\r
-\r
-/* bclink B interrupt control */\r
-#define disable_bclink_b_busy_irq() mCLR_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_bclink_b_busy_irq() mSET_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_bclink_b_busy_source() mCLR_SRC_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_bclink_b_busy_source() mGET_BIT(sbit_BCLINK_B_BUSY, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-#define disable_bclink_b_err_irq() mCLR_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_bclink_b_err_irq() mSET_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_bclink_b_err_source() mCLR_SRC_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_bclink_b_err_source() mGET_BIT(sbit_BCLINK_B_ERR, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-#define disable_bclink_b_int_irq() mCLR_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define enable_bclink_b_int_irq() mSET_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_ENABLE_SET)\r
-#define clear_bclink_b_int_source() mCLR_SRC_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_SOURCE)\r
-#define get_bclink_b_int_source() mGET_BIT(sbit_BCLINK_B_INT, MMCR_EC_GIRQ18_SOURCE)\r
-\r
-/* UART interrupt control */\r
-#define sbit_UART_INT b_bit0\r
-\r
-#define disable_uart_irq() mCLR_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_ENABLE_SET)\r
-#define enable_uart_irq() mSET_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_ENABLE_SET)\r
-#define clear_uart_irq_source() mCLR_SRC_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_SOURCE)\r
-#define get_uart_irq_source() mGET_BIT(sbit_UART_INT, MMCR_EC_GIRQ15_SOURCE)\r
-\r
-// GIRQ IDs for EC Interrupt Aggregator\r
-enum MEC_GIRQ_IDS\r
-{\r
- MEC_GIRQ08_ID = 0,\r
- MEC_GIRQ09_ID, \r
- MEC_GIRQ10_ID, \r
- MEC_GIRQ11_ID, \r
- MEC_GIRQ12_ID, \r
- MEC_GIRQ13_ID, \r
- MEC_GIRQ14_ID, \r
- MEC_GIRQ15_ID, \r
- MEC_GIRQ16_ID, \r
- MEC_GIRQ17_ID, \r
- MEC_GIRQ18_ID, \r
- MEC_GIRQ19_ID, \r
- MEC_GIRQ20_ID, \r
- MEC_GIRQ21_ID, \r
- MEC_GIRQ22_ID, \r
- MEC_GIRQ23_ID, \r
- MEC_GIRQ_ID_MAX\r
-};\r
-\r
-//Bitmask of GIRQ in ECIA Block Registers\r
-#define MEC_GIRQ08_BITMASK (1UL << (MEC_GIRQ08_ID + 8))\r
-#define MEC_GIRQ09_BITMASK (1UL << (MEC_GIRQ09_ID + 8)) \r
-#define MEC_GIRQ10_BITMASK (1UL << (MEC_GIRQ10_ID + 8)) \r
-#define MEC_GIRQ11_BITMASK (1UL << (MEC_GIRQ11_ID + 8)) \r
-#define MEC_GIRQ12_BITMASK (1UL << (MEC_GIRQ12_ID + 8)) \r
-#define MEC_GIRQ13_BITMASK (1UL << (MEC_GIRQ13_ID + 8)) \r
-#define MEC_GIRQ14_BITMASK (1UL << (MEC_GIRQ14_ID + 8)) \r
-#define MEC_GIRQ15_BITMASK (1UL << (MEC_GIRQ15_ID + 8)) \r
-#define MEC_GIRQ16_BITMASK (1UL << (MEC_GIRQ16_ID + 8)) \r
-#define MEC_GIRQ17_BITMASK (1UL << (MEC_GIRQ17_ID + 8)) \r
-#define MEC_GIRQ18_BITMASK (1UL << (MEC_GIRQ18_ID + 8)) \r
-#define MEC_GIRQ19_BITMASK (1UL << (MEC_GIRQ19_ID + 8)) \r
-#define MEC_GIRQ20_BITMASK (1UL << (MEC_GIRQ20_ID + 8)) \r
-#define MEC_GIRQ21_BITMASK (1UL << (MEC_GIRQ21_ID + 8)) \r
-#define MEC_GIRQ22_BITMASK (1UL << (MEC_GIRQ22_ID + 8)) \r
-#define MEC_GIRQ23_BITMASK (1UL << (MEC_GIRQ23_ID + 8)) \r
-\r
-#define INTERRUPT_MODE_ALL_AGGREGATED (0u)\r
-#define INTERRUPT_MODE_DIRECT (1u)\r
-\r
-// Bit map of GIRQs whose sources can be directly connected to the NVIC\r
-// GIRQs 12 - 18, 23\r
-#define ECIA_GIRQ_DIRECT_BITMAP (0x0087F000ul)\r
-\r
-/*\r
- * n = b[7:0] = zero-based direct mapped NVIC ID\r
- * m = b[15:8] = zero-based aggregated NVIC ID\r
- * a = b[23:16] = block Aggregator register block ID\r
- * b = b[31:24] = block bit position in Aggregator registers\r
-*/\r
-#define IROUTE(b,a,m,n) (((uint32_t)(n)&0xFFul) + \\r
- (((uint32_t)(m)&0xFFul)<<8u) + \\r
- ((((uint32_t)(a)-8ul)&0x0F)<<16u) + \\r
- (((uint32_t)(b)&0x1Ful)<<24))\r
-\r
-#define ECIA_NVIC_ID_BITPOS (0u)\r
-#define ECIA_IA_NVIC_ID_BITPOS (8u)\r
-#define ECIA_GIRQ_ID_BITPOS (16u)\r
-#define ECIA_GIRQ_BIT_BITPOS (24u)\r
-\r
-//\r
-// GIRQ08\r
-//\r
-#define GPIO_0140_IROUTE IROUTE(0,8,57,57)\r
-#define GPIO_0141_IROUTE IROUTE(1,8,57,57)\r
-#define GPIO_0142_IROUTE IROUTE(2,8,57,57)\r
-#define GPIO_0143_IROUTE IROUTE(3,8,57,57)\r
-#define GPIO_0144_IROUTE IROUTE(4,8,57,57)\r
-#define GPIO_0145_IROUTE IROUTE(5,8,57,57)\r
-#define GPIO_0147_IROUTE IROUTE(7,8,57,57)\r
-//\r
-#define GPIO_0150_IROUTE IROUTE(8,8,57,57)\r
-#define GPIO_0151_IROUTE IROUTE(9,8,57,57)\r
-#define GPIO_0152_IROUTE IROUTE(10,8,57,57)\r
-#define GPIO_0153_IROUTE IROUTE(11,8,57,57)\r
-#define GPIO_0154_IROUTE IROUTE(12,8,57,57)\r
-#define GPIO_0155_IROUTE IROUTE(13,8,57,57)\r
-#define GPIO_0156_IROUTE IROUTE(14,8,57,57)\r
-#define GPIO_0157_IROUTE IROUTE(15,8,57,57)\r
-//\r
-#define GPIO_0160_IROUTE IROUTE(16,8,57,57)\r
-#define GPIO_0161_IROUTE IROUTE(17,8,57,57)\r
-#define GPIO_0162_IROUTE IROUTE(18,8,57,57)\r
-#define GPIO_0163_IROUTE IROUTE(19,8,57,57)\r
-#define GPIO_0164_IROUTE IROUTE(20,8,57,57)\r
-#define GPIO_0165_IROUTE IROUTE(21,8,57,57)\r
-#define GPIO_0166_IROUTE IROUTE(22,8,57,57)\r
-#define GPIO_0167_IROUTE IROUTE(23,8,57,57)\r
-\r
-//\r
-// GIRQ09\r
-//\r
-#define GPIO_0100_IROUTE IROUTE(0,9,58,58)\r
-#define GPIO_0101_IROUTE IROUTE(1,9,58,58)\r
-#define GPIO_0102_IROUTE IROUTE(2,9,58,58)\r
-#define GPIO_0103_IROUTE IROUTE(3,9,58,58)\r
-#define GPIO_0104_IROUTE IROUTE(4,9,58,58)\r
-#define GPIO_0105_IROUTE IROUTE(5,9,58,58)\r
-#define GPIO_0105_IROUTE IROUTE(5,9,58,58)\r
-#define GPIO_0107_IROUTE IROUTE(7,9,58,58)\r
-//\r
-#define GPIO_0110_IROUTE IROUTE(8,9,58,58)\r
-#define GPIO_0111_IROUTE IROUTE(9,9,58,58)\r
-#define GPIO_0112_IROUTE IROUTE(10,9,58,58)\r
-#define GPIO_0113_IROUTE IROUTE(11,9,58,58)\r
-#define GPIO_0114_IROUTE IROUTE(12,9,58,58)\r
-#define GPIO_0115_IROUTE IROUTE(13,9,58,58)\r
-#define GPIO_0116_IROUTE IROUTE(14,9,58,58)\r
-#define GPIO_0117_IROUTE IROUTE(15,9,58,58)\r
-//\r
-#define GPIO_0120_IROUTE IROUTE(16,9,58,58)\r
-#define GPIO_0121_IROUTE IROUTE(17,9,58,58)\r
-#define GPIO_0122_IROUTE IROUTE(18,9,58,58)\r
-#define GPIO_0124_IROUTE IROUTE(20,9,58,58)\r
-#define GPIO_0125_IROUTE IROUTE(21,9,58,58)\r
-#define GPIO_0126_IROUTE IROUTE(22,9,58,58)\r
-#define GPIO_0127_IROUTE IROUTE(23,9,58,58)\r
-//\r
-#define GPIO_0130_IROUTE IROUTE(24,9,58,58)\r
-#define GPIO_0131_IROUTE IROUTE(25,9,58,58)\r
-#define GPIO_0132_IROUTE IROUTE(26,9,58,58)\r
-#define GPIO_0133_IROUTE IROUTE(27,9,58,58)\r
-#define GPIO_0134_IROUTE IROUTE(28,9,58,58)\r
-#define GPIO_0135_IROUTE IROUTE(29,9,58,58)\r
-#define GPIO_0136_IROUTE IROUTE(30,9,58,58)\r
-\r
-//\r
-// GIRQ10\r
-//\r
-#define GPIO_0040_IROUTE IROUTE(0,10,59,59)\r
-#define GPIO_0041_IROUTE IROUTE(1,10,59,59)\r
-#define GPIO_0042_IROUTE IROUTE(2,10,59,59)\r
-#define GPIO_0043_IROUTE IROUTE(3,10,59,59)\r
-#define GPIO_0044_IROUTE IROUTE(4,10,59,59)\r
-#define GPIO_0045_IROUTE IROUTE(5,10,59,59)\r
-#define GPIO_0045_IROUTE IROUTE(5,10,59,59)\r
-#define GPIO_0047_IROUTE IROUTE(7,10,59,59)\r
-//\r
-#define GPIO_0050_IROUTE IROUTE(8,10,59,59)\r
-#define GPIO_0051_IROUTE IROUTE(9,10,59,59)\r
-#define GPIO_0052_IROUTE IROUTE(10,10,59,59)\r
-#define GPIO_0053_IROUTE IROUTE(11,10,59,59)\r
-#define GPIO_0054_IROUTE IROUTE(12,10,59,59)\r
-#define GPIO_0055_IROUTE IROUTE(13,10,59,59)\r
-#define GPIO_0056_IROUTE IROUTE(14,10,59,59)\r
-#define GPIO_0057_IROUTE IROUTE(15,10,59,59)\r
-//\r
-#define GPIO_0060_IROUTE IROUTE(16,10,59,59)\r
-#define GPIO_0061_IROUTE IROUTE(17,10,59,59)\r
-#define GPIO_0062_IROUTE IROUTE(18,10,59,59)\r
-#define GPIO_0063_IROUTE IROUTE(19,10,59,59)\r
-#define GPIO_0064_IROUTE IROUTE(20,10,59,59)\r
-#define GPIO_0065_IROUTE IROUTE(21,10,59,59)\r
-#define GPIO_0066_IROUTE IROUTE(22,10,59,59)\r
-#define GPIO_0067_IROUTE IROUTE(23,10,59,59)\r
-//\r
-#define GPIO_0070_IROUTE IROUTE(24,10,59,59)\r
-#define GPIO_0071_IROUTE IROUTE(25,10,59,59)\r
-#define GPIO_0072_IROUTE IROUTE(26,10,59,59)\r
-#define GPIO_0073_IROUTE IROUTE(27,10,59,59)\r
-#define GPIO_0074_IROUTE IROUTE(28,10,59,59)\r
-#define GPIO_0075_IROUTE IROUTE(29,10,59,59)\r
-#define GPIO_0076_IROUTE IROUTE(30,10,59,59)\r
-\r
-//\r
-// GIRQ11\r
-//\r
-#define GPIO_0000_IROUTE IROUTE(0,11,60,60)\r
-#define GPIO_0001_IROUTE IROUTE(1,11,60,60)\r
-#define GPIO_0002_IROUTE IROUTE(2,11,60,60)\r
-#define GPIO_0003_IROUTE IROUTE(3,11,60,60)\r
-#define GPIO_0004_IROUTE IROUTE(4,11,60,60)\r
-#define GPIO_0005_IROUTE IROUTE(5,11,60,60)\r
-#define GPIO_0006_IROUTE IROUTE(6,11,60,60)\r
-#define GPIO_0007_IROUTE IROUTE(7,11,60,60)\r
-//\r
-#define GPIO_0010_IROUTE IROUTE(8,11,60,60)\r
-#define GPIO_0011_IROUTE IROUTE(9,11,60,60)\r
-#define GPIO_0012_IROUTE IROUTE(10,11,60,60)\r
-#define GPIO_0013_IROUTE IROUTE(11,11,60,60)\r
-#define GPIO_0014_IROUTE IROUTE(12,11,60,60)\r
-#define GPIO_0015_IROUTE IROUTE(13,11,60,60)\r
-#define GPIO_0016_IROUTE IROUTE(14,11,60,60)\r
-#define GPIO_0017_IROUTE IROUTE(15,11,60,60)\r
-//\r
-#define GPIO_0020_IROUTE IROUTE(16,11,60,60)\r
-#define GPIO_0021_IROUTE IROUTE(17,11,60,60)\r
-#define GPIO_0022_IROUTE IROUTE(18,11,60,60)\r
-#define GPIO_0023_IROUTE IROUTE(19,11,60,60)\r
-#define GPIO_0024_IROUTE IROUTE(20,11,60,60)\r
-#define GPIO_0025_IROUTE IROUTE(21,11,60,60)\r
-#define GPIO_0026_IROUTE IROUTE(22,11,60,60)\r
-#define GPIO_0027_IROUTE IROUTE(23,11,60,60)\r
-//\r
-#define GPIO_0030_IROUTE IROUTE(24,11,60,60)\r
-#define GPIO_0031_IROUTE IROUTE(25,11,60,60)\r
-#define GPIO_0032_IROUTE IROUTE(26,11,60,60)\r
-#define GPIO_0033_IROUTE IROUTE(27,11,60,60)\r
-#define GPIO_0034_IROUTE IROUTE(28,11,60,60)\r
-#define GPIO_0035_IROUTE IROUTE(29,11,60,60)\r
-#define GPIO_0036_IROUTE IROUTE(30,11,60,60)\r
-\r
-//\r
-// GIRQ12\r
-//\r
-#define SMB0_IROUTE IROUTE(0,12,61,0)\r
-#define SMB1_IROUTE IROUTE(1,12,61,1)\r
-#define SMB2_IROUTE IROUTE(2,12,61,2)\r
-#define SMB3_IROUTE IROUTE(3,12,61,3)\r
-// SMB wakes have no direct connection to NVIC, always aggregated\r
-#define SMB0_WAKE_IROUTE IROUTE(4,12,61,61)\r
-#define SMB1_WAKE_IROUTE IROUTE(5,12,61,61)\r
-#define SMB2_WAKE_IROUTE IROUTE(6,12,61,61)\r
-#define SMB3_WAKE_IROUTE IROUTE(7,12,61,61)\r
-#define SMB4_WAKE_IROUTE IROUTE(8,12,61,61)\r
-\r
-//\r
-// GIRQ13\r
-//\r
-#define DMA0_IROUTE IROUTE(16,13,62,4)\r
-#define DMA1_IROUTE IROUTE(17,13,62,5)\r
-#define DMA2_IROUTE IROUTE(18,13,62,6)\r
-#define DMA3_IROUTE IROUTE(19,13,62,7)\r
-#define DMA4_IROUTE IROUTE(20,13,62,8)\r
-#define DMA5_IROUTE IROUTE(21,13,62,9)\r
-#define DMA6_IROUTE IROUTE(22,13,62,10)\r
-#define DMA7_IROUTE IROUTE(23,13,62,11)\r
-#define DMA8_IROUTE IROUTE(24,13,62,81)\r
-#define DMA9_IROUTE IROUTE(25,13,62,82)\r
-#define DMA10_IROUTE IROUTE(26,13,62,83)\r
-#define DMA11_IROUTE IROUTE(27,13,62,84)\r
-\r
-//\r
-// GIRQ14\r
-//\r
-#define LPC_BERR_IROUTE IROUTE(2,14,63,12)\r
-\r
-//\r
-// GIRQ15\r
-//\r
-#define UART0_IROUTE IROUTE(0,15,64,13)\r
-#define EMI0_IROUTE IROUTE(2,15,64,14)\r
-#define ACPI_EC0_IBF_IROUTE IROUTE(6,15,64,15)\r
-#define ACPI_EC0_OBF_IROUTE IROUTE(7,15,64,16)\r
-#define ACPI_EC1_IBF_IROUTE IROUTE(8,15,64,17)\r
-#define ACPI_EC1_OBF_IROUTE IROUTE(9,15,64,18)\r
-#define ACPI_PM1_CTL_IROUTE IROUTE(10,15,64,19)\r
-#define ACPI_PM1_EN_IROUTE IROUTE(11,15,64,20)\r
-#define ACPI_PM1_STS_IROUTE IROUTE(12,15,64,21)\r
-#define EM8042_OBF_IROUTE IROUTE(13,15,64,22)\r
-#define EM8042_IBF_IROUTE IROUTE(14,15,64,23)\r
-#define MBOX_IROUTE IROUTE(15,15,64,24)\r
-#define MBOX_DATA_IROUTE IROUTE(16,15,64,40) \r
-\r
-//\r
-// GIRQ16\r
-//\r
-#define PECI_IROUTE IROUTE(3,16,65,25)\r
-\r
-//\r
-// GIRQ17\r
-//\r
-#define TACH0_IROUTE IROUTE(0,17,66,26)\r
-#define TACH1_IROUTE IROUTE(1,17,66,27)\r
-#define PS2_0_WAKE_IROUTE IROUTE(2,17,66,66)\r
-#define PS2_1_WAKE_IROUTE IROUTE(3,17,66,66)\r
-#define PS2_2_WAKE_IROUTE IROUTE(4,17,66,66)\r
-#define PS2_3_WAKE_IROUTE IROUTE(5,17,66,66)\r
-#define BC_WAKE_IROUTE IROUTE(6,17,66,66)\r
-#define ADC_SNGL_IROUTE IROUTE(10,17,66,28)\r
-#define ADC_RPT_IROUTE IROUTE(11,17,66,29)\r
-#define ADC2PWM1_IROUTE IROUTE(12,17,66,30)\r
-#define ADC2PWM2_IROUTE IROUTE(13,17,66,31)\r
-#define PS2_0_IROUTE IROUTE(14,17,66,32)\r
-#define PS2_1_IROUTE IROUTE(15,17,66,33)\r
-#define PS2_2_IROUTE IROUTE(16,17,66,34)\r
-#define PS2_3_IROUTE IROUTE(17,17,66,35)\r
-#define RTC_IROUTE IROUTE(18,17,66,91)\r
-#define RTC_ALARM_IROUTE IROUTE(19,17,66,92)\r
-#define HTIMER_IROUTE IROUTE(20,17,66,38)\r
-#define KSC_IROUTE IROUTE(21,17,66,39)\r
-#define KSC_WAKE_IROUTE IROUTE(22,17,66,66)\r
-#define RPM_STALL_IROUTE IROUTE(23,17,66,41)\r
-#define RPM_SPIN_IROUTE IROUTE(24,17,66,42)\r
-#define PFR_IROUTE IROUTE(25,17,66,43)\r
-#define LED0_IROUTE IROUTE(26,17,66,44)\r
-#define LED1_IROUTE IROUTE(27,17,66,45)\r
-#define LED2_IROUTE IROUTE(28,17,66,46)\r
-#define BCM_ERR_IROUTE IROUTE(29,17,66,47)\r
-#define BCM_BUSY_IROUTE IROUTE(30,17,66,48)\r
-\r
-//\r
-// GIRQ18\r
-//\r
-#define SPI0_TX_IROUTE IROUTE(0,18,67,36)\r
-#define SPI0_RX_IROUTE IROUTE(1,18,67,37)\r
-#define SPI1_TX_IROUTE IROUTE(2,18,67,55)\r
-#define SPI1_RX_IROUTE IROUTE(3,18,67,56)\r
-#define LED3_IROUTE IROUTE(4,18,67,85)\r
-#define PKE_ERR_IROUTE IROUTE(5,18,67,86)\r
-#define PKE_END_IROUTE IROUTE(6,18,67,87)\r
-#define NDRNG_IROUTE IROUTE(7,18,67,88)\r
-#define AES_IROUTE IROUTE(8,18,67,89)\r
-#define HASH_IROUTE IROUTE(9,18,67,90)\r
-\r
-//\r
-// GIRQ19, Aggregated only\r
-//\r
-#define LRESET_IROUTE IROUTE(0,19,68,68)\r
-#define VCC_PWRGD_IROUTE IROUTE(1,19,68,68)\r
-\r
-//\r
-// GIRQ20, Aggregated only\r
-//\r
-#define GPIO_0200_IROUTE IROUTE(0,20,69,69)\r
-#define GPIO_0201_IROUTE IROUTE(1,20,69,69)\r
-#define GPIO_0202_IROUTE IROUTE(2,20,69,69)\r
-#define GPIO_0203_IROUTE IROUTE(3,20,69,69)\r
-#define GPIO_0204_IROUTE IROUTE(4,20,69,69)\r
-#define GPIO_0206_IROUTE IROUTE(6,20,69,69)\r
-//\r
-#define GPIO_0210_IROUTE IROUTE(8,20,69,69)\r
-#define GPIO_0211_IROUTE IROUTE(9,20,69,69)\r
-#define GPIO_0212_IROUTE IROUTE(10,20,69,69)\r
-#define GPIO_0213_IROUTE IROUTE(11,20,69,69)\r
-\r
-//\r
-// GIRQ21\r
-//\r
-// No sources\r
-\r
-//\r
-// GIRQ22\r
-//\r
-// No sources\r
-\r
-//\r
-// GIRQ23\r
-//\r
-#define BTMR0_IROUTE IROUTE(0,23,72,49)\r
-#define BTMR1_IROUTE IROUTE(1,23,72,50)\r
-#define BTMR2_IROUTE IROUTE(2,23,72,51)\r
-#define BTMR3_IROUTE IROUTE(3,23,72,52)\r
-#define BTMR4_IROUTE IROUTE(4,23,72,53)\r
-#define BTMR5_IROUTE IROUTE(5,23,72,54)\r
-\r
-// GIRQ08 Bit Positions \r
-#define GIRQ08_GPIO_0140_BITPOS (0)\r
-#define GIRQ08_GPIO_0141_BITPOS (1)\r
-#define GIRQ08_GPIO_0142_BITPOS (2)\r
-#define GIRQ08_GPIO_0143_BITPOS (3)\r
-#define GIRQ08_GPIO_0144_BITPOS (4)\r
-#define GIRQ08_GPIO_0145_BITPOS (5)\r
-//#define GIRQ08_GPIO_0146_BITPOS (6) RESERVED\r
-#define GIRQ08_GPIO_0147_BITPOS (7)\r
-//\r
-#define GIRQ08_GPIO_0150_BITPOS (8)\r
-#define GIRQ08_GPIO_0151_BITPOS (9)\r
-#define GIRQ08_GPIO_0152_BITPOS (10)\r
-#define GIRQ08_GPIO_0153_BITPOS (11)\r
-#define GIRQ08_GPIO_0154_BITPOS (12)\r
-#define GIRQ08_GPIO_0155_BITPOS (13)\r
-#define GIRQ08_GPIO_0156_BITPOS (14) \r
-#define GIRQ08_GPIO_0157_BITPOS (15)\r
-//\r
-#define GIRQ08_GPIO_0160_BITPOS (16)\r
-#define GIRQ08_GPIO_0161_BITPOS (17)\r
-#define GIRQ08_GPIO_0162_BITPOS (18)\r
-#define GIRQ08_GPIO_0163_BITPOS (19)\r
-#define GIRQ08_GPIO_0164_BITPOS (20)\r
-#define GIRQ08_GPIO_0165_BITPOS (21)\r
-#define GIRQ08_GPIO_0166_BITPOS (22) \r
-#define GIRQ08_GPIO_0167_BITPOS (23)\r
-//\r
-#define GIRQ08_MASK (0x00FFFFBFul)\r
-#define GIRQ08_WAKE_CAPABLE_MASK (0x00FFFFBFul)\r
-//\r
-\r
-// GIRQ09 Bit Positions \r
-#define GIRQ09_GPIO_0100_BITPOS (0)\r
-#define GIRQ09_GPIO_0101_BITPOS (1)\r
-#define GIRQ09_GPIO_0102_BITPOS (2)\r
-#define GIRQ09_GPIO_0103_BITPOS (3)\r
-#define GIRQ09_GPIO_0104_BITPOS (4)\r
-#define GIRQ09_GPIO_0105_BITPOS (5)\r
-#define GIRQ09_GPIO_0106_BITPOS (6) \r
-#define GIRQ09_GPIO_0107_BITPOS (7)\r
-//\r
-#define GIRQ09_GPIO_0110_BITPOS (8)\r
-#define GIRQ09_GPIO_0111_BITPOS (9)\r
-#define GIRQ09_GPIO_0112_BITPOS (10)\r
-#define GIRQ09_GPIO_0113_BITPOS (11)\r
-#define GIRQ09_GPIO_0114_BITPOS (12)\r
-#define GIRQ09_GPIO_0115_BITPOS (13)\r
-#define GIRQ09_GPIO_0116_BITPOS (14) \r
-#define GIRQ09_GPIO_0117_BITPOS (15)\r
-//\r
-#define GIRQ09_GPIO_0120_BITPOS (16)\r
-#define GIRQ09_GPIO_0121_BITPOS (17)\r
-#define GIRQ09_GPIO_0122_BITPOS (18)\r
-//#define GIRQ09_GPIO_0123_BITPOS (19) RESERVED\r
-#define GIRQ09_GPIO_0124_BITPOS (20)\r
-#define GIRQ09_GPIO_0125_BITPOS (21)\r
-#define GIRQ09_GPIO_0126_BITPOS (22) \r
-#define GIRQ09_GPIO_0127_BITPOS (23)\r
-//\r
-#define GIRQ09_GPIO_0130_BITPOS (24)\r
-#define GIRQ09_GPIO_0131_BITPOS (25)\r
-#define GIRQ09_GPIO_0132_BITPOS (26)\r
-#define GIRQ09_GPIO_0133_BITPOS (27)\r
-#define GIRQ09_GPIO_0134_BITPOS (28)\r
-#define GIRQ09_GPIO_0135_BITPOS (29)\r
-#define GIRQ09_GPIO_0136_BITPOS (30) \r
-//#define GIRQ09_GPIO_0137_BITPOS (31) RESERVED\r
-//\r
-#define GIRQ09_MASK (0x7FF7FFFFul)\r
-#define GIRQ09_WAKE_CAPABLE_MASK (0x7FF7FFFFul)\r
-//\r
-\r
-// GIRQ10 Bit Positions \r
-#define GIRQ10_GPIO_0040_BITPOS (0)\r
-#define GIRQ10_GPIO_0041_BITPOS (1)\r
-#define GIRQ10_GPIO_0042_BITPOS (2)\r
-#define GIRQ10_GPIO_0043_BITPOS (3)\r
-#define GIRQ10_GPIO_0044_BITPOS (4)\r
-#define GIRQ10_GPIO_0045_BITPOS (5)\r
-#define GIRQ10_GPIO_0046_BITPOS (6) \r
-#define GIRQ10_GPIO_0047_BITPOS (7)\r
-//\r
-#define GIRQ10_GPIO_0050_BITPOS (8)\r
-#define GIRQ10_GPIO_0051_BITPOS (9)\r
-#define GIRQ10_GPIO_0052_BITPOS (10)\r
-#define GIRQ10_GPIO_0053_BITPOS (11)\r
-#define GIRQ10_GPIO_0054_BITPOS (12)\r
-#define GIRQ10_GPIO_0055_BITPOS (13)\r
-#define GIRQ10_GPIO_0056_BITPOS (14) \r
-#define GIRQ10_GPIO_0057_BITPOS (15)\r
-//\r
-#define GIRQ10_GPIO_0060_BITPOS (16)\r
-#define GIRQ10_GPIO_0061_BITPOS (17)\r
-#define GIRQ10_GPIO_0062_BITPOS (18)\r
-#define GIRQ10_GPIO_0063_BITPOS (19)\r
-#define GIRQ10_GPIO_0064_BITPOS (20)\r
-#define GIRQ10_GPIO_0065_BITPOS (21)\r
-#define GIRQ10_GPIO_0066_BITPOS (22) \r
-#define GIRQ10_GPIO_0067_BITPOS (23)\r
-//\r
-#define GIRQ10_GPIO_0070_BITPOS (24)\r
-#define GIRQ10_GPIO_0071_BITPOS (25)\r
-#define GIRQ10_GPIO_0072_BITPOS (26)\r
-#define GIRQ10_GPIO_0073_BITPOS (27)\r
-#define GIRQ10_GPIO_0074_BITPOS (28)\r
-#define GIRQ10_GPIO_0075_BITPOS (29)\r
-#define GIRQ10_GPIO_0076_BITPOS (30) \r
-//#define GIRQ10_GPIO_0077_BITPOS (31) RESERVED\r
-//\r
-#define GIRQ10_MASK (0x7FFFFFFFul)\r
-#define GIRQ10_WAKE_CAPABLE_MASK (0x7FFFFFFFul)\r
-//\r
-\r
-// GIRQ11 Bit Positions \r
-#define GIRQ11_GPIO_0000_BITPOS (0)\r
-#define GIRQ11_GPIO_0001_BITPOS (1)\r
-#define GIRQ11_GPIO_0002_BITPOS (2)\r
-#define GIRQ11_GPIO_0003_BITPOS (3)\r
-#define GIRQ11_GPIO_0004_BITPOS (4)\r
-#define GIRQ11_GPIO_0005_BITPOS (5)\r
-#define GIRQ11_GPIO_0006_BITPOS (6) \r
-#define GIRQ11_GPIO_0007_BITPOS (7)\r
-//\r
-#define GIRQ11_GPIO_0010_BITPOS (8)\r
-#define GIRQ11_GPIO_0011_BITPOS (9)\r
-#define GIRQ11_GPIO_0012_BITPOS (10)\r
-#define GIRQ11_GPIO_0013_BITPOS (11)\r
-#define GIRQ11_GPIO_0014_BITPOS (12)\r
-#define GIRQ11_GPIO_0015_BITPOS (13)\r
-#define GIRQ11_GPIO_0016_BITPOS (14) \r
-#define GIRQ11_GPIO_0017_BITPOS (15)\r
-//\r
-#define GIRQ11_GPIO_0020_BITPOS (16)\r
-#define GIRQ11_GPIO_0021_BITPOS (17)\r
-#define GIRQ11_GPIO_0022_BITPOS (18)\r
-#define GIRQ11_GPIO_0023_BITPOS (19)\r
-#define GIRQ11_GPIO_0024_BITPOS (20)\r
-#define GIRQ11_GPIO_0025_BITPOS (21)\r
-#define GIRQ11_GPIO_0026_BITPOS (22) \r
-#define GIRQ11_GPIO_0027_BITPOS (23)\r
-//\r
-#define GIRQ11_GPIO_0030_BITPOS (24)\r
-#define GIRQ11_GPIO_0031_BITPOS (25)\r
-#define GIRQ11_GPIO_0032_BITPOS (26)\r
-#define GIRQ11_GPIO_0033_BITPOS (27)\r
-#define GIRQ11_GPIO_0034_BITPOS (28)\r
-#define GIRQ11_GPIO_0035_BITPOS (29)\r
-#define GIRQ11_GPIO_0036_BITPOS (30) \r
-//#define GIRQ11_GPIO_0037_BITPOS (31) RESERVED\r
-//\r
-#define GIRQ11_MASK (0x7FFFFFFFul)\r
-#define GIRQ11_WAKE_CAPABLE_MASK (0x7FFFFFFFul)\r
-//\r
-\r
-// GIRQ12 Bit Positions \r
-#define GIRQ12_SMBUS0_BITPOS (0)\r
-#define GIRQ12_SMBUS1_BITPOS (1)\r
-#define GIRQ12_SMBUS2_BITPOS (2)\r
-#define GIRQ12_SMBUS3_BITPOS (3)\r
-#define GIRQ12_SMBUS0_WAKE_BITPOS (4)\r
-#define GIRQ12_SMBUS1_WAKE_BITPOS (5)\r
-#define GIRQ12_SMBUS2_WAKE_BITPOS (6)\r
-#define GIRQ12_SMBUS3_WAKE_BITPOS (7)\r
-#define GIRQ12_SMBUS4_WAKE_BITPOS (8)\r
-// RESERVED bits[31:9]\r
-#define GIRQ12_MASK (0x01FFul)\r
-#define GIRQ12_WAKE_CAPABLE_MASK (0x01F0ul)\r
-//\r
-\r
-// GIRQ13 Bit Positions \r
-#define GIRQ13_DMA0_BITPOS (16)\r
-#define GIRQ13_DMA1_BITPOS (17)\r
-#define GIRQ13_DMA2_BITPOS (18)\r
-#define GIRQ13_DMA3_BITPOS (19)\r
-#define GIRQ13_DMA4_BITPOS (20)\r
-#define GIRQ13_DMA5_BITPOS (21)\r
-#define GIRQ13_DMA6_BITPOS (22)\r
-#define GIRQ13_DMA7_BITPOS (23)\r
-#define GIRQ13_DMA8_BITPOS (24)\r
-#define GIRQ13_DMA9_BITPOS (25)\r
-#define GIRQ13_DMA10_BITPOS (26)\r
-#define GIRQ13_DMA11_BITPOS (27)\r
-//\r
-#define GIRQ13_MASK (0x0FFF0000ul)\r
-#define GIRQ13_WAKE_CAPABLE_MASK (0x00000000ul)\r
-//\r
-\r
-// GIRQ14 Bit Positions \r
-#define GIRQ14_LPC_BITPOS (2)\r
-//\r
-#define GIRQ14_MASK (0x04ul)\r
-#define GIRQ14_WAKE_CAPABLE_MASK (0x00ul)\r
-//\r
-\r
-// GIRQ15 Bit Positions \r
-#define GIRQ15_UART0_BITPOS (0)\r
-#define GIRQ15_IMAP_BITPOS (2)\r
-#define GIRQ15_KBD_K_BITPOS (3)\r
-#define GIRQ15_KBD_M_BITPOS (4)\r
-#define GIRQ15_ACPI0_IBF_BITPOS (6)\r
-#define GIRQ15_ACPI0_OBF_BITPOS (7)\r
-#define GIRQ15_ACPI1_IBF_BITPOS (8)\r
-#define GIRQ15_ACPI1_OBF_BITPOS (9)\r
-#define GIRQ15_ACPI_PM1CTL_BITPOS (10)\r
-#define GIRQ15_ACPI_PM1EN_BITPOS (11)\r
-#define GIRQ15_ACPI_PM1STS_BITPOS (12)\r
-#define GIRQ15_MF8042_OBF_BITPOS (13)\r
-#define GIRQ15_MF8042_IBF_BITPOS (14)\r
-#define GIRQ15_MAILBOX_BITPOS (15)\r
-#define GIRQ15_MAILBOX_DATA_BITPOS (16)\r
-//\r
-#define GIRQ15_MASK (0x01FFDDul)\r
-#define GIRQ15_WAKE_CAPABLE_MASK (0x000000ul)\r
-//\r
-\r
-// GIRQ16 Bit Positions \r
-#define GIRQ16_PECI_BITPOS (3)\r
-//\r
-#define GIRQ16_MASK (0x08ul)\r
-#define GIRQ16_WAKE_CAPABLE_MASK (0x00ul)\r
-//\r
-\r
-// GIRQ17 Bit Positions \r
-#define GIRQ17_TACH0_BITPOS (0)\r
-#define GIRQ17_TACH1_BITPOS (1)\r
-#define GIRQ17_PS2_0_WAKE_BITPOS (2)\r
-#define GIRQ17_PS2_1_WAKE_BITPOS (3)\r
-#define GIRQ17_PS2_2_WAKE_BITPOS (4)\r
-#define GIRQ17_PS2_3_WAKE_BITPOS (5)\r
-#define GIRQ17_BC_WAKE_BITPOS (6)\r
-// RESERVED b[9:7]\r
-#define GIRQ17_ADC_INT0_BITPOS (10)\r
-#define GIRQ17_ADC_INT1_BITPOS (11)\r
-#define GIRQ17_V2P_INT0_BITPOS (12)\r
-#define GIRQ17_V2P_INT1_BITPOS (13)\r
-#define GIRQ17_PS2_0_BITPOS (14)\r
-#define GIRQ17_PS2_1_BITPOS (15)\r
-#define GIRQ17_PS2_2_BITPOS (16)\r
-#define GIRQ17_PS2_3_BITPOS (17)\r
-// RESERVED b[19:18]\r
-#define GIRQ17_HIBTMR_BITPOS (20)\r
-#define GIRQ17_KEY_INT_BITPOS (21)\r
-#define GIRQ17_KEY_INT_WAKE_BITPOS (22)\r
-#define GIRQ17_RPM_STALL_BITPOS (23)\r
-#define GIRQ17_RPM_SPIN_BITPOS (24)\r
-#define GIRQ17_VBAT_BITPOS (25)\r
-#define GIRQ17_LED0_BITPOS (26)\r
-#define GIRQ17_LED1_BITPOS (27)\r
-#define GIRQ17_LED2_BITPOS (28)\r
-#define GIRQ17_MBC_ERR_BITPOS (29)\r
-#define GIRQ17_MBC_BUSY_BITPOS (30)\r
-//\r
-#define GIRQ17_MASK (0x7FF3FC7Ful)\r
-#define GIRQ17_WAKE_CAPABLE_MASK (0x0230007Cul)\r
-//\r
-\r
-// GIRQ18 Bit Positions \r
-#define GIRQ18_SPI0_TX_BITPOS (0)\r
-#define GIRQ18_SPI0_RX_BITPOS (1)\r
-#define GIRQ18_SPI1_TX_BITPOS (2)\r
-#define GIRQ18_SPI1_RX_BITPOS (3)\r
-#define GIRQ18_LED3_BITPOS (4) // NVIC 85\r
-#define GIRQ18_PKE_ERR_BITPOS (5) // NVIC 86\r
-#define GIRQ18_PKE_END_BITPOS (6) // NVIC 87\r
-#define GIRQ18_TRNG_BITPOS (7) // NVIC 88\r
-#define GIRQ18_AES_BITPOS (8) // NVIC 89\r
-#define GIRQ18_HASH_BITPOS (9) // NVIC 90\r
-//\r
-#define GIRQ18_MASK (0x0FFul)\r
-#define GIRQ18_WAKE_CAPABLE_MASK (0x000ul)\r
-//\r
-\r
-// GIRQ19 Bit Positions \r
-#define GIRQ19_LRESET_BITPOS (0)\r
-#define GIRQ19_VCC_PWRGD_BITPOS (1)\r
-//\r
-#define GIRQ19_MASK (0x03ul)\r
-#define GIRQ19_WAKE_CAPABLE_MASK (0x03ul)\r
-//\r
-\r
-// GIRQ20 Bit Positions \r
-#define GIRQ20_GPIO_0200_BITPOS (0)\r
-#define GIRQ20_GPIO_0201_BITPOS (1)\r
-#define GIRQ20_GPIO_0202_BITPOS (2)\r
-#define GIRQ20_GPIO_0203_BITPOS (3)\r
-#define GIRQ20_GPIO_0204_BITPOS (4)\r
-//#define GIRQ20_GPIO_0205_BITPOS (5)\r
-#define GIRQ20_GPIO_0206_BITPOS (6)\r
-//#define GIRQ20_GPIO_0207_BITPOS (7)\r
-//\r
-#define GIRQ20_GPIO_0210_BITPOS (8)\r
-#define GIRQ20_GPIO_0211_BITPOS (9)\r
-#define GIRQ20_GPIO_0212_BITPOS (10)\r
-#define GIRQ20_GPIO_0213_BITPOS (11)\r
-// \r
-#define GIRQ20_MASK (0x0F5Ful)\r
-#define GIRQ20_WAKE_CAPABLE_MASK (0x0F5Ful)\r
-//\r
-\r
-// GIRQ21 Bit Positions \r
-#define GIRQ21_MASK (0x00ul)\r
-#define GIRQ21_WAKE_CAPABLE_MASK (0x00ul)\r
-\r
-// GIRQ22 Bit Positions \r
-#define GIRQ22_MASK (0x00ul)\r
-#define GIRQ22_WAKE_CAPABLE_MASK (0x00ul)\r
-\r
-// GIRQ23 Bit Positions \r
-#define GIRQ23_TMR0_BITPOS (0)\r
-#define GIRQ23_TMR1_BITPOS (1)\r
-#define GIRQ23_TMR2_BITPOS (2)\r
-#define GIRQ23_TMR3_BITPOS (3)\r
-#define GIRQ23_TMR4_BITPOS (4)\r
-#define GIRQ23_TMR5_BITPOS (5)\r
-//\r
-#define GIRQ23_MASK (0x03Ful)\r
-#define GIRQ23_WAKE_CAPABLE_MASK (0x000ul)\r
-//\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* NVIC,ECIA Routing Policy for Direct Mode */\r
-/* ------------------------------------------------------------------------------- */\r
-/* In Direct Mode, some interrupts could be configured to be used as aggregated.\r
- * Configuration:\r
- * 1. Always set ECS Interrupt Direct enable bit. \r
- * 2. If GIRQn aggregated set Block Enable bit.\r
- * 3. If GIRQn direct then clear Block Enable bit and enable individual NVIC inputs.\r
- * Switching issues:\r
- * Aggregate enable/disable requires set/clear single GIRQn bit in GIRQ Block En/Clr registers.\r
- * Also requires set/clear of individual NVIC Enables.\r
- * \r
- * Note: interrupt_is_girq_direct() internal function uses this policy to detect \r
- * if any interrupt is configured as direct or aggregated\r
-*/\r
-\r
-/** Initialize EC Interrupt Aggregator\r
- * @param mode 1 - Direct Map mode, 0 - Fully Aggregated Mode \r
- * @param girq_bitmask - BitMask of GIRQ to be configured as aggregated \r
- * This parameter is only applicable in direct mode.\r
- * @note All GPIO's and wake capable sources are always \r
- * aggregated! GPIO's interrupts will still work in direct mode.\r
- * Block wakes are not be routed to the processor in direct \r
- * mode. \r
- * Note2: This function disables and enables global interrupt \r
- */\r
-void interrupt_init(uint8_t mode, uint32_t girq_bitmask);\r
-\r
-/** Set interrupt routing mode to aggregated or direct. \r
- * @param mode 1 = Direct (except GPIO & wake), 0 = All Aggregated \r
- * @note In direct mode, one could enable certain GIRQs as aggregated using \r
- * p_interrupt_ecia_block_enable_set function\r
- */\r
-void interrupt_mode_set(uint8_t mode);\r
-\r
-/** Clears all individual interrupts Enables and Source in ECIA,\r
- * and Clears all NVIC external enables and pending bits \r
- */\r
-void interrupt_reset(void);\r
-\r
-/** Enables interrupt for a device \r
- * @param dev_iroute - source IROUTING information \r
- * @note This function disables and enables global interrupt \r
- */\r
-void interrupt_device_enable(uint32_t dev_iroute);\r
-\r
-/** Disables interrupt for a device\r
- * @param dev_iroute - source IROUTING information \r
- * @note This function disables and enables global interrupt \r
- */\r
-void interrupt_device_disable(uint32_t dev_iroute);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* ECIA APIs using device IROUTE() as input */ \r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Clear Source in the ECIA for the device \r
- * @param devi - device IROUTING value \r
- */\r
-void interrupt_device_ecia_source_clear(const uint32_t dev_iroute);\r
-\r
-/** Get the Source bit in the ECIA for the device \r
- * @param devi - device IROUTING value \r
- * @return 0 if source bit not set; else non-zero value\r
- */\r
-uint32_t interrupt_device_ecia_source_get(const uint32_t dev_iroute);\r
-\r
-/** Get the Result bit in the ECIA for the device \r
- * @param devi - device IROUTING value \r
- * @return 0 if result bit not set; else non-zero value\r
- */\r
-uint32_t interrupt_device_ecia_result_get(const uint32_t dev_iroute);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* NVIC APIs using device IROUTE() as input */ \r
-/* ------------------------------------------------------------------------------- */\r
-/* Note that if the device interrupt is aggregated, then these APIs would affect the \r
- * NVIC corresponding to the aggregated GIRQ \r
- */\r
-\r
-/** Enable/Disable the NVIC (in the NVIC controller) for the device\r
- * @param dev_iroute : source IROUTING information (encoded in a uint32_t)\r
- * @param en_flag : 1 = Enable the NVIC IRQ, 0 = Disable the NVIC IRQ \r
- * @note Recommended to use interrupt_device_enable, interrupt_device_disable\r
- * to enable/disable interrupts for the device, since those APIs configure ECIA as well\r
- */\r
-void interrupt_device_nvic_enable(uint32_t dev_iroute, uint8_t en_flag);\r
-\r
-/** Set NVIC priority for specified peripheral interrupt source\r
- * @param dev_iroute - source IROUTING information (encoded in a uint32_t)\r
- * @param nvic_pri - NVIC Priority\r
- * @note 1. If ECIA is in aggregated mode, the priority affects all interrupt \r
- * sources in the GIRQ. \r
- * 2. This function disables and enables global interrupt \r
- */\r
-void interrupt_device_nvic_priority_set(const uint32_t dev_iroute, const uint8_t nvic_pri);\r
-\r
-/** Return NVIC priority for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- * @return uint32_t NVIC priority \r
- */\r
-uint32_t interrupt_device_nvic_priority_get(const uint32_t dev_iroute);\r
-\r
-/** Return NVIC pending for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- * @return uint8_t 0(not pending), 1 (pending in NVIC) \r
- * \r
- */\r
-uint8_t interrupt_device_nvic_pending_get(const uint32_t dev_iroute);\r
-\r
-/** Set NVIC pending for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- */\r
-void interrupt_device_nvic_pending_set(const uint32_t dev_iroute);\r
-\r
-/** Clears NVIC pending for interrupt source\r
- * @param dev_iroute - source IROUTING information \r
- * @return uint8_t 0(not pending), 1 (pending in NVIC) - before clear \r
- * @note This function disables and enables global interrupt \r
- */\r
-uint8_t interrupt_device_nvic_pending_clear(const uint32_t dev_iroute);\r
- \r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Functions - Operations on GIRQ Block Enable Set, Enable Clear *\r
- * and Status Register */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Enable specified GIRQ in ECIA block\r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- */\r
- void p_interrupt_ecia_block_enable_set(uint8_t girq_id);\r
- \r
- /** Enable GIRQs in ECIA Block \r
- * @param girq_bitmask - Bitmask of GIRQs to be enabled in ECIA Block \r
- */\r
-void p_interrupt_ecia_block_enable_bitmask_set(uint32_t girq_bitmask);\r
-\r
-/** Check if specified GIRQ block enabled or not\r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- * @return retVal - 1 if the particular GIRQ block enabled, else 0\r
- */\r
-uint8_t p_interrupt_ecia_block_enable_get(uint8_t girq_id);\r
-\r
-/** Set all GIRQ block enables */\r
-void p_interrupt_ecia_block_enable_all_set(void);\r
-\r
-/** Clear specified GIRQ in ECIA Block \r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- */\r
-void p_interrupt_ecia_block_enable_clr(uint8_t girq_id);\r
-\r
-/** Clear GIRQs in ECIA Block \r
- * @param girq_bitmask - Bitmask of GIRQs to be cleared in ECIA Block \r
- */\r
-void p_interrupt_ecia_block_enable_bitmask_clr(uint32_t girq_bitmask);\r
-\r
-/** p_interrupt_ecia_block_enable_all_clr - Clears all GIRQ block enables */\r
-void p_interrupt_ecia_block_enable_all_clr(void);\r
- \r
- /** Get status of GIRQ in ECIA Block\r
- * @param girq_id - enum MEC_GIRQ_IDS \r
- * @return 0 if status bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_block_irq_status_get(uint8_t girq_id);\r
-\r
-/** Reads the Block IRQ Vector Register\r
- * @return 32-bit value\r
- */\r
-uint32_t p_interrupt_ecia_block_irq_all_status_get(void);\r
-\r
-/* ---------------------------------------------------------------------------- */\r
-/* Peripheral Functions - Operations on GIRQx Source, Enable, Result *\r
- * and Enable Registers */\r
-/* ---------------------------------------------------------------------------- */\r
-\r
-/** Clear specified interrupt source bit in GIRQx\r
- * @param girq_id - enum MEC_GIRQ_IDS\r
- * @param bitnum -[0, 31]\r
- */\r
-void p_interrupt_ecia_girq_source_clr(int16_t girq_id, uint8_t bitnum);\r
-\r
-/** Read the specified interrupt source bit in GIRQx\r
- * @param girq_id - enum MEC_GIRQ_IDS\r
- * @param bitnum -[0, 31]\r
- * @return 0 if source bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_girq_source_get(int16_t girq_id, uint8_t bitnum);\r
-\r
-/** Enable the specified interrupt in GIRQx\r
- * girq_id - enum MEC_GIRQ_IDS\r
- * bitnum = [0, 31]\r
- */\r
-void p_interrupt_ecia_girq_enable_set(uint16_t girq_id, uint8_t bitnum);\r
-\r
-/** Disable the specified interrupt in GIRQx\r
- * girq_id - enum MEC_GIRQ_IDS\r
- * bitnum = [0, 31]\r
- */\r
-void p_interrupt_ecia_girq_enable_clr(uint16_t girq_id, uint8_t bitnum);\r
-\r
-/** Read the status of the specified interrupt in GIRQx\r
- * girq_id - enum MEC_GIRQ_IDS\r
- * bitnum = [0, 31]\r
- * @return 0 if enable bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_girq_enable_get(uint16_t girq_id, uint8_t bitnum);\r
-\r
-/** Read the result bit of the interrupt in GIRQx\r
- * @param girq_id - enum MEC_GIRQ_IDS\r
- * @param bitnum -[0, 31]\r
- * @return 0 if enable bit not set; else non-zero value\r
- */\r
-uint32_t p_interrupt_ecia_girq_result_get(int16_t girq_id, uint8_t bitnum);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Function - Operations on all GIRQs */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Clear all aggregator GIRQn status registers */\r
-void p_interrupt_ecia_girqs_source_reset(void);\r
-\r
-/** Clear all aggregator GIRQn enables */\r
- void p_interrupt_ecia_girqs_enable_reset(void);\r
- \r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Function - Function to set interrupt control */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Set interrupt control \r
- * @param nvic_en_flag : 0 = Alternate NVIC disabled, 1 = Alternate NVIC enabled\r
- */\r
- void p_interrupt_control_set(uint8_t nvic_en_flag);\r
- \r
- /** Read interrupt control \r
- * @return uint8_t - 0 = Alternate NVIC disabled, 1 = Alternate NVIC enabled\r
- */\r
-uint8_t p_interrupt_control_get(void);\r
-\r
-/* ------------------------------------------------------------------------------- */\r
-/* Peripheral Functions - NVIC */\r
-/* ------------------------------------------------------------------------------- */\r
-\r
-/** Enable/Disable the NVIC IRQ in the NVIC interrupt controller\r
- * @param nvic_num : NVIC number (see enum IRQn_Type)\r
- * @param en_flag : 1 = Enable the NVIC IRQ, 0 = Disable the NVIC IRQ\r
- * @note Application should perform this operation\r
- */\r
- void p_interrupt_nvic_enable(IRQn_Type nvic_num, uint8_t en_flag);\r
- \r
- /** ecia_nvic_clr_en - Clear all NVIC external enables */ \r
-void p_interrupt_nvic_extEnables_clr(void);\r
-\r
-/** Clear all NVIC external enables and pending bits */\r
-void p_interrupt_nvic_enpend_clr(void);\r
-\r
-/** Set NVIC external priorities to POR value */\r
-void p_interrupt_nvic_priorities_default_set(void);\r
-\r
-/** Set NVIC external priorities to specified priority (0 - 7)\r
- * @param zero-based 3-bit priority value: 0=highest, 7=lowest.\r
- * @note NVIC highest priority is the value 0, lowest is all 1's.\r
- * Each external interrupt has an 8-bit register and the priority \r
- * is left justified in the registers. MECxxx implements 8 priority \r
- * levels or bits [7:5] in the register. Lowest priority = 0xE0\r
- */\r
-void p_interrupt_nvic_priorities_set(uint8_t new_pri);\r
-\r
-#endif /*_INTERRUPT_H_*/\r
-\r
-/** @}\r
- */\r
-\r
-\r
-\r
static void prvTestAbortingEventGroupWait( void )\r
{\r
TickType_t xTimeAtStart;\r
-static StaticEventGroup_t xEventGroupBuffer;\r
EventGroupHandle_t xEventGroup;\r
EventBits_t xBitsToWaitFor = ( EventBits_t ) 0x01, xReturn;\r
\r
- /* Create the event group. Statically allocated memory is used so the\r
- creation cannot fail. */\r
- xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ {\r
+ static StaticEventGroup_t xEventGroupBuffer;\r
+\r
+ /* Create the event group. Statically allocated memory is used so the\r
+ creation cannot fail. */\r
+ xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );\r
+ }\r
+ #else\r
+ {\r
+ xEventGroup = xEventGroupCreate();\r
+ configASSERT( xEventGroup );\r
+ }\r
+ #endif\r
\r
/* Note the time before the delay so the length of the delay is known. */\r
xTimeAtStart = xTaskGetTickCount();\r
{\r
TickType_t xTimeAtStart;\r
BaseType_t xReturn;\r
-static StaticQueue_t xQueueBuffer;\r
-static uint8_t ucQueueStorage[ sizeof( uint8_t ) ], ucItemToQueue;\r
const UBaseType_t xQueueLength = ( UBaseType_t ) 1;\r
QueueHandle_t xQueue;\r
+uint8_t ucItemToQueue;\r
\r
- /* Create the queue. Statically allocated memory is used so the\r
- creation cannot fail. */\r
- xQueue = xQueueCreateStatic( xQueueLength, sizeof( uint8_t ), ucQueueStorage, &xQueueBuffer );\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ {\r
+ static StaticQueue_t xQueueBuffer;\r
+ static uint8_t ucQueueStorage[ sizeof( uint8_t ) ];\r
+\r
+ /* Create the queue. Statically allocated memory is used so the\r
+ creation cannot fail. */\r
+ xQueue = xQueueCreateStatic( xQueueLength, sizeof( uint8_t ), ucQueueStorage, &xQueueBuffer );\r
+ }\r
+ #else\r
+ {\r
+ xQueue = xQueueCreate( xQueueLength, sizeof( uint8_t ) );\r
+ configASSERT( xQueue );\r
+ }\r
+ #endif\r
\r
/* This function tests aborting when in the blocked state waiting to send,\r
so the queue must be full. There is only one space in the queue. */\r
{\r
TickType_t xTimeAtStart;\r
BaseType_t xReturn;\r
-static StaticSemaphore_t xSemaphoreBuffer;\r
SemaphoreHandle_t xSemaphore;\r
\r
- /* Create the semaphore. Statically allocated memory is used so the\r
- creation cannot fail. */\r
- xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer );\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ {\r
+ static StaticSemaphore_t xSemaphoreBuffer;\r
+\r
+ /* Create the semaphore. Statically allocated memory is used so the\r
+ creation cannot fail. */\r
+ xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer );\r
+ }\r
+ #else\r
+ {\r
+ xSemaphore = xSemaphoreCreateBinary();\r
+ }\r
+ #endif\r
\r
/* Note the time before the delay so the length of the delay is known. */\r
xTimeAtStart = xTaskGetTickCount();\r
#define blckqSTACK_SIZE configMINIMAL_STACK_SIZE\r
#define blckqNUM_TASK_SETS ( 3 )\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error This example cannot be used if dynamic allocation is not allowed.\r
+#endif\r
+\r
/* Structure used to pass parameters to the blocking queue tasks. */\r
typedef struct BLOCKING_QUEUE_PARAMETERS\r
{\r
prvSendFrontAndBackTest demo. */\r
xQueue = xQueueCreate( genqQUEUE_LENGTH, sizeof( uint32_t ) );\r
\r
- /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
- in use. The queue registry is provided as a means for kernel aware\r
- debuggers to locate queues and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( xQueue, "Gen_Queue_Test" );\r
-\r
- /* Create the demo task and pass it the queue just created. We are\r
- passing the queue handle by value so it does not matter that it is\r
- declared on the stack here. */\r
- xTaskCreate( prvSendFrontAndBackTest, "GenQ", configMINIMAL_STACK_SIZE, ( void * ) xQueue, uxPriority, NULL );\r
+ if( xQueue != NULL )\r
+ {\r
+ /* vQueueAddToRegistry() adds the queue to the queue registry, if one\r
+ is in use. The queue registry is provided as a means for kernel aware\r
+ debuggers to locate queues and has no purpose if a kernel aware debugger\r
+ is not being used. The call to vQueueAddToRegistry() will be removed\r
+ by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
+ defined to be less than 1. */\r
+ vQueueAddToRegistry( xQueue, "Gen_Queue_Test" );\r
+\r
+ /* Create the demo task and pass it the queue just created. We are\r
+ passing the queue handle by value so it does not matter that it is\r
+ declared on the stack here. */\r
+ xTaskCreate( prvSendFrontAndBackTest, "GenQ", configMINIMAL_STACK_SIZE, ( void * ) xQueue, uxPriority, NULL );\r
+ }\r
\r
/* Create the mutex used by the prvMutexTest task. */\r
xMutex = xSemaphoreCreateMutex();\r
\r
- /* vQueueAddToRegistry() adds the mutex to the registry, if one is\r
- in use. The registry is provided as a means for kernel aware\r
- debuggers to locate mutexes and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Gen_Queue_Mutex" );\r
-\r
- /* Create the mutex demo tasks and pass it the mutex just created. We are\r
- passing the mutex handle by value so it does not matter that it is declared\r
- on the stack here. */\r
- xTaskCreate( prvLowPriorityMutexTask, "MuLow", configMINIMAL_STACK_SIZE, ( void * ) xMutex, genqMUTEX_LOW_PRIORITY, NULL );\r
- xTaskCreate( prvMediumPriorityMutexTask, "MuMed", configMINIMAL_STACK_SIZE, NULL, genqMUTEX_MEDIUM_PRIORITY, &xMediumPriorityMutexTask );\r
- xTaskCreate( prvHighPriorityMutexTask, "MuHigh", configMINIMAL_STACK_SIZE, ( void * ) xMutex, genqMUTEX_HIGH_PRIORITY, &xHighPriorityMutexTask );\r
+ if( xMutex != NULL )\r
+ {\r
+ /* vQueueAddToRegistry() adds the mutex to the registry, if one is\r
+ in use. The registry is provided as a means for kernel aware\r
+ debuggers to locate mutexes and has no purpose if a kernel aware\r
+ debugger is not being used. The call to vQueueAddToRegistry() will be\r
+ removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not\r
+ defined or is defined to be less than 1. */\r
+ vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Gen_Queue_Mutex" );\r
+\r
+ /* Create the mutex demo tasks and pass it the mutex just created. We\r
+ are passing the mutex handle by value so it does not matter that it is\r
+ declared on the stack here. */\r
+ xTaskCreate( prvLowPriorityMutexTask, "MuLow", configMINIMAL_STACK_SIZE, ( void * ) xMutex, genqMUTEX_LOW_PRIORITY, NULL );\r
+ xTaskCreate( prvMediumPriorityMutexTask, "MuMed", configMINIMAL_STACK_SIZE, NULL, genqMUTEX_MEDIUM_PRIORITY, &xMediumPriorityMutexTask );\r
+ xTaskCreate( prvHighPriorityMutexTask, "MuHigh", configMINIMAL_STACK_SIZE, ( void * ) xMutex, genqMUTEX_HIGH_PRIORITY, &xHighPriorityMutexTask );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Create the queue used by the producer and consumer. */\r
xPolledQueue = xQueueCreate( pollqQUEUE_SIZE, ( UBaseType_t ) sizeof( uint16_t ) );\r
\r
- /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
- in use. The queue registry is provided as a means for kernel aware\r
- debuggers to locate queues and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( xPolledQueue, "Poll_Test_Queue" );\r
-\r
- /* Spawn the producer and consumer. */\r
- xTaskCreate( vPolledQueueConsumer, "QConsNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL );\r
- xTaskCreate( vPolledQueueProducer, "QProdNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL );\r
+ if( xPolledQueue != NULL )\r
+ {\r
+ /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
+ in use. The queue registry is provided as a means for kernel aware\r
+ debuggers to locate queues and has no purpose if a kernel aware debugger\r
+ is not being used. The call to vQueueAddToRegistry() will be removed\r
+ by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
+ defined to be less than 1. */\r
+ vQueueAddToRegistry( xPolledQueue, "Poll_Test_Queue" );\r
+\r
+ /* Spawn the producer and consumer. */\r
+ xTaskCreate( vPolledQueueConsumer, "QConsNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL );\r
+ xTaskCreate( vPolledQueueProducer, "QProdNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Create the queue that we are going to use for the test/demo. */\r
xQueue = xQueueCreate( qpeekQUEUE_LENGTH, sizeof( uint32_t ) );\r
\r
- /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
- in use. The queue registry is provided as a means for kernel aware\r
- debuggers to locate queues and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( xQueue, "QPeek_Test_Queue" );\r
-\r
- /* Create the demo tasks and pass it the queue just created. We are\r
- passing the queue handle by value so it does not matter that it is declared\r
- on the stack here. */\r
- xTaskCreate( prvLowPriorityPeekTask, "PeekL", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekLOW_PRIORITY, NULL );\r
- xTaskCreate( prvMediumPriorityPeekTask, "PeekM", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekMEDIUM_PRIORITY, &xMediumPriorityTask );\r
- xTaskCreate( prvHighPriorityPeekTask, "PeekH1", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGH_PRIORITY, &xHighPriorityTask );\r
- xTaskCreate( prvHighestPriorityPeekTask, "PeekH2", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGHEST_PRIORITY, &xHighestPriorityTask );\r
+ if( xQueue != NULL )\r
+ {\r
+ /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
+ in use. The queue registry is provided as a means for kernel aware\r
+ debuggers to locate queues and has no purpose if a kernel aware debugger\r
+ is not being used. The call to vQueueAddToRegistry() will be removed\r
+ by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
+ defined to be less than 1. */\r
+ vQueueAddToRegistry( xQueue, "QPeek_Test_Queue" );\r
+\r
+ /* Create the demo tasks and pass it the queue just created. We are\r
+ passing the queue handle by value so it does not matter that it is declared\r
+ on the stack here. */\r
+ xTaskCreate( prvLowPriorityPeekTask, "PeekL", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekLOW_PRIORITY, NULL );\r
+ xTaskCreate( prvMediumPriorityPeekTask, "PeekM", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekMEDIUM_PRIORITY, &xMediumPriorityTask );\r
+ xTaskCreate( prvHighPriorityPeekTask, "PeekH1", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGH_PRIORITY, &xHighPriorityTask );\r
+ xTaskCreate( prvHighestPriorityPeekTask, "PeekH2", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGHEST_PRIORITY, &xHighestPriorityTask );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
{\r
/* Create the tasks. */\r
xTaskCreate( prvQueueSetSendingTask, "SetTx", configMINIMAL_STACK_SIZE, NULL, queuesetMEDIUM_PRIORITY, &xQueueSetSendingTask );\r
- xTaskCreate( prvQueueSetReceivingTask, "SetRx", configMINIMAL_STACK_SIZE, ( void * ) xQueueSetSendingTask, queuesetMEDIUM_PRIORITY, &xQueueSetReceivingTask );\r
-\r
- /* It is important that the sending task does not attempt to write to a\r
- queue before the queue has been created. It is therefore placed into the\r
- suspended state before the scheduler has started. It is resumed by the\r
- receiving task after the receiving task has created the queues and added the\r
- queues to the queue set. */\r
- vTaskSuspend( xQueueSetSendingTask );\r
+\r
+ if( xQueueSetSendingTask != NULL )\r
+ {\r
+ xTaskCreate( prvQueueSetReceivingTask, "SetRx", configMINIMAL_STACK_SIZE, ( void * ) xQueueSetSendingTask, queuesetMEDIUM_PRIORITY, &xQueueSetReceivingTask );\r
+\r
+ /* It is important that the sending task does not attempt to write to a\r
+ queue before the queue has been created. It is therefore placed into\r
+ the suspended state before the scheduler has started. It is resumed by\r
+ the receiving task after the receiving task has created the queues and\r
+ added the queues to the queue set. */\r
+ vTaskSuspend( xQueueSetSendingTask );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
the set. */\r
xQueue = xQueueCreate( setpollQUEUE_LENGTH, sizeof( uint32_t ) );\r
xQueueSet = xQueueCreateSet( setpollQUEUE_LENGTH );\r
- xQueueAddToSet( xQueue, xQueueSet );\r
\r
- /* Create the task. */\r
- xTaskCreate( prvQueueSetReceivingTask, "SetPoll", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ if( ( xQueue != NULL ) && ( xQueueSet != NULL ) )\r
+ {\r
+ xQueueAddToSet( xQueue, xQueueSet );\r
+\r
+ /* Create the task. */\r
+ xTaskCreate( prvQueueSetReceivingTask, "SetPoll", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
allocation. */\r
prvCreateAndDeleteStaticallyAllocatedTasks();\r
prvCreateAndDeleteStaticallyAllocatedQueues();\r
+\r
+ /* Ensure lower priority tasks get CPU time. */\r
+ vTaskDelay( prvGetNextDelayTime() );\r
+\r
+ /* Just to show the check task that this task is still executing. */\r
+ uxCycleCounter++;\r
+\r
prvCreateAndDeleteStaticallyAllocatedBinarySemaphores();\r
prvCreateAndDeleteStaticallyAllocatedCountingSemaphores();\r
+\r
+ vTaskDelay( prvGetNextDelayTime() );\r
+ uxCycleCounter++;\r
+\r
prvCreateAndDeleteStaticallyAllocatedMutexes();\r
prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes();\r
+\r
+ vTaskDelay( prvGetNextDelayTime() );\r
+ uxCycleCounter++;\r
+\r
prvCreateAndDeleteStaticallyAllocatedEventGroups();\r
prvCreateAndDeleteStaticallyAllocatedTimers();\r
}\r
\r
/* Delete the semaphore again so the buffers can be reused. */\r
vSemaphoreDelete( xSemaphore );\r
-\r
-\r
- /* The semaphore created above had a statically allocated semaphore\r
- structure. Repeat the above using NULL as the third\r
- xSemaphoreCreateCountingStatic() parameter so the semaphore structure is\r
- instead allocated dynamically. */\r
- xSemaphore = xSemaphoreCreateCountingStatic( uxMaxCount, 0, NULL );\r
-\r
- /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */\r
- prvSanityCheckCreatedSemaphore( xSemaphore, uxMaxCount );\r
-\r
- /* Delete the semaphore again so the buffers can be reused. */\r
- vSemaphoreDelete( xSemaphore );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Delete the semaphore again so the buffers can be reused. */\r
vSemaphoreDelete( xSemaphore );\r
-\r
-\r
- /* The semaphore created above had a statically allocated semaphore\r
- structure. Repeat the above using NULL as the\r
- xSemaphoreCreateRecursiveMutexStatic() parameter so the semaphore structure\r
- is instead allocated dynamically. */\r
- xSemaphore = xSemaphoreCreateRecursiveMutexStatic( NULL );\r
-\r
- /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */\r
- prvSanityCheckCreatedRecursiveMutex( xSemaphore );\r
-\r
- /* Delete the semaphore again so the buffers can be reused. */\r
- vSemaphoreDelete( xSemaphore );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
static uint8_t ucQueueStorageArea[ staticQUEUE_LENGTH_IN_ITEMS * sizeof( uint64_t ) ];\r
\r
/* Create the queue. xQueueCreateStatic() has two more parameters than the\r
- usual xQueueCreate() function. The first new paraemter is a pointer to the\r
+ usual xQueueCreate() function. The first new parameter is a pointer to the\r
pre-allocated queue storage area. The second new parameter is a pointer to\r
the StaticQueue_t structure that will hold the queue state information in\r
- an anonymous way. If either pointer is passed as NULL then the respective\r
- data will be allocated dynamically as if xQueueCreate() had been called. */\r
+ an anonymous way. If the two pointers are passed as NULL then the data\r
+ will be allocated dynamically as if xQueueCreate() had been called. */\r
xQueue = xQueueCreateStatic( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */\r
sizeof( uint64_t ), /* The size of each item. */\r
ucQueueStorageArea, /* The buffer used to hold items within the queue. */\r
\r
/* Delete the queue again so the buffers can be reused. */\r
vQueueDelete( xQueue );\r
-\r
-\r
- /* The queue created above had a statically allocated queue storage area and\r
- queue structure. Repeat the above with three more times - with different\r
- combinations of static and dynamic allocation. */\r
-\r
- xQueue = xQueueCreateStatic( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */\r
- sizeof( uint64_t ), /* The size of each item. */\r
- NULL, /* Allocate the buffer used to hold items within the queue dynamically. */\r
- &xStaticQueue ); /* The static queue structure that will hold the state of the queue. */\r
-\r
- configASSERT( xQueue == ( QueueHandle_t ) &xStaticQueue );\r
- prvSanityCheckCreatedQueue( xQueue );\r
- vQueueDelete( xQueue );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
-\r
- xQueue = xQueueCreateStatic( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */\r
- sizeof( uint64_t ), /* The size of each item. */\r
- ucQueueStorageArea, /* The buffer used to hold items within the queue. */\r
- NULL ); /* The queue structure is allocated dynamically. */\r
-\r
- prvSanityCheckCreatedQueue( xQueue );\r
- vQueueDelete( xQueue );\r
-\r
- xQueue = xQueueCreateStatic( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */\r
- sizeof( uint64_t ), /* The size of each item. */\r
- NULL, /* Allocate the buffer used to hold items within the queue dynamically. */\r
- NULL ); /* The queue structure is allocated dynamically. */\r
-\r
- prvSanityCheckCreatedQueue( xQueue );\r
- vQueueDelete( xQueue );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Delete the semaphore again so the buffers can be reused. */\r
vSemaphoreDelete( xSemaphore );\r
-\r
-\r
- /* The semaphore created above had a statically allocated semaphore\r
- structure. Repeat the above using NULL as the xSemaphoreCreateMutexStatic()\r
- parameter so the semaphore structure is instead allocated dynamically. */\r
- xSemaphore = xSemaphoreCreateMutexStatic( NULL );\r
-\r
- /* Take the mutex so the mutex is in the state expected by the\r
- prvSanityCheckCreatedSemaphore() function. */\r
- xReturned = xSemaphoreTake( xSemaphore, staticDONT_BLOCK );\r
-\r
- if( xReturned != pdPASS )\r
- {\r
- xErrorOccurred = pdTRUE;\r
- }\r
-\r
- /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */\r
- prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT );\r
-\r
- /* Delete the semaphore again so the buffers can be reused. */\r
- vSemaphoreDelete( xSemaphore );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
vSemaphoreDelete( xSemaphore );\r
\r
\r
- /* The semaphore created above had a statically allocated semaphore\r
- structure. Repeat the above using NULL as the xSemaphoreCreateBinaryStatic()\r
- parameter so the semaphore structure is instead allocated dynamically. */\r
- xSemaphore = xSemaphoreCreateBinaryStatic( NULL );\r
-\r
- /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */\r
- prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT );\r
-\r
- /* Delete the semaphore again so the buffers can be reused. */\r
- vSemaphoreDelete( xSemaphore );\r
-\r
-\r
-\r
/* There isn't a static version of the old and deprecated\r
vSemaphoreCreateBinary() macro (because its deprecated!), but check it is\r
still functioning correctly when configSUPPORT_STATIC_ALLOCATION is set to\r
1. */\r
- vSemaphoreCreateBinary( xSemaphore );\r
-\r
- /* The macro starts with the binary semaphore available, but the test\r
- function expects it to be unavailable. */\r
- if( xSemaphoreTake( xSemaphore, staticDONT_BLOCK ) == pdFAIL )\r
+ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
{\r
- xErrorOccurred = pdTRUE;\r
- }\r
-\r
- prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT );\r
- vSemaphoreDelete( xSemaphore );\r
+ vSemaphoreCreateBinary( xSemaphore );\r
\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
+ /* The macro starts with the binary semaphore available, but the test\r
+ function expects it to be unavailable. */\r
+ if( xSemaphoreTake( xSemaphore, staticDONT_BLOCK ) == pdFAIL )\r
+ {\r
+ xErrorOccurred = pdTRUE;\r
+ }\r
\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
+ prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT );\r
+ vSemaphoreDelete( xSemaphore );\r
+ }\r
+ #endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Just to show the check task that this task is still executing. */\r
uxCycleCounter++;\r
-\r
- /* The software timer created above had a statically allocated timer\r
- structure. Repeat the above using NULL as the xTimerCreateStatic()\r
- parameter so the timer structure is instead allocated dynamically. */\r
- xTimer = xTimerCreateStatic( "T1", /* Text name for the task. Helps debugging only. Not used by FreeRTOS. */\r
- xTimerPeriod, /* The period of the timer in ticks. */\r
- pdTRUE, /* This is an auto-reload timer. */\r
- ( void * ) &uxVariableToIncrement, /* The variable incremented by the test is passed into the timer callback using the timer ID. */\r
- prvTimerCallback, /* The function to execute when the timer expires. */\r
- NULL ); /* A buffer is not passed this time, so the timer should be allocated dynamically. */\r
- uxVariableToIncrement = 0;\r
- xReturned = xTimerStart( xTimer, staticDONT_BLOCK );\r
-\r
- if( xReturned != pdPASS )\r
- {\r
- xErrorOccurred = pdTRUE;\r
- }\r
-\r
- vTaskDelay( xTimerPeriod * staticMAX_TIMER_CALLBACK_EXECUTIONS );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
-\r
- if( uxVariableToIncrement != staticMAX_TIMER_CALLBACK_EXECUTIONS )\r
- {\r
- xErrorOccurred = pdTRUE;\r
- }\r
-\r
- xReturned = xTimerDelete( xTimer, staticDONT_BLOCK );\r
-\r
- if( xReturned != pdPASS )\r
- {\r
- xErrorOccurred = pdTRUE;\r
- }\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Delete the event group again so the buffers can be reused. */\r
vEventGroupDelete( xEventGroup );\r
-\r
-\r
- /* The event group created above had a statically allocated event group\r
- structure. Repeat the above using NULL as the xEventGroupCreateStatic()\r
- parameter so the event group structure is instead allocated dynamically. */\r
- xEventGroup = xEventGroupCreateStatic( NULL );\r
-\r
- /* Ensure the event group passes a few sanity checks as a valid event\r
- group. */\r
- prvSanityCheckCreatedEventGroup( xEventGroup );\r
-\r
- /* Delete the event group again so the buffers can be reused. */\r
- vEventGroupDelete( xEventGroup );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Create the task. xTaskCreateStatic() has two more parameters than\r
the usual xTaskCreate() function. The first new parameter is a pointer to\r
the pre-allocated stack. The second new parameter is a pointer to the\r
- StaticTask_t structure that will hold the task's TCB. If either pointer is\r
+ StaticTask_t structure that will hold the task's TCB. If both pointers are\r
passed as NULL then the respective object will be allocated dynamically as\r
if xTaskCreate() had been called. */\r
xReturned = xTaskCreateStatic(\r
xErrorOccurred = pdTRUE;\r
}\r
vTaskDelete( xCreatedTask );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Create and delete the task a few times again - testing both static and\r
- dynamic allocation for the stack and TCB. */\r
- xReturned = xTaskCreateStatic(\r
- prvStaticallyAllocatedTask, /* Function that implements the task. */\r
- "Static", /* Human readable name for the task. */\r
- configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */\r
- NULL, /* Parameter to pass into the task. */\r
- staticTASK_PRIORITY + 1, /* The priority of the task. */\r
- &xCreatedTask, /* Handle of the task being created. */\r
- NULL, /* This time, dynamically allocate the stack. */\r
- &xTCBBuffer ); /* The variable that will hold that task's TCB. */\r
-\r
- configASSERT( xReturned == pdPASS );\r
- if( xReturned != pdPASS )\r
- {\r
- xErrorOccurred = pdTRUE;\r
- }\r
- vTaskDelete( xCreatedTask );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- xReturned = xTaskCreateStatic(\r
- prvStaticallyAllocatedTask, /* Function that implements the task. */\r
- "Static", /* Human readable name for the task. */\r
- configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */\r
- NULL, /* Parameter to pass into the task. */\r
- staticTASK_PRIORITY - 1, /* The priority of the task. */\r
- &xCreatedTask, /* Handle of the task being created. */\r
- &( uxStackBuffer[ 0 ] ), /* The buffer to use as the task's stack. */\r
- NULL ); /* This time dynamically allocate the TCB. */\r
-\r
- configASSERT( xReturned == pdPASS );\r
- if( xReturned != pdPASS )\r
- {\r
- xErrorOccurred = pdTRUE;\r
- }\r
- vTaskDelete( xCreatedTask );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- xReturned = xTaskCreateStatic(\r
- prvStaticallyAllocatedTask, /* Function that implements the task. */\r
- "Static", /* Human readable name for the task. */\r
- configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */\r
- NULL, /* Parameter to pass into the task. */\r
- staticTASK_PRIORITY, /* The priority of the task. */\r
- &xCreatedTask, /* Handle of the task being created. */\r
- NULL, /* This time dynamically allocate the stack and TCB. */\r
- NULL ); /* This time dynamically allocate the stack and TCB. */\r
-\r
- configASSERT( xReturned == pdPASS );\r
- if( xReturned != pdPASS )\r
- {\r
- xErrorOccurred = pdTRUE;\r
- }\r
- vTaskDelete( xCreatedTask );\r
-\r
- /* Ensure lower priority tasks get CPU time. */\r
- vTaskDelay( prvGetNextDelayTime() );\r
-\r
- /* Just to show the check task that this task is still executing. */\r
- uxCycleCounter++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
for( xTimer = 0; xTimer < configTIMER_QUEUE_LENGTH; xTimer++ )\r
{\r
- /* As the timer queue is not yet full, it should be possible to both create\r
- and start a timer. These timers are being started before the scheduler has\r
- been started, so their block times should get set to zero within the timer\r
- API itself. */\r
+ /* As the timer queue is not yet full, it should be possible to both\r
+ create and start a timer. These timers are being started before the\r
+ scheduler has been started, so their block times should get set to zero\r
+ within the timer API itself. */\r
xAutoReloadTimers[ xTimer ] = xTimerCreate( "FR Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */\r
( ( xTimer + ( TickType_t ) 1 ) * xBasePeriod ),/* The period for the timer. The plus 1 ensures a period of zero is not specified. */\r
pdTRUE, /* Auto-reload is set to true. */\r
( void * ) xTimer, /* An identifier for the timer as all the auto reload timers use the same callback. */\r
prvAutoReloadTimerCallback ); /* The callback to be called when the timer expires. */\r
\r
- configASSERT( strcmp( pcTimerGetTimerName( xAutoReloadTimers[ xTimer ] ), "FR Timer" ) == 0 );\r
-\r
if( xAutoReloadTimers[ xTimer ] == NULL )\r
{\r
xTestStatus = pdFAIL;\r
}\r
else\r
{\r
+ configASSERT( strcmp( pcTimerGetTimerName( xAutoReloadTimers[ xTimer ] ), "FR Timer" ) == 0 );\r
+\r
/* The scheduler has not yet started, so the block period of\r
portMAX_DELAY should just get set to zero in xTimerStart(). Also,\r
the timer queue is not yet full so xTimerStart() should return\r
in the Blocked state. */\r
uxOriginalPriority = uxTaskPriorityGet( NULL );\r
vTaskPrioritySet( NULL, ( configMAX_PRIORITIES - 1 ) );\r
- \r
+\r
/* Delaying for configTIMER_QUEUE_LENGTH * xBasePeriod ticks should allow\r
all the auto reload timers to expire at least once. */\r
xBlockPeriod = ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod;\r
void vCreateBlockTimeTasks( void )\r
{\r
/* Create the queue on which the two tasks block. */\r
- xTestQueue = xQueueCreate( bktQUEUE_LENGTH, sizeof( BaseType_t ) );\r
-\r
- /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
- in use. The queue registry is provided as a means for kernel aware\r
- debuggers to locate queues and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( xTestQueue, "Block_Time_Queue" );\r
-\r
- /* Create the two test tasks. */\r
- xTaskCreate( vPrimaryBlockTimeTestTask, "BTest1", configMINIMAL_STACK_SIZE, NULL, bktPRIMARY_PRIORITY, NULL );\r
- xTaskCreate( vSecondaryBlockTimeTestTask, "BTest2", configMINIMAL_STACK_SIZE, NULL, bktSECONDARY_PRIORITY, &xSecondary );\r
+ xTestQueue = xQueueCreate( bktQUEUE_LENGTH, sizeof( BaseType_t ) );\r
+\r
+ if( xTestQueue != NULL )\r
+ {\r
+ /* vQueueAddToRegistry() adds the queue to the queue registry, if one\r
+ is in use. The queue registry is provided as a means for kernel aware\r
+ debuggers to locate queues and has no purpose if a kernel aware\r
+ debugger is not being used. The call to vQueueAddToRegistry() will be\r
+ removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not\r
+ defined or is defined to be less than 1. */\r
+ vQueueAddToRegistry( xTestQueue, "Block_Time_Queue" );\r
+\r
+ /* Create the two test tasks. */\r
+ xTaskCreate( vPrimaryBlockTimeTestTask, "BTest1", configMINIMAL_STACK_SIZE, NULL, bktPRIMARY_PRIORITY, NULL );\r
+ xTaskCreate( vSecondaryBlockTimeTestTask, "BTest2", configMINIMAL_STACK_SIZE, NULL, bktSECONDARY_PRIORITY, &xSecondary );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
xParameters[ 1 ].uxExpectedStartCount = 0;\r
xParameters[ 1 ].uxLoopCounter = 0;\r
\r
- /* vQueueAddToRegistry() adds the semaphore to the registry, if one is\r
- in use. The registry is provided as a means for kernel aware\r
- debuggers to locate semaphores and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 0 ].xSemaphore, "Counting_Sem_1" );\r
- vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 1 ].xSemaphore, "Counting_Sem_2" );\r
-\r
-\r
/* Were the semaphores created? */\r
if( ( xParameters[ 0 ].xSemaphore != NULL ) || ( xParameters[ 1 ].xSemaphore != NULL ) )\r
{\r
+ /* vQueueAddToRegistry() adds the semaphore to the registry, if one is\r
+ in use. The registry is provided as a means for kernel aware\r
+ debuggers to locate semaphores and has no purpose if a kernel aware\r
+ debugger is not being used. The call to vQueueAddToRegistry() will be\r
+ removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not\r
+ defined or is defined to be less than 1. */\r
+ vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 0 ].xSemaphore, "Counting_Sem_1" );\r
+ vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 1 ].xSemaphore, "Counting_Sem_2" );\r
+\r
/* Create the demo tasks, passing in the semaphore to use as the parameter. */\r
xTaskCreate( prvCountingSemaphoreTask, "CNT1", configMINIMAL_STACK_SIZE, ( void * ) &( xParameters[ 0 ] ), tskIDLE_PRIORITY, NULL );\r
xTaskCreate( prvCountingSemaphoreTask, "CNT2", configMINIMAL_STACK_SIZE, ( void * ) &( xParameters[ 1 ] ), tskIDLE_PRIORITY, NULL );\r
\r
void vCreateSuicidalTasks( UBaseType_t uxPriority )\r
{\r
-UBaseType_t *puxPriority;\r
-\r
- /* Create the Creator tasks - passing in as a parameter the priority at which\r
- the suicidal tasks should be created. */\r
- puxPriority = ( UBaseType_t * ) pvPortMalloc( sizeof( UBaseType_t ) );\r
- *puxPriority = uxPriority;\r
-\r
- xTaskCreate( vCreateTasks, "CREATOR", deathSTACK_SIZE, ( void * ) puxPriority, uxPriority, NULL );\r
+ xTaskCreate( vCreateTasks, "CREATOR", deathSTACK_SIZE, ( void * ) NULL, uxPriority, NULL );\r
\r
/* Record the number of tasks that are running now so we know if any of the\r
suicidal tasks have failed to be killed. */\r
const TickType_t xDelay = pdMS_TO_TICKS( ( TickType_t ) 1000 );\r
UBaseType_t uxPriority;\r
\r
- uxPriority = *( UBaseType_t * ) pvParameters;\r
- vPortFree( pvParameters );\r
+ /* Remove compiler warning about unused parameter. */\r
+ ( void ) pvParameters;\r
+\r
+ uxPriority = uxTaskPriorityGet( NULL );\r
\r
for( ;; )\r
{\r
{\r
xSuspendedTestQueue = xQueueCreate( priSUSPENDED_QUEUE_LENGTH, sizeof( uint32_t ) );\r
\r
- /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
- in use. The queue registry is provided as a means for kernel aware\r
- debuggers to locate queues and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( xSuspendedTestQueue, "Suspended_Test_Queue" );\r
-\r
- xTaskCreate( vContinuousIncrementTask, "CNT_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY, &xContinuousIncrementHandle );\r
- xTaskCreate( vLimitedIncrementTask, "LIM_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY + 1, &xLimitedIncrementHandle );\r
- xTaskCreate( vCounterControlTask, "C_CTRL", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
- xTaskCreate( vQueueSendWhenSuspendedTask, "SUSP_TX", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
- xTaskCreate( vQueueReceiveWhenSuspendedTask, "SUSP_RX", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ if( xSuspendedTestQueue != NULL )\r
+ {\r
+ /* vQueueAddToRegistry() adds the queue to the queue registry, if one is\r
+ in use. The queue registry is provided as a means for kernel aware\r
+ debuggers to locate queues and has no purpose if a kernel aware debugger\r
+ is not being used. The call to vQueueAddToRegistry() will be removed\r
+ by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
+ defined to be less than 1. */\r
+ vQueueAddToRegistry( xSuspendedTestQueue, "Suspended_Test_Queue" );\r
+\r
+ xTaskCreate( vContinuousIncrementTask, "CNT_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY, &xContinuousIncrementHandle );\r
+ xTaskCreate( vLimitedIncrementTask, "LIM_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY + 1, &xLimitedIncrementHandle );\r
+ xTaskCreate( vCounterControlTask, "C_CTRL", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( vQueueSendWhenSuspendedTask, "SUSP_TX", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( vQueueReceiveWhenSuspendedTask, "SUSP_RX", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
xMutex = xSemaphoreCreateRecursiveMutex();\r
\r
- /* vQueueAddToRegistry() adds the mutex to the registry, if one is\r
- in use. The registry is provided as a means for kernel aware\r
- debuggers to locate mutex and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
- vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Recursive_Mutex" );\r
-\r
-\r
if( xMutex != NULL )\r
{\r
+ /* vQueueAddToRegistry() adds the mutex to the registry, if one is\r
+ in use. The registry is provided as a means for kernel aware\r
+ debuggers to locate mutex and has no purpose if a kernel aware debugger\r
+ is not being used. The call to vQueueAddToRegistry() will be removed\r
+ by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
+ defined to be less than 1. */\r
+ vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Recursive_Mutex" );\r
+\r
xTaskCreate( prvRecursiveMutexControllingTask, "Rec1", configMINIMAL_STACK_SIZE, NULL, recmuCONTROLLING_TASK_PRIORITY, &xControllingTaskHandle );\r
- xTaskCreate( prvRecursiveMutexBlockingTask, "Rec2", configMINIMAL_STACK_SIZE, NULL, recmuBLOCKING_TASK_PRIORITY, &xBlockingTaskHandle );\r
- xTaskCreate( prvRecursiveMutexPollingTask, "Rec3", configMINIMAL_STACK_SIZE, NULL, recmuPOLLING_TASK_PRIORITY, NULL );\r
+ xTaskCreate( prvRecursiveMutexBlockingTask, "Rec2", configMINIMAL_STACK_SIZE, NULL, recmuBLOCKING_TASK_PRIORITY, &xBlockingTaskHandle );\r
+ xTaskCreate( prvRecursiveMutexPollingTask, "Rec3", configMINIMAL_STACK_SIZE, NULL, recmuPOLLING_TASK_PRIORITY, NULL );\r
}\r
}\r
/*-----------------------------------------------------------*/\r
*/\r
\r
/*\r
- * Creates two sets of two tasks. The tasks within a set share a variable, access \r
+ * Creates two sets of two tasks. The tasks within a set share a variable, access\r
* to which is guarded by a semaphore.\r
- * \r
- * Each task starts by attempting to obtain the semaphore. On obtaining a \r
- * semaphore a task checks to ensure that the guarded variable has an expected \r
- * value. It then clears the variable to zero before counting it back up to the \r
- * expected value in increments of 1. After each increment the variable is checked \r
- * to ensure it contains the value to which it was just set. When the starting \r
- * value is again reached the task releases the semaphore giving the other task in \r
- * the set a chance to do exactly the same thing. The starting value is high \r
+ *\r
+ * Each task starts by attempting to obtain the semaphore. On obtaining a\r
+ * semaphore a task checks to ensure that the guarded variable has an expected\r
+ * value. It then clears the variable to zero before counting it back up to the\r
+ * expected value in increments of 1. After each increment the variable is checked\r
+ * to ensure it contains the value to which it was just set. When the starting\r
+ * value is again reached the task releases the semaphore giving the other task in\r
+ * the set a chance to do exactly the same thing. The starting value is high\r
* enough to ensure that a tick is likely to occur during the incrementing loop.\r
*\r
- * An error is flagged if at any time during the process a shared variable is \r
- * found to have a value other than that expected. Such an occurrence would \r
- * suggest an error in the mutual exclusion mechanism by which access to the \r
+ * An error is flagged if at any time during the process a shared variable is\r
+ * found to have a value other than that expected. Such an occurrence would\r
+ * suggest an error in the mutual exclusion mechanism by which access to the\r
* variable is restricted.\r
*\r
- * The first set of two tasks poll their semaphore. The second set use blocking \r
+ * The first set of two tasks poll their semaphore. The second set use blocking\r
* calls.\r
*\r
*/\r
if( pxFirstSemaphoreParameters != NULL )\r
{\r
/* Create the semaphore used by the first two tasks. */\r
- pxFirstSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary();\r
- xSemaphoreGive( pxFirstSemaphoreParameters->xSemaphore );\r
+ pxFirstSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary(); \r
\r
if( pxFirstSemaphoreParameters->xSemaphore != NULL )\r
{\r
+ xSemaphoreGive( pxFirstSemaphoreParameters->xSemaphore );\r
+ \r
/* Create the variable which is to be shared by the first two tasks. */\r
pxFirstSemaphoreParameters->pulSharedVariable = ( uint32_t * ) pvPortMalloc( sizeof( uint32_t ) );\r
\r
/* Spawn the first two tasks. As they poll they operate at the idle priority. */\r
xTaskCreate( prvSemaphoreTest, "PolSEM1", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL );\r
xTaskCreate( prvSemaphoreTest, "PolSEM2", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL );\r
+\r
+ /* vQueueAddToRegistry() adds the semaphore to the registry, if one\r
+ is in use. The registry is provided as a means for kernel aware\r
+ debuggers to locate semaphores and has no purpose if a kernel aware\r
+ debugger is not being used. The call to vQueueAddToRegistry() will\r
+ be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not\r
+ defined or is defined to be less than 1. */\r
+ vQueueAddToRegistry( ( QueueHandle_t ) pxFirstSemaphoreParameters->xSemaphore, "Counting_Sem_1" );\r
}\r
}\r
\r
- /* Do exactly the same to create the second set of tasks, only this time \r
+ /* Do exactly the same to create the second set of tasks, only this time\r
provide a block time for the semaphore calls. */\r
pxSecondSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) );\r
if( pxSecondSemaphoreParameters != NULL )\r
{\r
- pxSecondSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary();\r
- xSemaphoreGive( pxSecondSemaphoreParameters->xSemaphore );\r
+ pxSecondSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary(); \r
\r
if( pxSecondSemaphoreParameters->xSemaphore != NULL )\r
{\r
+ xSemaphoreGive( pxSecondSemaphoreParameters->xSemaphore );\r
+ \r
pxSecondSemaphoreParameters->pulSharedVariable = ( uint32_t * ) pvPortMalloc( sizeof( uint32_t ) );\r
*( pxSecondSemaphoreParameters->pulSharedVariable ) = semtstBLOCKING_EXPECTED_VALUE;\r
pxSecondSemaphoreParameters->xBlockTime = xBlockTime / portTICK_PERIOD_MS;\r
\r
xTaskCreate( prvSemaphoreTest, "BlkSEM1", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL );\r
xTaskCreate( prvSemaphoreTest, "BlkSEM2", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL );\r
+\r
+ /* vQueueAddToRegistry() adds the semaphore to the registry, if one\r
+ is in use. The registry is provided as a means for kernel aware\r
+ debuggers to locate semaphores and has no purpose if a kernel aware\r
+ debugger is not being used. The call to vQueueAddToRegistry() will\r
+ be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not\r
+ defined or is defined to be less than 1. */\r
+ vQueueAddToRegistry( ( QueueHandle_t ) pxSecondSemaphoreParameters->xSemaphore, "Counting_Sem_2" );\r
}\r
}\r
-\r
- /* vQueueAddToRegistry() adds the semaphore to the registry, if one is\r
- in use. The registry is provided as a means for kernel aware \r
- debuggers to locate semaphores and has no purpose if a kernel aware debugger\r
- is not being used. The call to vQueueAddToRegistry() will be removed\r
- by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is \r
- defined to be less than 1. */\r
- vQueueAddToRegistry( ( QueueHandle_t ) pxFirstSemaphoreParameters->xSemaphore, "Counting_Sem_1" );\r
- vQueueAddToRegistry( ( QueueHandle_t ) pxSecondSemaphoreParameters->xSemaphore, "Counting_Sem_2" );\r
}\r
/*-----------------------------------------------------------*/\r
\r
uint32_t ulCounter;\r
short sError = pdFALSE, sCheckVariableToUse;\r
\r
- /* See which check variable to use. sNextCheckVariable is not semaphore \r
+ /* See which check variable to use. sNextCheckVariable is not semaphore\r
protected! */\r
portENTER_CRITICAL();\r
sCheckVariableToUse = sNextCheckVariable;\r
sNextCheckVariable++;\r
portEXIT_CRITICAL();\r
\r
- /* A structure is passed in as the parameter. This contains the shared \r
+ /* A structure is passed in as the parameter. This contains the shared\r
variable being guarded. */\r
pxParameters = ( xSemaphoreParameters * ) pvParameters;\r
pulSharedVariable = pxParameters->pulSharedVariable;\r
{\r
sError = pdTRUE;\r
}\r
- \r
+\r
/* Clear the variable, then count it back up to the expected value\r
before releasing the semaphore. Would expect a context switch or\r
two during this time. */\r
--- /dev/null
+/*\r
+ FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. See\r
+ * http://www.freertos.org/a00110.html\r
+ *----------------------------------------------------------*/\r
+\r
+/* Setting configSUPPORT_STATIC_ALLOCATION to 1 allows RTOS objects to be\r
+created using only application supplied memory. No dynamic memory allocation\r
+will be performed. */\r
+#define configSUPPORT_STATIC_ALLOCATION 1\r
+\r
+/* Setting configSUPPORT_DYNAMIC_ALLOCATION to 0 results in all calls to\r
+pvPortMalloc() returning NULL, and all calls to vPortFree() being ignored.\r
+Therefore the application can be built without providing an implementation of\r
+either of these functions (so none of the normal heap_n.c files described on\r
+http://www.freertos.org/a00111.html are required). Note that\r
+configTOTAL_HEAP_SIZE is not defined. */\r
+#define configSUPPORT_DYNAMIC_ALLOCATION 0\r
+\r
+/* Other constants as described on http://www.freertos.org/a00110.html */\r
+#define configUSE_PREEMPTION 1\r
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#define configUSE_IDLE_HOOK 0\r
+#define configUSE_TICK_HOOK 0\r
+#define configUSE_DAEMON_TASK_STARTUP_HOOK 0\r
+#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 50 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the win32 thread. */\r
+#define configMAX_TASK_NAME_LEN ( 12 )\r
+#define configUSE_TRACE_FACILITY 1\r
+#define configUSE_16_BIT_TICKS 0\r
+#define configIDLE_SHOULD_YIELD 1\r
+#define configUSE_MUTEXES 1\r
+#define configCHECK_FOR_STACK_OVERFLOW 0\r
+#define configUSE_RECURSIVE_MUTEXES 1\r
+#define configQUEUE_REGISTRY_SIZE 20\r
+#define configUSE_MALLOC_FAILED_HOOK 0 /* pvPortMalloc() is not used. */\r
+#define configUSE_APPLICATION_TASK_TAG 1\r
+#define configUSE_COUNTING_SEMAPHORES 1\r
+#define configUSE_ALTERNATIVE_API 0\r
+#define configUSE_QUEUE_SETS 1\r
+#define configUSE_TASK_NOTIFICATIONS 1\r
+\r
+/* Software timer related configuration options. */\r
+#define configUSE_TIMERS 1\r
+#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )\r
+#define configTIMER_QUEUE_LENGTH 20\r
+#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )\r
+\r
+#define configMAX_PRIORITIES ( 7 )\r
+\r
+/* Run time stats gathering configuration options. */\r
+#define configGENERATE_RUN_TIME_STATS 0\r
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\r
+#define portGET_RUN_TIME_COUNTER_VALUE()\r
+\r
+/* Co-routine related configuration options. */\r
+#define configUSE_CO_ROUTINES 0\r
+\r
+/* This demo makes use of one or more example stats formatting functions. These\r
+format the raw data provided by the uxTaskGetSystemState() function in to human\r
+readable ASCII form. See the notes in the implementation of vTaskList() within\r
+FreeRTOS/Source/tasks.c for limitations. */\r
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. In most cases the linker will remove unused\r
+functions anyway. */\r
+#define INCLUDE_vTaskPrioritySet 1\r
+#define INCLUDE_uxTaskPriorityGet 1\r
+#define INCLUDE_vTaskDelete 1\r
+#define INCLUDE_vTaskCleanUpResources 0\r
+#define INCLUDE_vTaskSuspend 1\r
+#define INCLUDE_vTaskDelayUntil 1\r
+#define INCLUDE_vTaskDelay 1\r
+#define INCLUDE_uxTaskGetStackHighWaterMark 1\r
+#define INCLUDE_xTaskGetSchedulerState 1\r
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 1\r
+#define INCLUDE_xTaskGetIdleTaskHandle 1\r
+#define INCLUDE_pcTaskGetTaskName 1\r
+#define INCLUDE_xTaskGetTaskHandle 1\r
+#define INCLUDE_eTaskGetState 1\r
+#define INCLUDE_xSemaphoreGetMutexHolder 1\r
+#define INCLUDE_xTimerPendFunctionCall 1\r
+#define INCLUDE_xTaskAbortDelay 1\r
+\r
+/* It is a good idea to define configASSERT() while developing. configASSERT()\r
+uses the same semantics as the standard C assert() macro. */\r
+extern void vAssertCalled( unsigned long ulLine, const char * const pcFileName );\r
+#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __LINE__, __FILE__ )\r
+\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
--- /dev/null
+\r
+Microsoft Visual Studio Solution File, Format Version 12.00\r
+# Visual Studio 14\r
+VisualStudioVersion = 14.0.24720.0\r
+MinimumVisualStudioVersion = 10.0.40219.1\r
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "RTOSDemo", "WIN32.vcxproj", "{C686325E-3261-42F7-AEB1-DDE5280E1CEB}"\r
+EndProject\r
+Global\r
+ GlobalSection(SolutionConfigurationPlatforms) = preSolution\r
+ Debug|Win32 = Debug|Win32\r
+ Optimised|Win32 = Optimised|Win32\r
+ Release|Win32 = Release|Win32\r
+ EndGlobalSection\r
+ GlobalSection(ProjectConfigurationPlatforms) = postSolution\r
+ {C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.ActiveCfg = Debug|Win32\r
+ {C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.Build.0 = Debug|Win32\r
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+ {C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Optimised|Win32.Build.0 = Optimised|Win32\r
+ {C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.ActiveCfg = Release|Win32\r
+ {C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.Build.0 = Release|Win32\r
+ EndGlobalSection\r
+ GlobalSection(SolutionProperties) = preSolution\r
+ HideSolutionNode = FALSE\r
+ EndGlobalSection\r
+EndGlobal\r
--- /dev/null
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+<Project DefaultTargets="Build" ToolsVersion="14.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">\r
+ <ItemGroup Label="ProjectConfigurations">\r
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+ <Configuration>Debug</Configuration>\r
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+ <Platform>Win32</Platform>\r
+ </ProjectConfiguration>\r
+ <ProjectConfiguration Include="Release|Win32">\r
+ <Configuration>Release</Configuration>\r
+ <Platform>Win32</Platform>\r
+ </ProjectConfiguration>\r
+ </ItemGroup>\r
+ <PropertyGroup Label="Globals">\r
+ <ProjectGuid>{C686325E-3261-42F7-AEB1-DDE5280E1CEB}</ProjectGuid>\r
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+ </PropertyGroup>\r
+ <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />\r
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+ <LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</LinkIncremental>\r
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+ <LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">false</LinkIncremental>\r
+ </PropertyGroup>\r
+ <ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">\r
+ <Midl>\r
+ <TypeLibraryName>.\Debug/WIN32.tlb</TypeLibraryName>\r
+ <HeaderFileName>\r
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+ </Midl>\r
+ <ClCompile>\r
+ <Optimization>Disabled</Optimization>\r
+ <AdditionalIncludeDirectories>..\..\Source\include;..\..\Source\portable\MSVC-MingW;..\Common\Include;..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-Trace\Include;.\Trace_Recorder_Configuration;.;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>\r
+ <PreprocessorDefinitions>WIN32;_DEBUG;_CONSOLE;_WIN32_WINNT=0x0500;WINVER=0x400;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions)</PreprocessorDefinitions>\r
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+ <BasicRuntimeChecks>EnableFastChecks</BasicRuntimeChecks>\r
+ <RuntimeLibrary>MultiThreadedDebug</RuntimeLibrary>\r
+ <PrecompiledHeaderOutputFile>.\Debug/WIN32.pch</PrecompiledHeaderOutputFile>\r
+ <AssemblerListingLocation>.\Debug/</AssemblerListingLocation>\r
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+ <ItemGroup>\r
+ <Filter Include="Resource Files">\r
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+ <Extensions>ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe</Extensions>\r
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+</Project>
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--- /dev/null
+/*\r
+ FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ *\r
+ * This project is provided as an example of how to create a FreeRTOS project\r
+ * that does not need a heap. configSUPPORT_STATIC_ALLOCATION is set to 1 to\r
+ * allow RTOS objects to be created using statically allocated RAM, and\r
+ * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 to remove any build dependency\r
+ * on the FreeRTOS heap. When configSUPPORT_DYNAMIC_ALLOCATION is set to 0\r
+ * pvPortMalloc() just equates to NULL, and calls to vPortFree() have no\r
+ * effect. See:\r
+ *\r
+ * http://www.freertos.org/a00111.html and\r
+ * http://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html\r
+ *\r
+ *******************************************************************************\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+#include <stdlib.h>\r
+#include <conio.h>\r
+\r
+/* FreeRTOS kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Standard demo includes. */\r
+#include "StaticAllocation.h"\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Prototypes for the standard FreeRTOS stack overflow hook (callback)\r
+ * function. http://www.freertos.org/Stacks-and-stack-overflow-checking.html\r
+ */\r
+void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );\r
+\r
+/*\r
+ * This demo has configSUPPORT_STATIC_ALLOCATION set to 1 so the following\r
+ * application callback function must be provided to supply the RAM that will\r
+ * get used for the Idle task data structures and stack.\r
+ */\r
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint16_t *pusIdleTaskStackSize );\r
+\r
+/*\r
+* This demo has configSUPPORT_STATIC_ALLOCATION set to 1 and configUSE_TIMERS\r
+* set to 1 so the following application callback function must be provided to\r
+* supply the RAM that will get used for the Timer task data structures and\r
+* stack.\r
+*/\r
+void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint16_t *pusTimerTaskStackSize );\r
+\r
+/* This demo only uses the standard demo tasks that use statically allocated\r
+RAM. A 'check' task is also created to periodically inspect the demo tasks to\r
+ensure they are still running, and that no errors have been detected. */\r
+static void prvStartCheckTask( void );\r
+static void prvCheckTask( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+ /* This demo has configSUPPORT_STATIC_ALLOCATION set to 1 and\r
+ configSUPPORT_DYNAMIC_ALLOCATION set to 0, so the only standard temo tasks\r
+ created are the ones that only use static allocation. This allow the\r
+ application to be built without including a FreeRTOS heap file (without one\r
+ of the heap files described on http://www.freertos.org/a00111.html */\r
+ vStartStaticallyAllocatedTasks();\r
+\r
+ /* Start a task that periodically inspects the tasks created by\r
+ vStartStaticallyAllocatedTasks() to ensure they are still running, and not\r
+ reporting any errors. */\r
+ prvStartCheckTask();\r
+\r
+ /* Start the scheduler so the demo tasks start to execute. */\r
+ vTaskStartScheduler();\r
+\r
+ /* vTaskStartScheduler() would only return if RAM required by the Idle and\r
+ Timer tasks could not be allocated. As this demo uses statically allocated\r
+ RAM only, there are no allocations that could fail, and\r
+ vTaskStartScheduler() cannot return - so there is no need to put the normal\r
+ infinite loop after the call to vTaskStartScheduler(). */\r
+\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvStartCheckTask( void )\r
+{\r
+/* Allocate the data structure that will hold the task's TCB. NOTE: This is\r
+declared static so it still exists after this function has returned. */\r
+static StaticTask_t xCheckTask;\r
+\r
+/* Allocate the stack that will be used by the task. NOTE: This is declared\r
+static so it still exists after this function has returned. */\r
+static StackType_t ucTaskStack[ configMINIMAL_STACK_SIZE * sizeof( StackType_t ) ];\r
+\r
+ /* Create the task, which will use the RAM allocated by the linker to the\r
+ variables declared in this function. */\r
+ xTaskCreateStatic( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL, ucTaskStack, &xCheckTask );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTask( void *pvParameters )\r
+{\r
+const TickType_t xCycleFrequency = pdMS_TO_TICKS( 2500UL );\r
+static char *pcStatusMessage = "No errors";\r
+\r
+ /* Just to remove compiler warning. */\r
+ ( void ) pvParameters;\r
+\r
+ for( ;; )\r
+ {\r
+ /* Place this task in the blocked state until it is time to run again. */\r
+ vTaskDelay( xCycleFrequency );\r
+\r
+ /* Check the tasks that use static allocation are still executing. */\r
+ if( xAreStaticAllocationTasksStillRunning() != pdPASS )\r
+ {\r
+ pcStatusMessage = "Error: Static allocation";\r
+ }\r
+\r
+ /* This is the only task that uses stdout so its ok to call printf()\r
+ directly. */\r
+ printf( "%s - tick count %d - number of tasks executing %d\r\n",\r
+ pcStatusMessage,\r
+ xTaskGetTickCount(),\r
+ uxTaskGetNumberOfTasks() );\r
+ }\r
+}\r
+\r
+/*-----------------------------------------------------------*/\r
+void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )\r
+{\r
+ ( void ) pcTaskName;\r
+ ( void ) pxTask;\r
+\r
+ /* Run time stack overflow checking is performed if\r
+ configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook\r
+ function is called if a stack overflow is detected. This function is\r
+ provided as an example only as stack overflow checking does not function\r
+ when running the FreeRTOS Windows port. */\r
+ vAssertCalled( __LINE__, __FILE__ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vAssertCalled( unsigned long ulLine, const char * const pcFileName )\r
+{\r
+volatile uint32_t ulSetToNonZeroInDebuggerToContinue = 0;\r
+\r
+ /* Called if an assertion passed to configASSERT() fails. See\r
+ http://www.freertos.org/a00110.html#configASSERT for more information. */\r
+\r
+ /* Parameters are not used. */\r
+ ( void ) ulLine;\r
+ ( void ) pcFileName;\r
+\r
+ printf( "ASSERT! Line %d, file %s\r\n", ulLine, pcFileName );\r
+\r
+ taskENTER_CRITICAL();\r
+ {\r
+ /* You can step out of this function to debug the assertion by using\r
+ the debugger to set ulSetToNonZeroInDebuggerToContinue to a non-zero\r
+ value. */\r
+ while( ulSetToNonZeroInDebuggerToContinue == 0 )\r
+ {\r
+ __asm{ NOP };\r
+ __asm{ NOP };\r
+ }\r
+ }\r
+ taskEXIT_CRITICAL();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint16_t *pusIdleTaskStackSize )\r
+{\r
+/* The buffers used by the idle task must be static so they are persistent, and\r
+so exist after this function returns. */\r
+static StaticTask_t xIdleTaskTCB;\r
+static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ];\r
+\r
+ /* configSUPORT_STATIC_ALLOCATION is set to 1 and\r
+ configSUPPORT_DYNAMIC_ALLOCATION is 0, so the application must supply the\r
+ buffers that will be used to hold the Idle task data structure and stack. */\r
+ *ppxIdleTaskTCBBuffer = &xIdleTaskTCB;\r
+ *ppxIdleTaskStackBuffer = uxIdleTaskStack;\r
+ *pusIdleTaskStackSize = configMINIMAL_STACK_SIZE; /* In words. NOT in bytes! */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint16_t *pusTimerTaskStackSize )\r
+{\r
+/* The buffers used by the Timer/Daemon task must be static so they are\r
+persistent, and so exist after this function returns. */\r
+static StaticTask_t xTimerTaskTCB;\r
+static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ];\r
+\r
+ /* configSUPPORT_STATIC_ALLOCATION is set to 1,\r
+ configSUPPORT_DYNAMIC_ALLOCATION is set to 1, and configUSE_TIMERS is set\r
+ to 1, so the application must supply the buffers that will be used to hold\r
+ the Timer task data structure and stack. */\r
+ *ppxTimerTaskTCBBuffer = &xTimerTaskTCB;\r
+ *ppxTimerTaskStackBuffer = uxTimerTaskStack;\r
+ *pusTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; /* In words. NOT in bytes! */\r
+}\r
+\r
{\r
SemaphoreHandle_t xSemaphore;\r
\r
+ /* Prevent compiler warning about unused parameter in the case that\r
+ configASSERT() is not defined. */\r
+ ( void ) pvParameters;\r
+\r
/* This task should block on a semaphore, and never return. */\r
xSemaphore = xSemaphoreCreateBinary();\r
configASSERT( xSemaphore );\r
\r
static void prvPermanentlyBlockingNotificationTask( void *pvParameters )\r
{\r
+ /* Prevent compiler warning about unused parameter in the case that\r
+ configASSERT() is not defined. */\r
+ ( void ) pvParameters;\r
+\r
/* This task should block on a task notification, and never return. */\r
ulTaskNotifyTake( pdTRUE, portMAX_DELAY );\r
\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193247</id>\r
+ <id>1458581605399</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193247</id>\r
+ <id>1458581605404</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193257</id>\r
+ <id>1458581605410</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193257</id>\r
+ <id>1458581605415</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193267</id>\r
+ <id>1458581605421</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193277</id>\r
+ <id>1458581605427</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193277</id>\r
+ <id>1458581605434</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193287</id>\r
+ <id>1458581605441</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193297</id>\r
+ <id>1458581605450</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193297</id>\r
+ <id>1458581605458</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193308</id>\r
+ <id>1458581605463</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193313</id>\r
+ <id>1458581605473</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193319</id>\r
+ <id>1458581605490</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193325</id>\r
+ <id>1458581605514</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193349</id>\r
+ <id>1458581605524</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193369</id>\r
+ <id>1458581605530</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1418321193379</id>\r
+ <id>1458581605535</id>\r
<name>Standard_Demo_Tasks</name>\r
<type>5</type>\r
<matcher>\r
<arguments>1.0-name-matches-false-false-TaskNotify.c</arguments>\r
</matcher>\r
</filter>\r
+ <filter>\r
+ <id>1458581605540</id>\r
+ <name>Standard_Demo_Tasks</name>\r
+ <type>5</type>\r
+ <matcher>\r
+ <id>org.eclipse.ui.ide.multiFilter</id>\r
+ <arguments>1.0-name-matches-false-false-QueueSetPolling.c</arguments>\r
+ </matcher>\r
+ </filter>\r
+ <filter>\r
+ <id>1458581605547</id>\r
+ <name>Standard_Demo_Tasks</name>\r
+ <type>5</type>\r
+ <matcher>\r
+ <id>org.eclipse.ui.ide.multiFilter</id>\r
+ <arguments>1.0-name-matches-false-false-AbortDelay.c</arguments>\r
+ </matcher>\r
+ </filter>\r
<filter>\r
<id>0</id>\r
<name>FreeRTOS_Source/portable</name>\r
org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},implicit\=>false}\r
org.eclipse.cdt.codan.checkers.errreturnvalue=-Error\r
org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}}\r
+org.eclipse.cdt.codan.checkers.nocommentinside=-Error\r
+org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}}\r
+org.eclipse.cdt.codan.checkers.nolinecomment=-Error\r
+org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}}\r
org.eclipse.cdt.codan.checkers.noreturn=-Error\r
org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},implicit\=>false}\r
org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation=-Error\r
* application requirements.\r
*\r
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. See\r
+ * http://www.freertos.org/a00110.html\r
*----------------------------------------------------------*/\r
\r
#define configUSE_PREEMPTION 1\r
#define configUSE_TICK_HOOK 1\r
#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */\r
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 50 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the win32 thread. */\r
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 23 * 1024 ) )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 35 * 1024 ) )\r
#define configMAX_TASK_NAME_LEN ( 12 )\r
#define configUSE_TRACE_FACILITY 1\r
#define configUSE_16_BIT_TICKS 0\r
#define INCLUDE_eTaskGetState 1\r
#define INCLUDE_xSemaphoreGetMutexHolder 1\r
#define INCLUDE_xTimerPendFunctionCall 1\r
+#define INCLUDE_xTaskAbortDelay 1\r
+#define INCLUDE_xTaskGetTaskHandle 1\r
\r
/* It is a good idea to define configASSERT() while developing. configASSERT()\r
uses the same semantics as the standard C assert() macro. */\r
being used as this demo could easily create one large heap region instead of\r
multiple smaller heap regions - in which case heap_4.c would be the more\r
appropriate choice. */\r
-#define mainREGION_1_SIZE 3001\r
+#define mainREGION_1_SIZE 7001\r
#define mainREGION_2_SIZE 18105\r
-#define mainREGION_3_SIZE 1107\r
+#define mainREGION_3_SIZE 2807\r
\r
/*\r
* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
#include "EventGroupsDemo.h"\r
#include "IntSemTest.h"\r
#include "TaskNotify.h"\r
+#include "QueueSetPolling.h"\r
+#include "blocktim.h"\r
+#include "AbortDelay.h"\r
\r
/* Priorities at which the tasks are created. */\r
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\r
xTaskCreate( prvDemoQueueSpaceFunctions, "QSpace", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
vStartEventGroupTasks();\r
vStartInterruptSemaphoreTasks();\r
+ vStartQueueSetPollingTask();\r
+ vCreateBlockTimeTasks();\r
+ vCreateAbortDelayTasks();\r
\r
#if( configUSE_PREEMPTION != 0 )\r
{\r
/* Start the scheduler itself. */\r
vTaskStartScheduler();\r
\r
- /* Should never get here unless there was not enough heap space to create\r
+ /* Should never get here unless there was not enough heap space to create\r
the idle and other system tasks. */\r
- return 0;\r
+ return 0;\r
}\r
/*-----------------------------------------------------------*/\r
\r
static void prvCheckTask( void *pvParameters )\r
{\r
TickType_t xNextWakeTime;\r
-const TickType_t xCycleFrequency = 2500 / portTICK_PERIOD_MS;\r
+const TickType_t xCycleFrequency = pdMS_TO_TICKS( 2500UL );\r
\r
/* Just to remove compiler warning. */\r
( void ) pvParameters;\r
{\r
pcStatusMessage = "Error: Queue overwrite";\r
}\r
+ else if( xAreQueueSetPollTasksStillRunning() != pdPASS )\r
+ {\r
+ pcStatusMessage = "Error: Queue set polling";\r
+ }\r
+ else if( xAreBlockTimeTestTasksStillRunning() != pdPASS )\r
+ {\r
+ pcStatusMessage = "Error: Block time";\r
+ }\r
+ else if( xAreAbortDelayTestTasksStillRunning() != pdPASS )\r
+ {\r
+ pcStatusMessage = "Error: Abort delay";\r
+ }\r
\r
/* This is the only task that uses stdout so its ok to call printf()\r
directly. */\r
/* Write to a queue that is in use as part of the queue set demo to\r
demonstrate using queue sets from an ISR. */\r
vQueueSetAccessQueueSetFromISR();\r
+ vQueueSetPollingInterruptAccess();\r
\r
/* Exercise event groups from interrupts. */\r
vPeriodicEventGroupsProcessing();\r
UBaseType_t uxEventGroupNumber;\r
#endif\r
\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- uint8_t ucStaticallyAllocated;\r
+ #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
+ uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */\r
#endif\r
} EventGroup_t;\r
\r
\r
/*-----------------------------------------------------------*/\r
\r
-EventGroupHandle_t xEventGroupGenericCreate( StaticEventGroup_t *pxStaticEventGroup )\r
-{\r
-EventGroup_t *pxEventBits;\r
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
\r
- if( pxStaticEventGroup == NULL )\r
- {\r
- /* The user has not provided a statically allocated event group, so\r
- create on dynamically. */\r
- pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) );\r
- }\r
- else\r
+ EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxStaticEventGroup )\r
{\r
+ EventGroup_t *pxEventBits;\r
+\r
+ /* A StaticEventGroup_t object must be provided. */\r
+ configASSERT( pxStaticEventGroup );\r
+\r
/* The user has provided a statically allocated event group - use it. */\r
pxEventBits = ( EventGroup_t * ) pxStaticEventGroup; /*lint !e740 EventGroup_t and StaticEventGroup_t are guaranteed to have the same size and alignment requirement - checked by configASSERT(). */\r
+\r
+ if( pxEventBits != NULL )\r
+ {\r
+ pxEventBits->uxEventBits = 0;\r
+ vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );\r
+\r
+ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ {\r
+ /* Both static and dynamic allocation can be used, so note that\r
+ this event group was created statically in case the event group\r
+ is later deleted. */\r
+ pxEventBits->ucStaticallyAllocated = pdTRUE;\r
+ }\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
+\r
+ traceEVENT_GROUP_CREATE( pxEventBits );\r
+ }\r
+ else\r
+ {\r
+ traceEVENT_GROUP_CREATE_FAILED();\r
+ }\r
+\r
+ return ( EventGroupHandle_t ) pxEventBits;\r
}\r
\r
- if( pxEventBits != NULL )\r
+#endif /* configSUPPORT_STATIC_ALLOCATION */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+\r
+ EventGroupHandle_t xEventGroupCreate( void )\r
{\r
- pxEventBits->uxEventBits = 0;\r
- vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );\r
+ EventGroup_t *pxEventBits;\r
+\r
+ /* Allocate the event group. */\r
+ pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) );\r
\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ if( pxEventBits != NULL )\r
{\r
- if( pxStaticEventGroup == NULL )\r
+ pxEventBits->uxEventBits = 0;\r
+ vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );\r
+\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
{\r
+ /* Both static and dynamic allocation can be used, so note this\r
+ event group was allocated statically in case the event group is\r
+ later deleted. */\r
pxEventBits->ucStaticallyAllocated = pdFALSE;\r
}\r
- else\r
- {\r
- pxEventBits->ucStaticallyAllocated = pdTRUE;\r
- }\r
+ #endif /* configSUPPORT_STATIC_ALLOCATION */\r
+\r
+ traceEVENT_GROUP_CREATE( pxEventBits );\r
+ }\r
+ else\r
+ {\r
+ traceEVENT_GROUP_CREATE_FAILED();\r
}\r
- #endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
- traceEVENT_GROUP_CREATE( pxEventBits );\r
- }\r
- else\r
- {\r
- traceEVENT_GROUP_CREATE_FAILED();\r
+ return ( EventGroupHandle_t ) pxEventBits;\r
}\r
\r
- return ( EventGroupHandle_t ) pxEventBits;\r
-}\r
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait )\r
( void ) xTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET );\r
}\r
\r
- /* Only free the memory if it was allocated dynamically. */\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )\r
+ {\r
+ /* The event group can only have been allocated dynamically - free\r
+ it again. */\r
+ vPortFree( pxEventBits );\r
+ }\r
+ #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
{\r
+ /* The event group could have been allocated statically or\r
+ dynamically, so check before attempting to free the memory. */\r
if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE )\r
{\r
vPortFree( pxEventBits );\r
}\r
+ else\r
+ {\r
+ mtCOVERAGE_TEST_MARKER();\r
+ }\r
}\r
- #else\r
- {\r
- vPortFree( pxEventBits );\r
- }\r
- #endif /* configSUPPORT_STATIC_ALLOCATION */\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
}\r
( void ) xTaskResumeAll();\r
}\r
#define INCLUDE_xTaskAbortDelay 0\r
#endif\r
\r
-#ifndef INCLUDE_xTimerGetTimerDaemonTaskHandle\r
- #define INCLUDE_xTimerGetTimerDaemonTaskHandle 0\r
-#endif\r
-\r
#ifndef INCLUDE_xQueueGetMutexHolder\r
#define INCLUDE_xQueueGetMutexHolder 0\r
#endif\r
#define portYIELD_WITHIN_API portYIELD\r
#endif\r
\r
-#ifndef pvPortMallocAligned\r
- #define pvPortMallocAligned( x, puxPreallocatedBuffer ) ( ( ( puxPreallocatedBuffer ) == NULL ) ? ( pvPortMalloc( ( x ) ) ) : ( puxPreallocatedBuffer ) )\r
-#endif\r
-\r
-#ifndef vPortFreeAligned\r
- #define vPortFreeAligned( pvBlockToFree ) vPortFree( pvBlockToFree )\r
-#endif\r
-\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )\r
#endif\r
#endif\r
\r
#ifndef configSUPPORT_STATIC_ALLOCATION\r
+ /* Defaults to 0 for backward compatibility. */\r
#define configSUPPORT_STATIC_ALLOCATION 0\r
#endif\r
\r
+#ifndef configSUPPORT_DYNAMIC_ALLOCATION\r
+ /* Defaults to 1 for backward compatibility. */\r
+ #define configSUPPORT_DYNAMIC_ALLOCATION 1\r
+#endif\r
+\r
+/* Sanity check the configuration. */\r
+#if( configUSE_TICKLESS_IDLE != 0 )\r
+ #if( INCLUDE_vTaskSuspend != 1 )\r
+ #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0\r
+ #endif /* INCLUDE_vTaskSuspend */\r
+#endif /* configUSE_TICKLESS_IDLE */\r
+\r
+#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION != 1 ) )\r
+ #error configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h when the MPU is used.\r
+#endif\r
+\r
+#if( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) )\r
+ #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1.\r
+#endif\r
+\r
#if( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) )\r
#error configUSE_MUTEXES must be set to 1 to use recursive mutexes\r
#endif\r
} u;\r
\r
StaticList_t xDummy3[ 2 ];\r
- UBaseType_t uxDummy4[ 5 ];\r
+ UBaseType_t uxDummy4[ 3 ];\r
+ uint8_t ucDummy5[ 2 ];\r
+\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ uint8_t ucDummy6;\r
+ #endif\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
void *pvDummy7;\r
#endif\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
- UBaseType_t uxDummy5;\r
- uint8_t ucDummy6;\r
- #endif\r
-\r
- #if ( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- uint8_t ucDummy7;\r
+ UBaseType_t uxDummy8;\r
+ uint8_t ucDummy9;\r
#endif\r
\r
} StaticQueue_t;\r
#error "include FreeRTOS.h" must appear in source files before "include event_groups.h"\r
#endif\r
\r
+/* FreeRTOS includes. */\r
#include "timers.h"\r
\r
#ifdef __cplusplus\r
* \defgroup xEventGroupCreate xEventGroupCreate\r
* \ingroup EventGroup\r
*/\r
-#define xEventGroupCreate() xEventGroupGenericCreate( NULL )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION;\r
+#endif\r
\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xEventGroupCreateStatic( pxStaticEventGroup ) xEventGroupGenericCreate( ( pxStaticEventGroup ) )\r
+ EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxStaticEventGroup ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
/**\r
void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;\r
void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;\r
\r
-/*\r
- * Generic version of the event group creation function, which is in turn called\r
- * by the event group creation macros.\r
- */\r
-EventGroupHandle_t xEventGroupGenericCreate( StaticEventGroup_t *pxStaticEventGroup ) PRIVILEGED_FUNCTION;\r
\r
#if (configUSE_TRACE_FACILITY == 1)\r
UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION;\r
#define xQueueRemoveFromSet MPU_xQueueRemoveFromSet\r
#define xQueueGetMutexHolder MPU_xQueueGetMutexHolder\r
\r
- #define pvPortMalloc MPU_pvPortMalloc\r
- #define vPortFree MPU_vPortFree\r
+ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ #define pvPortMalloc MPU_pvPortMalloc\r
+ #define vPortFree MPU_vPortFree\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
+\r
#define xPortGetFreeHeapSize MPU_xPortGetFreeHeapSize\r
#define vPortInitialiseBlocks MPU_vPortInitialiseBlocks\r
#define xPortGetMinimumEverFreeHeapSize MPU_xPortGetMinimumEverFreeHeapSize\r
* \defgroup xQueueCreate xQueueCreate\r
* \ingroup QueueManagement\r
*/\r
-#define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( uxQueueLength, uxItemSize, NULL, NULL, queueQUEUE_TYPE_BASE )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ #define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) )\r
+#endif\r
\r
/**\r
* queue. h\r
* \ingroup QueueManagement\r
*/\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )\r
+ #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
/**\r
* xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling\r
* these functions directly.\r
*/\r
-QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;\r
-QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;\r
+QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\r
+QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;\r
+QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;\r
+QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;\r
void* xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;\r
\r
/*\r
#endif\r
\r
/*\r
- * Generic version of the queue creation function, which is in turn called by\r
- * any queue, semaphore or mutex creation function or macro.\r
+ * Generic version of the function used to creaet a queue using dynamic memory\r
+ * allocation. This is called by other functions and macros that create other\r
+ * RTOS objects that use the queue structure as their base.\r
*/\r
-QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\r
+#endif\r
+\r
+/*\r
+ * Generic version of the function used to creaet a queue using dynamic memory\r
+ * allocation. This is called by other functions and macros that create other\r
+ * RTOS objects that use the queue structure as their base.\r
+ */\r
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\r
+#endif\r
\r
/*\r
* Queue sets provide a mechanism to allow a task to block (pend) on a read\r
* \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary\r
* \ingroup Semaphores\r
*/\r
-#define vSemaphoreCreateBinary( xSemaphore ) \\r
- { \\r
- ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, NULL, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \\r
- if( ( xSemaphore ) != NULL ) \\r
- { \\r
- ( void ) xSemaphoreGive( ( xSemaphore ) ); \\r
- } \\r
- }\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ #define vSemaphoreCreateBinary( xSemaphore ) \\r
+ { \\r
+ ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \\r
+ if( ( xSemaphore ) != NULL ) \\r
+ { \\r
+ ( void ) xSemaphoreGive( ( xSemaphore ) ); \\r
+ } \\r
+ }\r
+#endif\r
\r
/**\r
* semphr. h\r
* \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, NULL, queueQUEUE_TYPE_BINARY_SEMAPHORE )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ #define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )\r
+#endif\r
\r
/**\r
* semphr. h\r
* \ingroup Semaphores\r
*/\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )\r
+ #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
/**\r
* \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX, NULL )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ #define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )\r
+#endif\r
\r
/**\r
* semphr. h\r
* \ingroup Semaphores\r
*/\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutex( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )\r
+ #define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
\r
* \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX, NULL )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ #define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX )\r
+#endif\r
\r
/**\r
* semphr. h\r
* \ingroup Semaphores\r
*/\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )\r
+ #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
/**\r
* \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ), ( NULL ) )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )\r
+#endif\r
\r
/**\r
* semphr. h\r
* \ingroup Semaphores\r
*/\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )\r
+ #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
/**\r
* \defgroup xTaskCreate xTaskCreate\r
* \ingroup Tasks\r
*/\r
-#define xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ) xTaskGenericCreate( ( pvTaskCode ), ( pcName ), ( usStackDepth ), ( pvParameters ), ( uxPriority ), ( pxCreatedTask ), ( NULL ), ( NULL ), ( NULL ) )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ BaseType_t xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+#endif\r
\r
/**\r
* task. h\r
TaskHandle_t xHandle = NULL;\r
\r
// Create the task without using any dynamic memory allocation.\r
- xTaskCreate( vTaskCode, // As per xTaskCreate() parameter.\r
- "NAME", // As per xTaskCreate() parameter.\r
- STACK_SIZE, // As per xTaskCreate() parameter.\r
- &ucParameterToPass, // As per xTaskCreate() parameter.\r
- tskIDLE_PRIORITY, // As per xTaskCreate() parameter.\r
- &xHandle, // As per xTaskCreate() parameter.\r
- xStack, // Pointer to the buffer that the task being created will use as its stack.\r
- &xTaskBuffer ); // Pointer to a StaticTask_t structure for use as the memory require by the task.\r
+ xTaskCreateStatic( vTaskCode, // As per xTaskCreate() parameter.\r
+ "NAME", // As per xTaskCreate() parameter.\r
+ STACK_SIZE, // As per xTaskCreate() parameter.\r
+ &ucParameterToPass, // As per xTaskCreate() parameter.\r
+ tskIDLE_PRIORITY, // As per xTaskCreate() parameter.\r
+ &xHandle, // As per xTaskCreate() parameter.\r
+ xStack, // Pointer to the buffer that the task being created will use as its stack.\r
+ &xTaskBuffer ); // Pointer to a StaticTask_t structure for use as the memory require by the task.\r
}\r
</pre>\r
* \defgroup xTaskCreateStatic xTaskCreateStatic\r
* \ingroup Tasks\r
*/\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xTaskCreateStatic( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, pxTaskBuffer ) xTaskGenericCreate( ( pvTaskCode ), ( pcName ), ( usStackDepth ), ( pvParameters ), ( uxPriority ), ( pxCreatedTask ), ( puxStackBuffer ), ( pxTaskBuffer ), ( NULL ) )\r
+ BaseType_t xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
/**\r
*/\r
BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;\r
\r
-/*\r
- * Generic version of the task creation function which is in turn called by the\r
- * xTaskCreate() and xTaskCreateRestricted() macros.\r
- */\r
-BaseType_t xTaskGenericCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer, const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
-\r
/*\r
* Get the uxTCBNumber assigned to the task referenced by the xTask parameter.\r
*/\r
* }\r
* @endverbatim\r
*/\r
-#define xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ) xTimerGenericCreate( ( pcTimerName ), ( xTimerPeriodInTicks ), ( uxAutoReload ), ( pvTimerID ), ( pxCallbackFunction ), NULL )\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ TimerHandle_t xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+#endif\r
\r
/**\r
* TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,\r
* @endverbatim\r
*/\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- #define xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ) xTimerGenericCreate( ( pcTimerName ), ( xTimerPeriodInTicks ), ( uxAutoReload ), ( pvTimerID ), ( pxCallbackFunction ), ( pxTimerBuffer ) )\r
+ TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
/**\r
*/\r
BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;\r
BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\r
-TimerHandle_t xTimerGenericCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
\r
#ifdef __cplusplus\r
}\r
* Implementation of functions defined in portable.h for the ARM CM3 port.\r
*----------------------------------------------------------*/\r
\r
+#error This port is not currently supported in this V9.0.0 revision number but will be by the final release. For now use V8.2.3 instead.\r
+ \r
/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
all the API functions to use the MPU wrappers. That should only be done when\r
task.h is included from an application file. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void *MPU_pvPortMalloc( size_t xSize )\r
-{\r
-void *pvReturn;\r
-BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ \r
+ void *MPU_pvPortMalloc( size_t xSize )\r
+ {\r
+ void *pvReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
- pvReturn = pvPortMalloc( xSize );\r
+ pvReturn = pvPortMalloc( xSize );\r
\r
- portRESET_PRIVILEGE( xRunningPrivileged );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
\r
- return pvReturn;\r
-}\r
+ return pvReturn;\r
+ }\r
+ \r
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
-void MPU_vPortFree( void *pv )\r
-{\r
-BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
\r
- vPortFree( pv );\r
+ void MPU_vPortFree( void *pv )\r
+ {\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
- portRESET_PRIVILEGE( xRunningPrivileged );\r
-}\r
+ vPortFree( pv );\r
+\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+ \r
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
void MPU_vPortInitialiseBlocks( void )\r
#error configMAX_API_CALL_INTERRUPT_PRIORITY must be between 2 and 15\r
#endif\r
\r
+#if( ( configSUPPORT_FPU == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) )\r
+ #error configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 to use this port with an FPU\r
+#endif\r
+\r
/* A critical section is exited when the critical section nesting count reaches\r
this value. */\r
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
BaseType_t xReturn;\r
\r
xReturn = prvCheckValidityOfVectorNumber( ulVectorNumber );\r
- \r
+\r
if( xReturn != pdFAIL )\r
{\r
taskENTER_CRITICAL();\r
#include <xintc_i.h>\r
#include <xtmrctr.h>\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 to use this port.\r
+#endif\r
+\r
/* Tasks are started with interrupts enabled. */\r
#define portINITIAL_MSR_STATE ( ( StackType_t ) 0x02 )\r
\r
debugging. */\r
#define portISR_STACK_FILL_VALUE 0x55555555\r
\r
-/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task \r
+/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task\r
maintains it's own count, so this variable is saved as part of the task\r
context. */\r
volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE;\r
static void prvSetupTimerInterrupt( void );\r
/*-----------------------------------------------------------*/\r
\r
-/* \r
- * Initialise the stack of a task to look exactly as if a call to \r
+/*\r
+ * Initialise the stack of a task to look exactly as if a call to\r
* portSAVE_CONTEXT had been made.\r
- * \r
+ *\r
* See the header file portable.h.\r
*/\r
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;\r
const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;\r
\r
- /* Place a few bytes of known values on the bottom of the stack. \r
+ /* Place a few bytes of known values on the bottom of the stack.\r
This is essential for the Microblaze port and these lines must\r
- not be omitted. The parameter value will overwrite the \r
+ not be omitted. The parameter value will overwrite the\r
0x22222222 value during the function prologue. */\r
*pxTopOfStack = ( StackType_t ) 0x11111111;\r
pxTopOfStack--;\r
*pxTopOfStack = ( StackType_t ) 0x22222222;\r
pxTopOfStack--;\r
*pxTopOfStack = ( StackType_t ) 0x33333333;\r
- pxTopOfStack--; \r
+ pxTopOfStack--;\r
\r
/* First stack an initial value for the critical section nesting. This\r
is initialised to zero as tasks are started with interrupts enabled. */\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- * Manual context switch called by portYIELD or taskYIELD. \r
+ * Manual context switch called by portYIELD or taskYIELD.\r
*/\r
void vPortYield( void )\r
{\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- * Hardware initialisation to generate the RTOS tick. \r
+ * Hardware initialisation to generate the RTOS tick.\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
XTmrCtr_mSetLoadReg( XPAR_OPB_TIMER_1_BASEADDR, portCOUNTER_0, ulCounterValue );\r
XTmrCtr_mSetControlStatusReg( XPAR_OPB_TIMER_1_BASEADDR, portCOUNTER_0, XTC_CSR_LOAD_MASK | XTC_CSR_INT_OCCURED_MASK );\r
\r
- /* Set the timer interrupt enable bit while maintaining the other bit \r
+ /* Set the timer interrupt enable bit while maintaining the other bit\r
states. */\r
uxMask = XIntc_In32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ) );\r
uxMask |= XPAR_OPB_TIMER_1_INTERRUPT_MASK;\r
- XIntc_Out32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ), ( uxMask ) ); \r
- \r
+ XIntc_Out32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ), ( uxMask ) );\r
+\r
XTmrCtr_Start( &xTimer, XPAR_OPB_TIMER_1_DEVICE_ID );\r
XTmrCtr_mSetControlStatusReg(XPAR_OPB_TIMER_1_BASEADDR, portCOUNTER_0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK | XTC_CSR_INT_OCCURED_MASK );\r
XIntc_mAckIntr( XPAR_INTC_SINGLE_BASEADDR, 1 );\r
/*\r
* The interrupt handler placed in the interrupt vector when the scheduler is\r
* started. The task context has already been saved when this is called.\r
- * This handler determines the interrupt source and calls the relevant \r
+ * This handler determines the interrupt source and calls the relevant\r
* peripheral handler.\r
*/\r
void vTaskISRHandler( void )\r
{\r
-static uint32_t ulPending; \r
+static uint32_t ulPending;\r
\r
/* Which interrupts are pending? */\r
ulPending = XIntc_In32( ( XPAR_INTC_SINGLE_BASEADDR + XIN_IVR_OFFSET ) );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-/* \r
+/*\r
* Handler for the timer interrupt.\r
*/\r
void vTickISR( void *pvBaseAddress )\r
}\r
\r
/* Clear the timer interrupt */\r
- ulCSR = XTmrCtr_mGetControlStatusReg(XPAR_OPB_TIMER_1_BASEADDR, 0); \r
+ ulCSR = XTmrCtr_mGetControlStatusReg(XPAR_OPB_TIMER_1_BASEADDR, 0);\r
XTmrCtr_mSetControlStatusReg( XPAR_OPB_TIMER_1_BASEADDR, portCOUNTER_0, ulCSR );\r
}\r
/*-----------------------------------------------------------*/\r
#ifndef PORTMACRO_H\r
#define PORTMACRO_H\r
\r
-#include <Windows.h>\r
\r
/******************************************************************************\r
Defines\r
\r
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0\r
+#endif\r
+\r
/* A few bytes might be lost to byte aligning the heap start address. */\r
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )\r
\r
\r
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0\r
+#endif\r
+\r
/* A few bytes might be lost to byte aligning the heap start address. */\r
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )\r
\r
\r
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0\r
+#endif\r
+\r
/*-----------------------------------------------------------*/\r
\r
void *pvPortMalloc( size_t xWantedSize )\r
\r
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0\r
+#endif\r
+\r
/* Block sizes must not get too small. */\r
#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) )\r
\r
\r
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0\r
+#endif\r
+\r
/* Block sizes must not get too small. */\r
#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) )\r
\r
value is for all interrupts to be enabled. */\r
#define portINITIAL_SR ( 0UL )\r
\r
-/* Dimensions the array into which the floating point context is saved. \r
+/* Dimensions the array into which the floating point context is saved.\r
Allocate enough space for FPR0 to FPR15, FPUL and FPSCR, each of which is 4\r
bytes big. If this number is changed then the 72 in portasm.src also needs\r
changing. */\r
#define portFLOP_REGISTERS_TO_STORE ( 18 )\r
#define portFLOP_STORAGE_SIZE ( portFLOP_REGISTERS_TO_STORE * 4 )\r
\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )\r
+ #error configSUPPORT_DYNAMIC_ALLOCATION must be 1 to use this port.\r
+#endif\r
+\r
/*-----------------------------------------------------------*/\r
\r
/*\r
\r
/*-----------------------------------------------------------*/\r
\r
-/* \r
- * See header file for description. \r
+/*\r
+ * See header file for description.\r
*/\r
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
pxTopOfStack--;\r
\r
/* SR. */\r
- *pxTopOfStack = portINITIAL_SR; \r
+ *pxTopOfStack = portINITIAL_SR;\r
pxTopOfStack--;\r
- \r
+\r
/* PC. */\r
*pxTopOfStack = ( uint32_t ) pxCode;\r
pxTopOfStack--;\r
- \r
+\r
/* PR. */\r
*pxTopOfStack = 15;\r
pxTopOfStack--;\r
- \r
+\r
/* 14. */\r
*pxTopOfStack = 14;\r
pxTopOfStack--;\r
/* R1. */\r
*pxTopOfStack = 1;\r
pxTopOfStack--;\r
- \r
+\r
/* R0 */\r
*pxTopOfStack = 0;\r
pxTopOfStack--;\r
- \r
+\r
/* MACL. */\r
*pxTopOfStack = 16;\r
pxTopOfStack--;\r
- \r
+\r
/* MACH. */\r
*pxTopOfStack = 17;\r
pxTopOfStack--;\r
- \r
+\r
/* GBR. */\r
*pxTopOfStack = ulPortGetGBR();\r
- \r
+\r
/* GBR = global base register.\r
VBR = vector base register.\r
TBR = jump table base register.\r
extern void vApplicationSetupTimerInterrupt( void );\r
\r
/* Call an application function to set up the timer that will generate the\r
- tick interrupt. This way the application can decide which peripheral to \r
+ tick interrupt. This way the application can decide which peripheral to\r
use. A demo application is provided to show a suitable example. */\r
vApplicationSetupTimerInterrupt();\r
\r
\r
/* taskYIELD() can only be called from a task, not an interrupt, so the\r
current interrupt mask can only be 0 or portKERNEL_INTERRUPT_PRIORITY and\r
- the mask can be set without risk of accidentally lowering the mask value. */ \r
+ the mask can be set without risk of accidentally lowering the mask value. */\r
set_imask( portKERNEL_INTERRUPT_PRIORITY );\r
- \r
+\r
trapa( portYIELD_TRAP_NO );\r
- \r
+\r
/* Restore the interrupt mask to whatever it was previously (when the\r
function was entered). */\r
set_imask( ( int ) lInterruptMask );\r
\r
/* Allocate a buffer large enough to hold all the flop registers. */\r
pulFlopBuffer = ( uint32_t * ) pvPortMalloc( portFLOP_STORAGE_SIZE );\r
- \r
+\r
if( pulFlopBuffer != NULL )\r
{\r
/* Start with the registers in a benign state. */\r
memset( ( void * ) pulFlopBuffer, 0x00, portFLOP_STORAGE_SIZE );\r
- \r
+\r
/* The first thing to get saved in the buffer is the FPSCR value -\r
initialise this to the current FPSCR value. */\r
*pulFlopBuffer = get_fpscr();\r
- \r
- /* Use the task tag to point to the flop buffer. Pass pointer to just \r
+\r
+ /* Use the task tag to point to the flop buffer. Pass pointer to just\r
above the buffer because the flop save routine uses a pre-decrement. */\r
- vTaskSetApplicationTaskTag( xTask, ( void * ) ( pulFlopBuffer + portFLOP_REGISTERS_TO_STORE ) ); \r
+ vTaskSetApplicationTaskTag( xTask, ( void * ) ( pulFlopBuffer + portFLOP_REGISTERS_TO_STORE ) );\r
xReturn = pdPASS;\r
}\r
else\r
{\r
xReturn = pdFAIL;\r
}\r
- \r
+\r
return xReturn;\r
}\r
/*-----------------------------------------------------------*/\r
/*\r
Changes from V3.2.1\r
+ CallReturn Depth increased from 8 to 10 levels to accomodate wizC/fedC V12.\r
- \r
+\r
Changes from V3.2.0\r
+ TBLPTRU is now initialised to zero during the initial stack creation of a new task. This solves\r
an error on devices with more than 64kB ROM.\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- * We initialise ucCriticalNesting to the middle value an \r
+ * We initialise ucCriticalNesting to the middle value an\r
* uint8_t can contain. This way portENTER_CRITICAL()\r
* and portEXIT_CRITICAL() can be called without interrupts\r
* being enabled before the scheduler starts.\r
\r
/*-----------------------------------------------------------*/\r
\r
-/* \r
+/*\r
* Initialise the stack of a new task.\r
- * See portSAVE_CONTEXT macro for description. \r
+ * See portSAVE_CONTEXT macro for description.\r
*/\r
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
ucScratch = PRODL;\r
\r
/*\r
- * Place a few bytes of known values on the bottom of the stack. \r
+ * Place a few bytes of known values on the bottom of the stack.\r
* This is just useful for debugging.\r
*/\r
// *pxTopOfStack-- = 0x11;\r
{\r
*pxTopOfStack-- = ( StackType_t ) 0;\r
}\r
- \r
+\r
/*\r
* The only function return address so far is the address of the task entry.\r
- * The order is TOSU/TOSH/TOSL. For devices > 64kB, TOSU is put on the \r
+ * The order is TOSU/TOSH/TOSL. For devices > 64kB, TOSU is put on the\r
* stack, too. TOSU is always written as zero here because wizC does not allow\r
* functionpointers to point above 64kB in ROM.\r
*/\r
\r
/*\r
* The code generated by wizC does not maintain separate\r
- * stack and frame pointers. Therefore the portENTER_CRITICAL macro cannot \r
+ * stack and frame pointers. Therefore the portENTER_CRITICAL macro cannot\r
* use the stack as per other ports. Instead a variable is used to keep\r
* track of the critical section nesting. This variable has to be stored\r
* as part of the task context and is initially set to zero.\r
*/\r
- *pxTopOfStack-- = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack-- = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;\r
\r
return pxTopOfStack;\r
}\r
/*\r
* Setup a timer for the tick ISR for the preemptive scheduler.\r
*/\r
- portSetupTick(); \r
+ portSetupTick();\r
\r
/*\r
* Restore the context of the first task to run.\r
*/\r
portRESTORE_CONTEXT();\r
}\r
-\r
/*-----------------------------------------------------------*/\r
\r
-void *pvPortMalloc( uint16_t usWantedSize )\r
-{\r
-void *pvReturn;\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
\r
- vTaskSuspendAll();\r
+ void *pvPortMalloc( uint16_t usWantedSize )\r
{\r
- pvReturn = malloc( ( malloc_t ) usWantedSize );\r
+ void *pvReturn;\r
+\r
+ vTaskSuspendAll();\r
+ {\r
+ pvReturn = malloc( ( malloc_t ) usWantedSize );\r
+ }\r
+ xTaskResumeAll();\r
+\r
+ return pvReturn;\r
}\r
- xTaskResumeAll();\r
\r
- return pvReturn;\r
-}\r
+#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
-void vPortFree( void *pv )\r
-{\r
- if( pv )\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+\r
+ void vPortFree( void *pv )\r
{\r
- vTaskSuspendAll();\r
+ if( pv )\r
{\r
- free( pv );\r
+ vTaskSuspendAll();\r
+ {\r
+ free( pv );\r
+ }\r
+ xTaskResumeAll();\r
}\r
- xTaskResumeAll();\r
}\r
-}\r
+\r
+#endif /* configSUPPORT_STATIC_ALLOCATION */
\ No newline at end of file
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */\r
\r
\r
-/* Constants used with the xRxLock and xTxLock structure members. */\r
-#define queueUNLOCKED ( ( BaseType_t ) -1 )\r
-#define queueLOCKED_UNMODIFIED ( ( BaseType_t ) 0 )\r
+/* Constants used with the cRxLock and cTxLock structure members. */\r
+#define queueUNLOCKED ( ( int8_t ) -1 )\r
+#define queueLOCKED_UNMODIFIED ( ( int8_t ) 0 )\r
\r
/* When the Queue_t structure is used to represent a base queue its pcHead and\r
pcTail members are used as pointers into the queue storage area. When the\r
#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 )\r
#define queueMUTEX_GIVE_BLOCK_TIME ( ( TickType_t ) 0U )\r
\r
-/* Bits that can be set in xQUEUE->ucStaticAllocationFlags to indicate that the\r
-queue storage area and queue structure were statically allocated respectively.\r
-When these are statically allocated they won't be freed if the queue gets\r
-deleted. */\r
-#define queueSTATICALLY_ALLOCATED_STORAGE ( ( uint8_t ) 0x01 )\r
-#define queueSTATICALLY_ALLOCATED_QUEUE_STRUCT ( ( uint8_t ) 0x02 )\r
-\r
#if( configUSE_PREEMPTION == 0 )\r
/* If the cooperative scheduler is being used then a yield should not be\r
performed just because a higher priority task has been woken. */\r
UBaseType_t uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */\r
UBaseType_t uxItemSize; /*< The size of each items that the queue will hold. */\r
\r
- volatile BaseType_t xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
- volatile BaseType_t xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
+ volatile int8_t cRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
+ volatile int8_t cTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
+\r
+ #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
+ uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */\r
+ #endif\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
struct QueueDefinition *pxQueueSetContainer;\r
uint8_t ucQueueType;\r
#endif\r
\r
- #if ( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- uint8_t ucStaticAllocationFlags;\r
- #endif\r
-\r
} xQUEUE;\r
\r
/* The old xQUEUE name is maintained above then typedefed to the new Queue_t\r
*/\r
static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;\r
\r
-/*\r
- * A queue requires two blocks of memory; a structure to hold the queue state\r
- * and a storage area to hold the items in the queue. The memory is assigned\r
- * by prvAllocateQueueMemory(). If ppucQueueStorage is NULL then the queue\r
- * storage will allocated dynamically, otherwise the buffer passed in\r
- * ppucQueueStorage will be used. If pxStaticQueue is NULL then the queue\r
- * structure will be allocated dynamically, otherwise the buffer pointed to by\r
- * pxStaticQueue will be used.\r
- */\r
-static Queue_t *prvAllocateQueueMemory( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t **ppucQueueStorage, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;\r
-\r
#if ( configUSE_QUEUE_SETS == 1 )\r
/*\r
* Checks to see if a queue is a member of a queue set, and if so, notifies\r
static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
+/*\r
+ * Called after a Queue_t structure has been allocated either statically or\r
+ * dynamically to fill in the structure's members.\r
+ */\r
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;\r
+\r
+/*\r
+ * Mutexes are a special type of queue. When a mutex is created, first the\r
+ * queue is created, then prvInitialiseMutex() is called to configure the queue\r
+ * as a mutex.\r
+ */\r
+static void prvInitialiseMutex( Queue_t *pxNewQueue );\r
+\r
/*-----------------------------------------------------------*/\r
\r
/*\r
#define prvLockQueue( pxQueue ) \\r
taskENTER_CRITICAL(); \\r
{ \\r
- if( ( pxQueue )->xRxLock == queueUNLOCKED ) \\r
+ if( ( pxQueue )->cRxLock == queueUNLOCKED ) \\r
{ \\r
- ( pxQueue )->xRxLock = queueLOCKED_UNMODIFIED; \\r
+ ( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED; \\r
} \\r
- if( ( pxQueue )->xTxLock == queueUNLOCKED ) \\r
+ if( ( pxQueue )->cTxLock == queueUNLOCKED ) \\r
{ \\r
- ( pxQueue )->xTxLock = queueLOCKED_UNMODIFIED; \\r
+ ( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED; \\r
} \\r
} \\r
taskEXIT_CRITICAL()\r
pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;\r
pxQueue->pcWriteTo = pxQueue->pcHead;\r
pxQueue->u.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - ( UBaseType_t ) 1U ) * pxQueue->uxItemSize );\r
- pxQueue->xRxLock = queueUNLOCKED;\r
- pxQueue->xTxLock = queueUNLOCKED;\r
+ pxQueue->cRxLock = queueUNLOCKED;\r
+ pxQueue->cTxLock = queueUNLOCKED;\r
\r
if( xNewQueue == pdFALSE )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static Queue_t *prvAllocateQueueMemory( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t **ppucQueueStorage, StaticQueue_t *pxStaticQueue )\r
-{\r
-Queue_t *pxNewQueue;\r
-size_t xQueueSizeInBytes;\r
-\r
- configASSERT( uxQueueLength > ( UBaseType_t ) 0 );\r
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
\r
- #if( ( configASSERT_DEFINED == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
+ QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )\r
{\r
- /* Sanity check that the size of the structure used to declare a\r
- variable of type StaticQueue_t or StaticSemaphore_t equals the size of\r
- the real queue and semaphore structures. */\r
- volatile size_t xSize = sizeof( StaticQueue_t );\r
- configASSERT( xSize == sizeof( Queue_t ) );\r
- }\r
- #endif /* configASSERT_DEFINED */\r
+ Queue_t *pxNewQueue;\r
\r
- if( uxItemSize == ( UBaseType_t ) 0 )\r
- {\r
- /* There is not going to be a queue storage area. */\r
- xQueueSizeInBytes = ( size_t ) 0;\r
- }\r
- else\r
- {\r
- /* Allocate enough space to hold the maximum number of items that can be\r
- in the queue at any time. */\r
- xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
- }\r
+ configASSERT( uxQueueLength > ( UBaseType_t ) 0 );\r
\r
- #if( configSUPPORT_STATIC_ALLOCATION == 0 )\r
- {\r
- /* Allocate the new queue structure and storage area. */\r
- pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes );\r
+ /* The StaticQueue_t structure and the queue storage area must be\r
+ supplied. */\r
+ configASSERT( pxStaticQueue != NULL );\r
+\r
+ /* A queue storage area should be provided if the item size is not 0, and\r
+ should not be provided if the item size is 0. */\r
+ configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );\r
+ configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );\r
+\r
+ #if( configASSERT_DEFINED == 1 )\r
+ {\r
+ /* Sanity check that the size of the structure used to declare a\r
+ variable of type StaticQueue_t or StaticSemaphore_t equals the size of\r
+ the real queue and semaphore structures. */\r
+ volatile size_t xSize = sizeof( StaticQueue_t );\r
+ configASSERT( xSize == sizeof( Queue_t ) );\r
+ }\r
+ #endif /* configASSERT_DEFINED */\r
+\r
+ /* The address of a statically allocated queue was passed in, use it.\r
+ The address of a statically allocated storage area was also passed in\r
+ but is already set. */\r
+ pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */\r
\r
if( pxNewQueue != NULL )\r
{\r
- /* Jump past the queue structure to find the location of the queue\r
- storage area. */\r
- *ppucQueueStorage = ( ( uint8_t * ) pxNewQueue ) + sizeof( Queue_t );\r
+ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ {\r
+ /* Queues can be allocated wither statically or dynamically, so\r
+ note this queue was allocated statically in case the queue is\r
+ later deleted. */\r
+ pxNewQueue->ucStaticallyAllocated = pdTRUE;\r
+ }\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
+\r
+ prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );\r
}\r
\r
- /* The pxStaticQueue parameter is not used. Remove compiler warnings. */\r
- ( void ) pxStaticQueue;\r
+ return pxNewQueue;\r
}\r
- #else\r
+\r
+#endif /* configSUPPORT_STATIC_ALLOCATION */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+\r
+ QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )\r
{\r
- if( pxStaticQueue == NULL )\r
+ Queue_t *pxNewQueue;\r
+ size_t xQueueSizeInBytes;\r
+ uint8_t *pucQueueStorage;\r
+\r
+ configASSERT( uxQueueLength > ( UBaseType_t ) 0 );\r
+\r
+ if( uxItemSize == ( UBaseType_t ) 0 )\r
{\r
- /* A statically allocated queue was not passed in, so create one\r
- dynamically. */\r
- pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) );\r
- pxNewQueue->ucStaticAllocationFlags = 0;\r
+ /* There is not going to be a queue storage area. */\r
+ xQueueSizeInBytes = ( size_t ) 0;\r
}\r
else\r
{\r
- /* The address of a statically allocated queue was passed in, use\r
- it and note that the queue was not dynamically allocated so there is\r
- no attempt to free it again should the queue be deleted. */\r
- pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */\r
- pxNewQueue->ucStaticAllocationFlags = queueSTATICALLY_ALLOCATED_QUEUE_STRUCT;\r
+ /* Allocate enough space to hold the maximum number of items that\r
+ can be in the queue at any time. */\r
+ xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
}\r
\r
+ pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes );\r
+\r
if( pxNewQueue != NULL )\r
{\r
- if( ( *ppucQueueStorage == NULL ) && ( xQueueSizeInBytes > ( size_t ) 0 ) )\r
- {\r
- /* A statically allocated queue storage area was not passed in,\r
- so allocate the queue storage area dynamically. */\r
- *ppucQueueStorage = ( uint8_t * ) pvPortMalloc( xQueueSizeInBytes );\r
-\r
- if( *ppucQueueStorage == NULL )\r
- {\r
- /* The queue storage area could not be created, so free the\r
- queue structure also. */\r
- if( ( pxNewQueue->ucStaticAllocationFlags & queueSTATICALLY_ALLOCATED_QUEUE_STRUCT ) == 0 )\r
- {\r
- vPortFree( ( void * ) pxNewQueue );\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
+ /* Jump past the queue structure to find the location of the queue\r
+ storage area. */\r
+ pucQueueStorage = ( ( uint8_t * ) pxNewQueue ) + sizeof( Queue_t );\r
\r
- pxNewQueue = NULL;\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
- }\r
- else\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
{\r
- /* Note the fact that either the queue storage area was passed\r
- into this function, or the size requirement for the queue\r
- storage area was zero - either way no attempt should be made to\r
- free the queue storage area if the queue is deleted. */\r
- pxNewQueue->ucStaticAllocationFlags |= queueSTATICALLY_ALLOCATED_STORAGE;\r
+ /* Queues can be created either statically or dynamically, so\r
+ note this task was created dynamically in case it is later\r
+ deleted. */\r
+ pxNewQueue->ucStaticallyAllocated = pdFALSE;\r
}\r
+ #endif /* configSUPPORT_STATIC_ALLOCATION */\r
+\r
+ prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );\r
}\r
+\r
+ return pxNewQueue;\r
}\r
- #endif\r
\r
- return pxNewQueue;\r
-}\r
+#endif /* configSUPPORT_STATIC_ALLOCATION */\r
/*-----------------------------------------------------------*/\r
\r
-QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )\r
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )\r
{\r
-Queue_t *pxNewQueue;\r
-\r
/* Remove compiler warnings about unused parameters should\r
configUSE_TRACE_FACILITY not be set to 1. */\r
( void ) ucQueueType;\r
\r
- /* A queue requires a queue structure and a queue storage area. These may\r
- be allocated statically or dynamically, depending on the parameter\r
- values. */\r
- pxNewQueue = prvAllocateQueueMemory( uxQueueLength, uxItemSize, &pucQueueStorage, pxStaticQueue );\r
+ if( uxItemSize == ( UBaseType_t ) 0 )\r
+ {\r
+ /* No RAM was allocated for the queue storage area, but PC head cannot\r
+ be set to NULL because NULL is used as a key to say the queue is used as\r
+ a mutex. Therefore just set pcHead to point to the queue as a benign\r
+ value that is known to be within the memory map. */\r
+ pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;\r
+ }\r
+ else\r
+ {\r
+ /* Set the head to the start of the queue storage area. */\r
+ pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;\r
+ }\r
\r
- if( pxNewQueue != NULL )\r
+ /* Initialise the queue members as described where the queue type is\r
+ defined. */\r
+ pxNewQueue->uxLength = uxQueueLength;\r
+ pxNewQueue->uxItemSize = uxItemSize;\r
+ ( void ) xQueueGenericReset( pxNewQueue, pdTRUE );\r
+\r
+ #if ( configUSE_TRACE_FACILITY == 1 )\r
{\r
- if( uxItemSize == ( UBaseType_t ) 0 )\r
- {\r
- /* No RAM was allocated for the queue storage area, but PC head\r
- cannot be set to NULL because NULL is used as a key to say the queue\r
- is used as a mutex. Therefore just set pcHead to point to the queue\r
- as a benign value that is known to be within the memory map. */\r
- pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;\r
- }\r
- else\r
- {\r
- /* Set the head to the start of the queue storage area. */\r
- pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;\r
- }\r
+ pxNewQueue->ucQueueType = ucQueueType;\r
+ }\r
+ #endif /* configUSE_TRACE_FACILITY */\r
+\r
+ #if( configUSE_QUEUE_SETS == 1 )\r
+ {\r
+ pxNewQueue->pxQueueSetContainer = NULL;\r
+ }\r
+ #endif /* configUSE_QUEUE_SETS */\r
\r
- /* Initialise the queue members as described where the queue type is\r
- defined. */\r
- pxNewQueue->uxLength = uxQueueLength;\r
- pxNewQueue->uxItemSize = uxItemSize;\r
- ( void ) xQueueGenericReset( pxNewQueue, pdTRUE );\r
+ traceQUEUE_CREATE( pxNewQueue );\r
+}\r
+/*-----------------------------------------------------------*/\r
\r
- #if ( configUSE_TRACE_FACILITY == 1 )\r
- {\r
- pxNewQueue->ucQueueType = ucQueueType;\r
- }\r
- #endif /* configUSE_TRACE_FACILITY */\r
+static void prvInitialiseMutex( Queue_t *pxNewQueue )\r
+{\r
+ if( pxNewQueue != NULL )\r
+ {\r
+ /* The queue create function will set all the queue structure members\r
+ correctly for a generic queue, but this function is creating a\r
+ mutex. Overwrite those members that need to be set differently -\r
+ in particular the information required for priority inheritance. */\r
+ pxNewQueue->pxMutexHolder = NULL;\r
+ pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;\r
\r
- #if( configUSE_QUEUE_SETS == 1 )\r
- {\r
- pxNewQueue->pxQueueSetContainer = NULL;\r
- }\r
- #endif /* configUSE_QUEUE_SETS */\r
+ /* In case this is a recursive mutex. */\r
+ pxNewQueue->u.uxRecursiveCallCount = 0;\r
\r
- traceQUEUE_CREATE( pxNewQueue );\r
+ traceCREATE_MUTEX( pxNewQueue );\r
+\r
+ /* Start with the semaphore in the expected state. */\r
+ ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );\r
}\r
else\r
{\r
- mtCOVERAGE_TEST_MARKER();\r
+ traceCREATE_MUTEX_FAILED();\r
}\r
-\r
- configASSERT( pxNewQueue );\r
-\r
- return ( QueueHandle_t ) pxNewQueue;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-#if ( configUSE_MUTEXES == 1 )\r
+#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
\r
- QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )\r
+ QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )\r
{\r
Queue_t *pxNewQueue;\r
const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;\r
\r
- /* Prevent compiler warnings about unused parameters if\r
- configUSE_TRACE_FACILITY does not equal 1. */\r
- ( void ) ucQueueType;\r
+ pxNewQueue = ( Queue_t * ) xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );\r
+ prvInitialiseMutex( pxNewQueue );\r
\r
- pxNewQueue = ( Queue_t * ) xQueueGenericCreate( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );\r
+ return pxNewQueue;\r
+ }\r
\r
- /* Allocate the new queue structure. */\r
- if( pxNewQueue != NULL )\r
- {\r
- /* xQueueGenericCreate() will set all the queue structure members\r
- correctly for a generic queue, but this function is creating a\r
- mutex. Overwrite those members that need to be set differently -\r
- in particular the information required for priority inheritance. */\r
- pxNewQueue->pxMutexHolder = NULL;\r
- pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;\r
+#endif /* configUSE_MUTEXES */\r
+/*-----------------------------------------------------------*/\r
\r
- /* In case this is a recursive mutex. */\r
- pxNewQueue->u.uxRecursiveCallCount = 0;\r
+#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
\r
- traceCREATE_MUTEX( pxNewQueue );\r
+ QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )\r
+ {\r
+ Queue_t *pxNewQueue;\r
+ const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;\r
\r
- /* Start with the semaphore in the expected state. */\r
- ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );\r
- }\r
- else\r
- {\r
- traceCREATE_MUTEX_FAILED();\r
- }\r
+ /* Prevent compiler warnings about unused parameters if\r
+ configUSE_TRACE_FACILITY does not equal 1. */\r
+ ( void ) ucQueueType;\r
+\r
+ pxNewQueue = ( Queue_t * ) xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );\r
+ prvInitialiseMutex( pxNewQueue );\r
\r
return pxNewQueue;\r
}\r
#endif /* configUSE_RECURSIVE_MUTEXES */\r
/*-----------------------------------------------------------*/\r
\r
-#if ( configUSE_COUNTING_SEMAPHORES == 1 )\r
+#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
\r
- QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )\r
+ QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )\r
{\r
QueueHandle_t xHandle;\r
\r
configASSERT( uxMaxCount != 0 );\r
configASSERT( uxInitialCount <= uxMaxCount );\r
\r
- xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );\r
+ xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );\r
\r
if( xHandle != NULL )\r
{\r
traceCREATE_COUNTING_SEMAPHORE_FAILED();\r
}\r
\r
- configASSERT( xHandle );\r
return xHandle;\r
}\r
\r
-#endif /* configUSE_COUNTING_SEMAPHORES */\r
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
+\r
+ QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )\r
+ {\r
+ QueueHandle_t xHandle;\r
+\r
+ configASSERT( uxMaxCount != 0 );\r
+ configASSERT( uxInitialCount <= uxMaxCount );\r
+\r
+ xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );\r
+\r
+ if( xHandle != NULL )\r
+ {\r
+ ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;\r
+\r
+ traceCREATE_COUNTING_SEMAPHORE();\r
+ }\r
+ else\r
+ {\r
+ traceCREATE_COUNTING_SEMAPHORE_FAILED();\r
+ }\r
+\r
+ return xHandle;\r
+ }\r
+\r
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */\r
/*-----------------------------------------------------------*/\r
\r
BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )\r
\r
/* The event list is not altered if the queue is locked. This will\r
be done when the queue is unlocked later. */\r
- if( pxQueue->xTxLock == queueUNLOCKED )\r
+ if( pxQueue->cTxLock == queueUNLOCKED )\r
{\r
#if ( configUSE_QUEUE_SETS == 1 )\r
{\r
{\r
/* Increment the lock count so the task that unlocks the queue\r
knows that data was posted while it was locked. */\r
- ++( pxQueue->xTxLock );\r
+ ++( pxQueue->cTxLock );\r
}\r
\r
xReturn = pdPASS;\r
\r
/* The event list is not altered if the queue is locked. This will\r
be done when the queue is unlocked later. */\r
- if( pxQueue->xTxLock == queueUNLOCKED )\r
+ if( pxQueue->cTxLock == queueUNLOCKED )\r
{\r
#if ( configUSE_QUEUE_SETS == 1 )\r
{\r
{\r
/* Increment the lock count so the task that unlocks the queue\r
knows that data was posted while it was locked. */\r
- ++( pxQueue->xTxLock );\r
+ ++( pxQueue->cTxLock );\r
}\r
\r
xReturn = pdPASS;\r
Instead update the lock count so the task that unlocks the queue\r
will know that an ISR has removed data while the queue was\r
locked. */\r
- if( pxQueue->xRxLock == queueUNLOCKED )\r
+ if( pxQueue->cRxLock == queueUNLOCKED )\r
{\r
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )\r
{\r
{\r
/* Increment the lock count so the task that unlocks the queue\r
knows that data was removed while it was locked. */\r
- ++( pxQueue->xRxLock );\r
+ ++( pxQueue->cRxLock );\r
}\r
\r
xReturn = pdPASS;\r
Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
-\r
traceQUEUE_DELETE( pxQueue );\r
+\r
#if ( configQUEUE_REGISTRY_SIZE > 0 )\r
{\r
vQueueUnregisterQueue( pxQueue );\r
}\r
#endif\r
\r
- #if( configSUPPORT_STATIC_ALLOCATION == 0 )\r
+ #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )\r
{\r
- /* The queue and the queue storage area will have been dynamically\r
- allocated in one go. */\r
+ /* The queue can only have been allocated dynamically - free it\r
+ again. */\r
vPortFree( pxQueue );\r
}\r
- #else\r
+ #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
{\r
- if( ( pxQueue->ucStaticAllocationFlags & queueSTATICALLY_ALLOCATED_STORAGE ) == 0 )\r
+ /* The queue could have been allocated statically or dynamically, so\r
+ check before attempting to free the memory. */\r
+ if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )\r
{\r
- /* The queue storage area was dynamically allocated, so must be\r
- freed. */\r
- vPortFree( pxQueue->pcHead );\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
-\r
- if( ( pxQueue->ucStaticAllocationFlags & queueSTATICALLY_ALLOCATED_QUEUE_STRUCT ) == 0 )\r
- {\r
- /* The queue structure was dynamically allocated, so must be\r
- free. */\r
vPortFree( pxQueue );\r
}\r
else\r
mtCOVERAGE_TEST_MARKER();\r
}\r
}\r
- #endif\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
}\r
/*-----------------------------------------------------------*/\r
\r
taskENTER_CRITICAL();\r
{\r
/* See if data was added to the queue while it was locked. */\r
- while( pxQueue->xTxLock > queueLOCKED_UNMODIFIED )\r
+ while( pxQueue->cTxLock > queueLOCKED_UNMODIFIED )\r
{\r
/* Data was posted while the queue was locked. Are any tasks\r
blocked waiting for data to become available? */\r
}\r
#endif /* configUSE_QUEUE_SETS */\r
\r
- --( pxQueue->xTxLock );\r
+ --( pxQueue->cTxLock );\r
}\r
\r
- pxQueue->xTxLock = queueUNLOCKED;\r
+ pxQueue->cTxLock = queueUNLOCKED;\r
}\r
taskEXIT_CRITICAL();\r
\r
/* Do the same for the Rx lock. */\r
taskENTER_CRITICAL();\r
{\r
- while( pxQueue->xRxLock > queueLOCKED_UNMODIFIED )\r
+ while( pxQueue->cRxLock > queueLOCKED_UNMODIFIED )\r
{\r
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )\r
{\r
mtCOVERAGE_TEST_MARKER();\r
}\r
\r
- --( pxQueue->xRxLock );\r
+ --( pxQueue->cRxLock );\r
}\r
else\r
{\r
}\r
}\r
\r
- pxQueue->xRxLock = queueUNLOCKED;\r
+ pxQueue->cRxLock = queueUNLOCKED;\r
}\r
taskEXIT_CRITICAL();\r
}\r
#endif /* configUSE_TIMERS */\r
/*-----------------------------------------------------------*/\r
\r
-#if ( configUSE_QUEUE_SETS == 1 )\r
+#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
\r
QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )\r
{\r
QueueSetHandle_t pxQueue;\r
\r
- pxQueue = xQueueGenericCreate( uxEventQueueLength, sizeof( Queue_t * ), NULL, NULL, queueQUEUE_TYPE_SET );\r
+ pxQueue = xQueueGenericCreate( uxEventQueueLength, sizeof( Queue_t * ), queueQUEUE_TYPE_SET );\r
\r
return pxQueue;\r
}\r
/* The data copied is the handle of the queue that contains data. */\r
xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, xCopyPosition );\r
\r
- if( pxQueueSetContainer->xTxLock == queueUNLOCKED )\r
+ if( pxQueueSetContainer->cTxLock == queueUNLOCKED )\r
{\r
if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE )\r
{\r
}\r
else\r
{\r
- ( pxQueueSetContainer->xTxLock )++;\r
+ ( pxQueueSetContainer->cTxLock )++;\r
}\r
}\r
else\r
#include <stdio.h>\r
#endif /* configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) */\r
\r
-/* Sanity check the configuration. */\r
-#if( configUSE_TICKLESS_IDLE != 0 )\r
- #if( INCLUDE_vTaskSuspend != 1 )\r
- #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0\r
- #endif /* INCLUDE_vTaskSuspend */\r
-#endif /* configUSE_TICKLESS_IDLE */\r
-\r
-#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION != 1 ) )\r
- #error configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h when the MPU is used.\r
-#endif\r
-\r
-/*\r
- * Defines the size, in words, of the stack allocated to the idle task.\r
- */\r
-#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE\r
-\r
#if( configUSE_PREEMPTION == 0 )\r
/* If the cooperative scheduler is being used then a yield should not be\r
performed just because a higher priority task has been woken. */\r
#define taskYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()\r
#endif\r
\r
-/* Bits that can be set in tskTCB->ucStaticAllocationFlags to indicate that the\r
-stack and TCB were statically allocated respectively. When these are statically\r
-allocated they won't be freed if the task using the stack and TCB gets\r
-deleted. */\r
-#define taskSTATICALLY_ALLOCATED_STACK ( ( uint8_t ) 0x01 )\r
-#define taskSTATICALLY_ALLOCATED_TCB ( ( uint8_t ) 0x02 )\r
-\r
/* Values that can be assigned to the ucNotifyState member of the TCB. */\r
#define taskNOT_WAITING_NOTIFICATION ( ( uint8_t ) 0 )\r
#define taskWAITING_NOTIFICATION ( ( uint8_t ) 1 )\r
#define taskNOTIFICATION_RECEIVED ( ( uint8_t ) 2 )\r
\r
-/*\r
- * Task control block. A task control block (TCB) is allocated for each task,\r
- * and stores task state information, including a pointer to the task's context\r
- * (the task's run time environment, including register values)\r
- */\r
-typedef struct tskTaskControlBlock\r
-{\r
- volatile StackType_t *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */\r
-\r
- #if ( portUSING_MPU_WRAPPERS == 1 )\r
- xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer. THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */\r
- #endif\r
-\r
- ListItem_t xStateListItem; /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */\r
- ListItem_t xEventListItem; /*< Used to reference a task from an event list. */\r
- UBaseType_t uxPriority; /*< The priority of the task. 0 is the lowest priority. */\r
- StackType_t *pxStack; /*< Points to the start of the stack. */\r
- char pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
-\r
- #if ( portSTACK_GROWTH > 0 )\r
- StackType_t *pxEndOfStack; /*< Points to the end of the stack on architectures where the stack grows up from low memory. */\r
- #endif\r
-\r
- #if ( portCRITICAL_NESTING_IN_TCB == 1 )\r
- UBaseType_t uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */\r
- #endif\r
-\r
- #if ( configUSE_TRACE_FACILITY == 1 )\r
- UBaseType_t uxTCBNumber; /*< Stores a number that increments each time a TCB is created. It allows debuggers to determine when a task has been deleted and then recreated. */\r
- UBaseType_t uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */\r
- #endif\r
-\r
- #if ( configUSE_MUTEXES == 1 )\r
- UBaseType_t uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */\r
- UBaseType_t uxMutexesHeld;\r
- #endif\r
-\r
- #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
- TaskHookFunction_t pxTaskTag;\r
- #endif\r
-\r
- #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )\r
- void *pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];\r
- #endif\r
-\r
- #if( configGENERATE_RUN_TIME_STATS == 1 )\r
- uint32_t ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */\r
- #endif\r
-\r
- #if ( configUSE_NEWLIB_REENTRANT == 1 )\r
- /* Allocate a Newlib reent structure that is specific to this task.\r
- Note Newlib support has been included by popular demand, but is not\r
- used by the FreeRTOS maintainers themselves. FreeRTOS is not\r
- responsible for resulting newlib operation. User must be familiar with\r
- newlib and must provide system-wide implementations of the necessary\r
- stubs. Be warned that (at the time of writing) the current newlib design\r
- implements a system-wide malloc() that must be provided with locks. */\r
- struct _reent xNewLib_reent;\r
- #endif\r
-\r
- #if( configUSE_TASK_NOTIFICATIONS == 1 )\r
- volatile uint32_t ulNotifiedValue;\r
- volatile uint8_t ucNotifyState;\r
- #endif\r
-\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- uint8_t ucStaticAllocationFlags; /* Set to pdTRUE if the stack is a statically allocated array, and pdFALSE if the stack is dynamically allocated. */\r
- #endif\r
-\r
- #if( INCLUDE_xTaskAbortDelay == 1 )\r
- uint8_t ucDelayAborted;\r
- #endif\r
-\r
-} tskTCB;\r
-\r
-/* The old tskTCB name is maintained above then typedefed to the new TCB_t name\r
-below to enable the use of older kernel aware debuggers. */\r
-typedef tskTCB TCB_t;\r
-\r
-/*\r
- * Some kernel aware debuggers require the data the debugger needs access to be\r
- * global, rather than file scope.\r
- */\r
-#ifdef portREMOVE_STATIC_QUALIFIER\r
- #define static\r
-#endif\r
-\r
-/*lint -e956 A manual analysis and inspection has been used to determine which\r
-static variables must be declared volatile. */\r
-\r
-PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;\r
-\r
-/* Lists for ready and blocked tasks. --------------------*/\r
-PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */\r
-PRIVILEGED_DATA static List_t xDelayedTaskList1; /*< Delayed tasks. */\r
-PRIVILEGED_DATA static List_t xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */\r
-PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */\r
-PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */\r
-PRIVILEGED_DATA static List_t xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready list when the scheduler is resumed. */\r
-\r
-#if ( INCLUDE_vTaskDelete == 1 )\r
-\r
- PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */\r
- PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;\r
-\r
-#endif\r
-\r
-#if ( INCLUDE_vTaskSuspend == 1 )\r
-\r
- PRIVILEGED_DATA static List_t xSuspendedTaskList; /*< Tasks that are currently suspended. */\r
-\r
-#endif\r
-\r
-/* Other file private variables. --------------------------------*/\r
-PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks = ( UBaseType_t ) 0U;\r
-PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) 0U;\r
-PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY;\r
-PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE;\r
-PRIVILEGED_DATA static volatile UBaseType_t uxPendedTicks = ( UBaseType_t ) 0U;\r
-PRIVILEGED_DATA static volatile BaseType_t xYieldPending = pdFALSE;\r
-PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0;\r
-PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U;\r
-PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */\r
-PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = NULL; /*< Holds the handle of the idle task. The idle task is created automatically when the scheduler is started. */\r
-\r
-/* Context switches are held pending while the scheduler is suspended. Also,\r
-interrupts must not manipulate the xStateListItem of a TCB, or any of the\r
-lists the xStateListItem can be referenced from, if the scheduler is suspended.\r
-If an interrupt needs to unblock a task while the scheduler is suspended then it\r
-moves the task's event list item into the xPendingReadyList, ready for the\r
-kernel to move the task from the pending ready list into the real ready list\r
-when the scheduler is unsuspended. The pending ready list itself can only be\r
-accessed from a critical section. */\r
-PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended = ( UBaseType_t ) pdFALSE;\r
-\r
-#if ( configGENERATE_RUN_TIME_STATS == 1 )\r
-\r
- PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */\r
- PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */\r
-\r
-#endif\r
-\r
-/*lint +e956 */\r
-\r
-/* Debugging and trace facilities private variables and macros. ------------*/\r
-\r
/*\r
* The value used to fill the stack of a task when the task is created. This\r
* is used purely for checking the high water mark for tasks.\r
#define tskDELETED_CHAR ( 'D' )\r
#define tskSUSPENDED_CHAR ( 'S' )\r
\r
-/*-----------------------------------------------------------*/\r
+/*\r
+ * Some kernel aware debuggers require the data the debugger needs access to be\r
+ * global, rather than file scope.\r
+ */\r
+#ifdef portREMOVE_STATIC_QUALIFIER\r
+ #define static\r
+#endif\r
\r
#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )\r
\r
#define taskEVENT_LIST_ITEM_VALUE_IN_USE 0x80000000UL\r
#endif\r
\r
+/*\r
+ * Task control block. A task control block (TCB) is allocated for each task,\r
+ * and stores task state information, including a pointer to the task's context\r
+ * (the task's run time environment, including register values)\r
+ */\r
+typedef struct tskTaskControlBlock\r
+{\r
+ volatile StackType_t *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */\r
+\r
+ #if ( portUSING_MPU_WRAPPERS == 1 )\r
+ xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer. THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */\r
+ #endif\r
+\r
+ ListItem_t xStateListItem; /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */\r
+ ListItem_t xEventListItem; /*< Used to reference a task from an event list. */\r
+ UBaseType_t uxPriority; /*< The priority of the task. 0 is the lowest priority. */\r
+ StackType_t *pxStack; /*< Points to the start of the stack. */\r
+ char pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+\r
+ #if ( portSTACK_GROWTH > 0 )\r
+ StackType_t *pxEndOfStack; /*< Points to the end of the stack on architectures where the stack grows up from low memory. */\r
+ #endif\r
+\r
+ #if ( portCRITICAL_NESTING_IN_TCB == 1 )\r
+ UBaseType_t uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */\r
+ #endif\r
+\r
+ #if ( configUSE_TRACE_FACILITY == 1 )\r
+ UBaseType_t uxTCBNumber; /*< Stores a number that increments each time a TCB is created. It allows debuggers to determine when a task has been deleted and then recreated. */\r
+ UBaseType_t uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */\r
+ #endif\r
+\r
+ #if ( configUSE_MUTEXES == 1 )\r
+ UBaseType_t uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */\r
+ UBaseType_t uxMutexesHeld;\r
+ #endif\r
+\r
+ #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ TaskHookFunction_t pxTaskTag;\r
+ #endif\r
+\r
+ #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )\r
+ void *pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];\r
+ #endif\r
+\r
+ #if( configGENERATE_RUN_TIME_STATS == 1 )\r
+ uint32_t ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */\r
+ #endif\r
+\r
+ #if ( configUSE_NEWLIB_REENTRANT == 1 )\r
+ /* Allocate a Newlib reent structure that is specific to this task.\r
+ Note Newlib support has been included by popular demand, but is not\r
+ used by the FreeRTOS maintainers themselves. FreeRTOS is not\r
+ responsible for resulting newlib operation. User must be familiar with\r
+ newlib and must provide system-wide implementations of the necessary\r
+ stubs. Be warned that (at the time of writing) the current newlib design\r
+ implements a system-wide malloc() that must be provided with locks. */\r
+ struct _reent xNewLib_reent;\r
+ #endif\r
+\r
+ #if( configUSE_TASK_NOTIFICATIONS == 1 )\r
+ volatile uint32_t ulNotifiedValue;\r
+ volatile uint8_t ucNotifyState;\r
+ #endif\r
+\r
+ #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
+ uint8_t ucStaticallyAllocated; /* Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */\r
+ #endif\r
+\r
+ #if( INCLUDE_xTaskAbortDelay == 1 )\r
+ uint8_t ucDelayAborted;\r
+ #endif\r
+\r
+} tskTCB;\r
+\r
+/* The old tskTCB name is maintained above then typedefed to the new TCB_t name\r
+below to enable the use of older kernel aware debuggers. */\r
+typedef tskTCB TCB_t;\r
+\r
+/*lint -e956 A manual analysis and inspection has been used to determine which\r
+static variables must be declared volatile. */\r
+\r
+PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;\r
+\r
+/* Lists for ready and blocked tasks. --------------------*/\r
+PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */\r
+PRIVILEGED_DATA static List_t xDelayedTaskList1; /*< Delayed tasks. */\r
+PRIVILEGED_DATA static List_t xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */\r
+PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */\r
+PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */\r
+PRIVILEGED_DATA static List_t xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready list when the scheduler is resumed. */\r
+\r
+#if( ( INCLUDE_vTaskDelete == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
+\r
+ PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */\r
+ PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;\r
+\r
+#endif\r
+\r
+#if ( INCLUDE_vTaskSuspend == 1 )\r
+\r
+ PRIVILEGED_DATA static List_t xSuspendedTaskList; /*< Tasks that are currently suspended. */\r
+\r
+#endif\r
+\r
+/* Other file private variables. --------------------------------*/\r
+PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks = ( UBaseType_t ) 0U;\r
+PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) 0U;\r
+PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY;\r
+PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE;\r
+PRIVILEGED_DATA static volatile UBaseType_t uxPendedTicks = ( UBaseType_t ) 0U;\r
+PRIVILEGED_DATA static volatile BaseType_t xYieldPending = pdFALSE;\r
+PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0;\r
+PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U;\r
+PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */\r
+PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = NULL; /*< Holds the handle of the idle task. The idle task is created automatically when the scheduler is started. */\r
+\r
+/* Context switches are held pending while the scheduler is suspended. Also,\r
+interrupts must not manipulate the xStateListItem of a TCB, or any of the\r
+lists the xStateListItem can be referenced from, if the scheduler is suspended.\r
+If an interrupt needs to unblock a task while the scheduler is suspended then it\r
+moves the task's event list item into the xPendingReadyList, ready for the\r
+kernel to move the task from the pending ready list into the real ready list\r
+when the scheduler is unsuspended. The pending ready list itself can only be\r
+accessed from a critical section. */\r
+PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended = ( UBaseType_t ) pdFALSE;\r
+\r
+#if ( configGENERATE_RUN_TIME_STATS == 1 )\r
+\r
+ PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */\r
+ PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */\r
+\r
+#endif\r
+\r
+/*lint +e956 */\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
/* Callback function prototypes. --------------------------*/\r
#if( configCHECK_FOR_STACK_OVERFLOW > 0 )\r
extern void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName );\r
\r
/* File private functions. --------------------------------*/\r
\r
-/*\r
- * Utility to ready a TCB for a given task. Mainly just copies the parameters\r
- * into the TCB structure.\r
- */\r
-static void prvInitialiseTCBVariables( TCB_t * const pxTCB, const char * const pcName, UBaseType_t uxPriority, const MemoryRegion_t * const xRegions, const uint16_t usStackDepth ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
-\r
/**\r
* Utility task that simply returns pdTRUE if the task referenced by xTask is\r
* currently in the Suspended state, or pdFALSE if the task referenced by xTask\r
*/\r
static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) PRIVILEGED_FUNCTION;\r
\r
-/*\r
- * Allocates memory from the heap for a TCB and associated stack. Checks the\r
- * allocation was successful.\r
- */\r
-static TCB_t *prvAllocateTCBAndStack( const uint16_t usStackDepth, StackType_t * const puxStackBuffer, TCB_t * const pucTCBBuffer ) PRIVILEGED_FUNCTION;\r
-\r
/*\r
* Fills an TaskStatus_t structure with information on each task that is\r
* referenced from the pxList list (which may be a ready list, a delayed list,\r
static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName ) PRIVILEGED_FUNCTION;\r
\r
#endif\r
+\r
+/*\r
+ * Called after a Task_t structure has been allocated either statically or\r
+ * dynamically to fill in the structure's members.\r
+ */\r
+static void prvInitialiseNewTask( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+\r
+/*\r
+ * Called after a new task has been created and initialised to place the task\r
+ * under the control of the scheduler.\r
+ */\r
+static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+\r
+ BaseType_t xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ {\r
+ TCB_t *pxNewTCB;\r
+ BaseType_t xReturn;\r
+\r
+ configASSERT( puxStackBuffer != NULL );\r
+ configASSERT( pxTaskBuffer != NULL );\r
+\r
+ /* The memory used for the task's TCB and stack are passed into this\r
+ function - use them. */\r
+ pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */\r
+\r
+ if( pxNewTCB != NULL )\r
+ {\r
+ pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;\r
+\r
+ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ {\r
+ /* Tasks can be created statically or dynamically, so note this\r
+ task was created statically in case the task is later deleted. */\r
+ pxNewTCB->ucStaticallyAllocated = pdTRUE;\r
+ }\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
+\r
+ prvInitialiseNewTask( pxTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB );\r
+ prvAddNewTaskToReadyList( pxNewTCB );\r
+ xReturn = pdPASS;\r
+ }\r
+ else\r
+ {\r
+ xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;\r
+ }\r
+\r
+ return xReturn;\r
+ }\r
+\r
+#endif /* SUPPORT_STATIC_ALLOCATION */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+\r
+ BaseType_t xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ {\r
+ TCB_t *pxNewTCB;\r
+ BaseType_t xReturn;\r
+\r
+ /* If the stack grows down then allocate the stack then the TCB so the stack\r
+ does not grow into the TCB. Likewise if the stack grows up then allocate\r
+ the TCB then the stack. */\r
+ #if( portSTACK_GROWTH > 0 )\r
+ {\r
+ /* Allocate space for the TCB. Where the memory comes from depends on\r
+ the implementation of the port malloc function and whether or not static\r
+ allocation is being used. */\r
+ pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );\r
+\r
+ if( pxNewTCB != NULL )\r
+ {\r
+ /* Allocate space for the stack used by the task being created.\r
+ The base of the stack memory stored in the TCB so the task can\r
+ be deleted later if required. */\r
+ pxNewTCB->pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+\r
+ if( pxNewTCB->pxStack == NULL )\r
+ {\r
+ /* Could not allocate the stack. Delete the allocated TCB. */\r
+ vPortFree( pxNewTCB );\r
+ pxNewTCB = NULL;\r
+ }\r
+ }\r
+ }\r
+ #else /* portSTACK_GROWTH */\r
+ {\r
+ StackType_t *pxStack;\r
+\r
+ /* Allocate space for the stack used by the task being created. */\r
+ pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+\r
+ if( pxStack != NULL )\r
+ {\r
+ /* Allocate space for the TCB. */\r
+ pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e961 MISRA exception as the casts are only redundant for some paths. */\r
+\r
+ if( pxNewTCB != NULL )\r
+ {\r
+ /* Store the stack location in the TCB. */\r
+ pxNewTCB->pxStack = pxStack;\r
+ }\r
+ else\r
+ {\r
+ /* The stack cannot be used as the TCB was not created. Free\r
+ it again. */\r
+ vPortFree( pxStack );\r
+ }\r
+ }\r
+ else\r
+ {\r
+ pxNewTCB = NULL;\r
+ }\r
+ }\r
+ #endif /* portSTACK_GROWTH */\r
+\r
+ if( pxNewTCB != NULL )\r
+ {\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ {\r
+ /* Tasks can be created statically or dynamically, so note this\r
+ task was created dynamically in case it is later deleted. */\r
+ pxNewTCB->ucStaticallyAllocated = pdFALSE;\r
+ }\r
+ #endif /* configSUPPORT_STATIC_ALLOCATION */\r
+\r
+ prvInitialiseNewTask( pxTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB );\r
+ prvAddNewTaskToReadyList( pxNewTCB );\r
+ xReturn = pdPASS;\r
+ }\r
+ else\r
+ {\r
+ xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;\r
+ }\r
+\r
+ return xReturn;\r
+ }\r
+\r
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvInitialiseNewTask( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, TCB_t *pxNewTCB ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+{\r
+StackType_t *pxTopOfStack;\r
+UBaseType_t x;\r
+\r
+ #if( portUSING_MPU_WRAPPERS == 1 )\r
+ /* Should the task be created in privileged mode? */\r
+ BaseType_t xRunPrivileged;\r
+ if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )\r
+ {\r
+ xRunPrivileged = pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ xRunPrivileged = pdFALSE;\r
+ }\r
+ uxPriority &= ~portPRIVILEGE_BIT;\r
+ #endif /* portUSING_MPU_WRAPPERS == 1 */\r
+\r
+ /* Avoid dependency on memset() if it is not required. */\r
+ #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )\r
+ {\r
+ /* Fill the stack with a known value to assist debugging. */\r
+ ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) usStackDepth * sizeof( StackType_t ) );\r
+ }\r
+ #endif /* ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) ) */\r
+\r
+ /* Calculate the top of stack address. This depends on whether the stack\r
+ grows from high memory to low (as per the 80x86) or vice versa.\r
+ portSTACK_GROWTH is used to make the result positive or negative as required\r
+ by the port. */\r
+ #if( portSTACK_GROWTH < 0 )\r
+ {\r
+ pxTopOfStack = pxNewTCB->pxStack + ( usStackDepth - ( uint16_t ) 1 );\r
+ pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. */\r
+\r
+ /* Check the alignment of the calculated top of stack is correct. */\r
+ configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
+ }\r
+ #else /* portSTACK_GROWTH */\r
+ {\r
+ pxTopOfStack = pxNewTCB->pxStack;\r
+\r
+ /* Check the alignment of the stack buffer is correct. */\r
+ configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
+\r
+ /* The other extreme of the stack space is required if stack checking is\r
+ performed. */\r
+ pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( usStackDepth - ( uint16_t ) 1 );\r
+ }\r
+ #endif /* portSTACK_GROWTH */\r
+\r
+ /* Store the task name in the TCB. */\r
+ for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )\r
+ {\r
+ pxNewTCB->pcTaskName[ x ] = pcName[ x ];\r
+\r
+ /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than\r
+ configMAX_TASK_NAME_LEN characters just in case the memory after the\r
+ string is not accessible (extremely unlikely). */\r
+ if( pcName[ x ] == 0x00 )\r
+ {\r
+ break;\r
+ }\r
+ else\r
+ {\r
+ mtCOVERAGE_TEST_MARKER();\r
+ }\r
+ }\r
+\r
+ /* Ensure the name string is terminated in the case that the string length\r
+ was greater or equal to configMAX_TASK_NAME_LEN. */\r
+ pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';\r
+\r
+ /* This is used as an array index so must ensure it's not too large. First\r
+ remove the privilege bit if one is present. */\r
+ if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )\r
+ {\r
+ uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;\r
+ }\r
+ else\r
+ {\r
+ mtCOVERAGE_TEST_MARKER();\r
+ }\r
+\r
+ pxNewTCB->uxPriority = uxPriority;\r
+ #if ( configUSE_MUTEXES == 1 )\r
+ {\r
+ pxNewTCB->uxBasePriority = uxPriority;\r
+ pxNewTCB->uxMutexesHeld = 0;\r
+ }\r
+ #endif /* configUSE_MUTEXES */\r
+\r
+ vListInitialiseItem( &( pxNewTCB->xStateListItem ) );\r
+ vListInitialiseItem( &( pxNewTCB->xEventListItem ) );\r
+\r
+ /* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get\r
+ back to the containing TCB from a generic item in a list. */\r
+ listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );\r
+\r
+ /* Event lists are always in priority order. */\r
+ listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );\r
+\r
+ #if ( portCRITICAL_NESTING_IN_TCB == 1 )\r
+ {\r
+ pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;\r
+ }\r
+ #endif /* portCRITICAL_NESTING_IN_TCB */\r
+\r
+ #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ {\r
+ pxNewTCB->pxTaskTag = NULL;\r
+ }\r
+ #endif /* configUSE_APPLICATION_TASK_TAG */\r
+\r
+ #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
+ {\r
+ pxNewTCB->ulRunTimeCounter = 0UL;\r
+ }\r
+ #endif /* configGENERATE_RUN_TIME_STATS */\r
+\r
+ #if ( portUSING_MPU_WRAPPERS == 1 )\r
+ {\r
+ vPortStoreTaskMPUSettings( &( pxNewTCB->xMPUSettings ), xRegions, pxNewTCB->pxStack, usStackDepth );\r
+ }\r
+ #endif\r
+\r
+ #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )\r
+ {\r
+ for( x = 0; x < ( UBaseType_t ) configNUM_THREAD_LOCAL_STORAGE_POINTERS; x++ )\r
+ {\r
+ pxNewTCB->pvThreadLocalStoragePointers[ x ] = NULL;\r
+ }\r
+ }\r
+ #endif\r
+\r
+ #if ( configUSE_TASK_NOTIFICATIONS == 1 )\r
+ {\r
+ pxNewTCB->ulNotifiedValue = 0;\r
+ pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;\r
+ }\r
+ #endif\r
+\r
+ #if ( configUSE_NEWLIB_REENTRANT == 1 )\r
+ {\r
+ /* Initialise this task's Newlib reent structure. */\r
+ _REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );\r
+ }\r
+ #endif\r
+\r
+ #if( INCLUDE_xTaskAbortDelay == 1 )\r
+ {\r
+ pxNewTCB->ucDelayAborted = pdFALSE;\r
+ }\r
+ #endif\r
+\r
+ /* Initialize the TCB stack to look as if the task was already running,\r
+ but had been interrupted by the scheduler. The return address is set\r
+ to the start of the task function. Once the stack has been initialised\r
+ the top of stack variable is updated. */\r
+ #if( portUSING_MPU_WRAPPERS == 1 )\r
+ {\r
+ pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );\r
+ }\r
+ #else /* portUSING_MPU_WRAPPERS */\r
+ {\r
+ pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );\r
+ }\r
+ #endif /* portUSING_MPU_WRAPPERS */\r
+\r
+ if( ( void * ) pxCreatedTask != NULL )\r
+ {\r
+ /* Pass the handle out in an anonymous way. The handle can be used to\r
+ change the created task's priority, delete the created task, etc.*/\r
+ *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;\r
+ }\r
+ else\r
+ {\r
+ mtCOVERAGE_TEST_MARKER();\r
+ }\r
+}\r
/*-----------------------------------------------------------*/\r
\r
-BaseType_t xTaskGenericCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer, const MemoryRegion_t * const xRegions ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )\r
{\r
-BaseType_t xReturn;\r
-TCB_t * pxNewTCB;\r
-StackType_t *pxTopOfStack;\r
-\r
- configASSERT( pxTaskCode );\r
- configASSERT( ( ( uxPriority & ( UBaseType_t ) ( ~portPRIVILEGE_BIT ) ) < ( UBaseType_t ) configMAX_PRIORITIES ) );\r
-\r
- /* Allocate the memory required by the TCB and stack for the new task,\r
- checking that the allocation was successful. */\r
- pxNewTCB = prvAllocateTCBAndStack( usStackDepth, puxStackBuffer, ( TCB_t* ) pxTaskBuffer ); /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */\r
-\r
- if( pxNewTCB != NULL )\r
+ /* Ensure interrupts don't access the task lists while the lists are being\r
+ updated. */\r
+ taskENTER_CRITICAL();\r
{\r
- #if( portUSING_MPU_WRAPPERS == 1 )\r
- /* Should the task be created in privileged mode? */\r
- BaseType_t xRunPrivileged;\r
- if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )\r
+ uxCurrentNumberOfTasks++;\r
+ if( pxCurrentTCB == NULL )\r
+ {\r
+ /* There are no other tasks, or all the other tasks are in\r
+ the suspended state - make this the current task. */\r
+ pxCurrentTCB = pxNewTCB;\r
+\r
+ if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )\r
{\r
- xRunPrivileged = pdTRUE;\r
+ /* This is the first task to be created so do the preliminary\r
+ initialisation required. We will not recover if this call\r
+ fails, but we will report the failure. */\r
+ prvInitialiseTaskLists();\r
}\r
else\r
{\r
- xRunPrivileged = pdFALSE;\r
+ mtCOVERAGE_TEST_MARKER();\r
}\r
- uxPriority &= ~portPRIVILEGE_BIT;\r
- #endif /* portUSING_MPU_WRAPPERS == 1 */\r
-\r
- /* Calculate the top of stack address. This depends on whether the\r
- stack grows from high memory to low (as per the 80x86) or vice versa.\r
- portSTACK_GROWTH is used to make the result positive or negative as\r
- required by the port. */\r
- #if( portSTACK_GROWTH < 0 )\r
- {\r
- pxTopOfStack = pxNewTCB->pxStack + ( usStackDepth - ( uint16_t ) 1 );\r
- pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. */\r
-\r
- /* Check the alignment of the calculated top of stack is correct. */\r
- configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
- }\r
- #else /* portSTACK_GROWTH */\r
- {\r
- pxTopOfStack = pxNewTCB->pxStack;\r
-\r
- /* Check the alignment of the stack buffer is correct. */\r
- configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
-\r
- /* If we want to use stack checking on architectures that use\r
- a positive stack growth direction then we also need to store the\r
- other extreme of the stack space. */\r
- pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( usStackDepth - ( uint16_t ) 1 );\r
- }\r
- #endif /* portSTACK_GROWTH */\r
-\r
- /* Setup the newly allocated TCB with the initial state of the task. */\r
- prvInitialiseTCBVariables( pxNewTCB, pcName, uxPriority, xRegions, usStackDepth );\r
-\r
- /* Initialize the TCB stack to look as if the task was already running,\r
- but had been interrupted by the scheduler. The return address is set\r
- to the start of the task function. Once the stack has been initialised\r
- the top of stack variable is updated. */\r
- #if( portUSING_MPU_WRAPPERS == 1 )\r
- {\r
- pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );\r
- }\r
- #else /* portUSING_MPU_WRAPPERS */\r
- {\r
- pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );\r
- }\r
- #endif /* portUSING_MPU_WRAPPERS */\r
-\r
- if( ( void * ) pxCreatedTask != NULL )\r
- {\r
- /* Pass the TCB out - in an anonymous way. The calling function/\r
- task can use this as a handle to delete the task later if\r
- required.*/\r
- *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;\r
}\r
else\r
{\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
-\r
- /* Ensure interrupts don't access the task lists while they are being\r
- updated. */\r
- taskENTER_CRITICAL();\r
- {\r
- uxCurrentNumberOfTasks++;\r
- if( pxCurrentTCB == NULL )\r
+ /* If the scheduler is not already running, make this task the\r
+ current task if it is the highest priority task to be created\r
+ so far. */\r
+ if( xSchedulerRunning == pdFALSE )\r
{\r
- /* There are no other tasks, or all the other tasks are in\r
- the suspended state - make this the current task. */\r
- pxCurrentTCB = pxNewTCB;\r
-\r
- if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )\r
+ if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )\r
{\r
- /* This is the first task to be created so do the preliminary\r
- initialisation required. We will not recover if this call\r
- fails, but we will report the failure. */\r
- prvInitialiseTaskLists();\r
+ pxCurrentTCB = pxNewTCB;\r
}\r
else\r
{\r
}\r
else\r
{\r
- /* If the scheduler is not already running, make this task the\r
- current task if it is the highest priority task to be created\r
- so far. */\r
- if( xSchedulerRunning == pdFALSE )\r
- {\r
- if( pxCurrentTCB->uxPriority <= uxPriority )\r
- {\r
- pxCurrentTCB = pxNewTCB;\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
+ mtCOVERAGE_TEST_MARKER();\r
}\r
+ }\r
\r
- uxTaskNumber++;\r
+ uxTaskNumber++;\r
\r
- #if ( configUSE_TRACE_FACILITY == 1 )\r
- {\r
- /* Add a counter into the TCB for tracing only. */\r
- pxNewTCB->uxTCBNumber = uxTaskNumber;\r
- }\r
- #endif /* configUSE_TRACE_FACILITY */\r
- traceTASK_CREATE( pxNewTCB );\r
+ #if ( configUSE_TRACE_FACILITY == 1 )\r
+ {\r
+ /* Add a counter into the TCB for tracing only. */\r
+ pxNewTCB->uxTCBNumber = uxTaskNumber;\r
+ }\r
+ #endif /* configUSE_TRACE_FACILITY */\r
+ traceTASK_CREATE( pxNewTCB );\r
\r
- prvAddTaskToReadyList( pxNewTCB );\r
+ prvAddTaskToReadyList( pxNewTCB );\r
\r
- xReturn = pdPASS;\r
- portSETUP_TCB( pxNewTCB );\r
- }\r
- taskEXIT_CRITICAL();\r
- }\r
- else\r
- {\r
- xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;\r
- traceTASK_CREATE_FAILED();\r
+ portSETUP_TCB( pxNewTCB );\r
}\r
+ taskEXIT_CRITICAL();\r
\r
- if( xReturn == pdPASS )\r
+ if( xSchedulerRunning != pdFALSE )\r
{\r
- if( xSchedulerRunning != pdFALSE )\r
+ /* If the created task is of a higher priority than the current task\r
+ then it should run now. */\r
+ if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )\r
{\r
- /* If the created task is of a higher priority than the current task\r
- then it should run now. */\r
- if( pxCurrentTCB->uxPriority < uxPriority )\r
- {\r
- taskYIELD_IF_USING_PREEMPTION();\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
+ taskYIELD_IF_USING_PREEMPTION();\r
}\r
else\r
{\r
mtCOVERAGE_TEST_MARKER();\r
}\r
}\r
-\r
- return xReturn;\r
+ else\r
+ {\r
+ mtCOVERAGE_TEST_MARKER();\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vTaskStartScheduler( void )\r
{\r
BaseType_t xReturn;\r
-StaticTask_t *pxIdleTaskTCBBuffer = NULL;\r
-StackType_t *pxIdleTaskStackBuffer = NULL;\r
-uint16_t usIdleTaskStackSize = tskIDLE_STACK_SIZE;\r
+uint16_t usIdleTaskStackSize = configMINIMAL_STACK_SIZE;\r
\r
+ /* Add the idle task at the lowest priority. */\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
{\r
+ StaticTask_t *pxIdleTaskTCBBuffer = NULL;\r
+ StackType_t *pxIdleTaskStackBuffer = NULL;\r
+\r
+ /* The Idle task is created using user provided RAM - obtain the\r
+ address of the RAM then create the idle task. */\r
vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &usIdleTaskStackSize );\r
+ xReturn = xTaskCreateStatic( prvIdleTask, "IDLE", usIdleTaskStackSize, ( void * ) NULL, ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), &xIdleTaskHandle, pxIdleTaskStackBuffer, pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */\r
+ }\r
+ #else\r
+ {\r
+ /* The Idle task is being created using dynamically allocated RAM. */\r
+ xReturn = xTaskCreate( prvIdleTask, "IDLE", usIdleTaskStackSize, ( void * ) NULL, ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), &xIdleTaskHandle ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */\r
}\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
\r
- /* Add the idle task at the lowest priority. */\r
- xReturn = xTaskGenericCreate( prvIdleTask, "IDLE", usIdleTaskStackSize, ( void * ) NULL, ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), &xIdleTaskHandle, pxIdleTaskStackBuffer, pxIdleTaskTCBBuffer, NULL ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */\r
-\r
#if ( configUSE_TIMERS == 1 )\r
{\r
if( xReturn == pdPASS )\r
unlikely that the\r
if( xTickCount >= xNextTaskUnblockTime ) test will pass\r
next time through. */\r
- xNextTaskUnblockTime = portMAX_DELAY;\r
+ xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
break;\r
}\r
else\r
#endif /* configUSE_TICKLESS_IDLE */\r
/*-----------------------------------------------------------*/\r
\r
-static void prvInitialiseTCBVariables( TCB_t * const pxTCB, const char * const pcName, UBaseType_t uxPriority, const MemoryRegion_t * const xRegions, const uint16_t usStackDepth ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
-{\r
-UBaseType_t x;\r
-\r
- /* Store the task name in the TCB. */\r
- for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )\r
- {\r
- pxTCB->pcTaskName[ x ] = pcName[ x ];\r
-\r
- /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than\r
- configMAX_TASK_NAME_LEN characters just in case the memory after the\r
- string is not accessible (extremely unlikely). */\r
- if( pcName[ x ] == 0x00 )\r
- {\r
- break;\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
- }\r
-\r
- /* Ensure the name string is terminated in the case that the string length\r
- was greater or equal to configMAX_TASK_NAME_LEN. */\r
- pxTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';\r
-\r
- /* This is used as an array index so must ensure it's not too large. First\r
- remove the privilege bit if one is present. */\r
- if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )\r
- {\r
- uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
-\r
- pxTCB->uxPriority = uxPriority;\r
- #if ( configUSE_MUTEXES == 1 )\r
- {\r
- pxTCB->uxBasePriority = uxPriority;\r
- pxTCB->uxMutexesHeld = 0;\r
- }\r
- #endif /* configUSE_MUTEXES */\r
-\r
- vListInitialiseItem( &( pxTCB->xStateListItem ) );\r
- vListInitialiseItem( &( pxTCB->xEventListItem ) );\r
-\r
- /* Set the pxTCB as a link back from the ListItem_t. This is so we can get\r
- back to the containing TCB from a generic item in a list. */\r
- listSET_LIST_ITEM_OWNER( &( pxTCB->xStateListItem ), pxTCB );\r
-\r
- /* Event lists are always in priority order. */\r
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
- listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB );\r
-\r
- #if ( portCRITICAL_NESTING_IN_TCB == 1 )\r
- {\r
- pxTCB->uxCriticalNesting = ( UBaseType_t ) 0U;\r
- }\r
- #endif /* portCRITICAL_NESTING_IN_TCB */\r
-\r
- #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
- {\r
- pxTCB->pxTaskTag = NULL;\r
- }\r
- #endif /* configUSE_APPLICATION_TASK_TAG */\r
-\r
- #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
- {\r
- pxTCB->ulRunTimeCounter = 0UL;\r
- }\r
- #endif /* configGENERATE_RUN_TIME_STATS */\r
-\r
- #if ( portUSING_MPU_WRAPPERS == 1 )\r
- {\r
- vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, pxTCB->pxStack, usStackDepth );\r
- }\r
- #else /* portUSING_MPU_WRAPPERS */\r
- {\r
- ( void ) xRegions;\r
- ( void ) usStackDepth;\r
- }\r
- #endif /* portUSING_MPU_WRAPPERS */\r
-\r
- #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )\r
- {\r
- for( x = 0; x < ( UBaseType_t ) configNUM_THREAD_LOCAL_STORAGE_POINTERS; x++ )\r
- {\r
- pxTCB->pvThreadLocalStoragePointers[ x ] = NULL;\r
- }\r
- }\r
- #endif\r
-\r
- #if ( configUSE_TASK_NOTIFICATIONS == 1 )\r
- {\r
- pxTCB->ulNotifiedValue = 0;\r
- pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;\r
- }\r
- #endif\r
-\r
- #if ( configUSE_NEWLIB_REENTRANT == 1 )\r
- {\r
- /* Initialise this task's Newlib reent structure. */\r
- _REENT_INIT_PTR( ( &( pxTCB->xNewLib_reent ) ) );\r
- }\r
- #endif\r
-\r
- #if( INCLUDE_xTaskAbortDelay == 1 )\r
- {\r
- pxTCB->ucDelayAborted = pdFALSE;\r
- }\r
- #endif\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )\r
\r
void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue )\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static TCB_t *prvAllocateTCBAndStack( const uint16_t usStackDepth, StackType_t * const puxStackBuffer, TCB_t * const pxTaskBuffer )\r
-{\r
-TCB_t *pxNewTCB;\r
-\r
- #if( ( configASSERT_DEFINED == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
- {\r
- /* Sanity check that the size of the structure used to declare a\r
- variable of type StaticTask_t matches the size of the actual TCB_t\r
- structure. */\r
- volatile size_t xSize = sizeof( StaticTask_t );\r
- configASSERT( xSize == sizeof( TCB_t ) );\r
- }\r
- #endif /* configASSERT_DEFINED */\r
-\r
- /* If the stack grows down then allocate the stack then the TCB so the stack\r
- does not grow into the TCB. Likewise if the stack grows up then allocate\r
- the TCB then the stack. */\r
- #if( portSTACK_GROWTH > 0 )\r
- {\r
- /* Allocate space for the TCB. Where the memory comes from depends on\r
- the implementation of the port malloc function. */\r
- pxNewTCB = ( TCB_t * ) pvPortMallocAligned( sizeof( TCB_t ), pxTaskBuffer );\r
-\r
- if( pxNewTCB != NULL )\r
- {\r
- /* Allocate space for the stack used by the task being created.\r
- The base of the stack memory stored in the TCB so the task can\r
- be deleted later if required. */\r
- pxNewTCB->pxStack = ( StackType_t * ) pvPortMallocAligned( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ), puxStackBuffer ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
-\r
- if( pxNewTCB->pxStack == NULL )\r
- {\r
- /* Could not allocate the stack. Delete the allocated TCB - if\r
- it was allocated dynamically. */\r
- if( pxTaskBuffer == NULL )\r
- {\r
- vPortFree( pxNewTCB );\r
- }\r
- pxNewTCB = NULL;\r
- }\r
- }\r
- }\r
- #else /* portSTACK_GROWTH */\r
- {\r
- StackType_t *pxStack;\r
-\r
- /* Allocate space for the stack used by the task being created. */\r
- pxStack = ( StackType_t * ) pvPortMallocAligned( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ), puxStackBuffer ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
-\r
- if( pxStack != NULL )\r
- {\r
- /* Allocate space for the TCB. */\r
- pxNewTCB = ( TCB_t * ) pvPortMallocAligned( sizeof( TCB_t ), pxTaskBuffer ); /*lint !e961 MISRA exception as the casts are only redundant for some paths. */\r
-\r
- if( pxNewTCB != NULL )\r
- {\r
- /* Store the stack location in the TCB. */\r
- pxNewTCB->pxStack = pxStack;\r
- }\r
- else\r
- {\r
- /* The stack cannot be used as the TCB was not created. Free it\r
- again. */\r
- if( puxStackBuffer == NULL )\r
- {\r
- vPortFree( pxStack );\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
- }\r
- }\r
- else\r
- {\r
- pxNewTCB = NULL;\r
- }\r
- }\r
- #endif /* portSTACK_GROWTH */\r
-\r
- if( pxNewTCB != NULL )\r
- {\r
- /* Avoid dependency on memset() if it is not required. */\r
- #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )\r
- {\r
- /* Just to help debugging. */\r
- ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) usStackDepth * sizeof( StackType_t ) );\r
- }\r
- #endif /* ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) ) */\r
-\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- {\r
- pxNewTCB->ucStaticAllocationFlags = 0;\r
-\r
- if( puxStackBuffer != NULL )\r
- {\r
- /* The application provided its own stack - note the fact so no\r
- attempt is made to delete the stack if the task is deleted. */\r
- pxNewTCB->ucStaticAllocationFlags |= taskSTATICALLY_ALLOCATED_STACK;\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
-\r
- if( pxTaskBuffer != NULL )\r
- {\r
- /* The application provided its own TCB. Note the fact so no\r
- attempt is made to delete the TCB if the task is deleted. */\r
- pxNewTCB->ucStaticAllocationFlags |= taskSTATICALLY_ALLOCATED_TCB;\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
- }\r
- #endif /* configSUPPORT_STATIC_ALLOCATION */\r
- }\r
-\r
- return pxNewTCB;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
#if( configUSE_TRACE_FACILITY == 1 )\r
\r
void vTaskGetTaskInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState )\r
}\r
#endif /* configUSE_NEWLIB_REENTRANT */\r
\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )\r
{\r
- /* Only free the stack and TCB if they were allocated dynamically in\r
- the first place. */\r
- if( ( pxTCB->ucStaticAllocationFlags & taskSTATICALLY_ALLOCATED_STACK ) == ( uint8_t ) 0 )\r
- {\r
- vPortFreeAligned( pxTCB->pxStack );\r
- }\r
- else\r
- {\r
- mtCOVERAGE_TEST_MARKER();\r
- }\r
-\r
- if( ( pxTCB->ucStaticAllocationFlags & taskSTATICALLY_ALLOCATED_TCB ) == ( uint8_t ) 0 )\r
+ /* The task can only have been allocated dynamically - free it\r
+ again. */\r
+ vPortFree( pxTCB->pxStack );\r
+ vPortFree( pxTCB );\r
+ }\r
+ #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
+ {\r
+ /* The task could have been allocated statically or dynamically, so\r
+ check before attempting to free the memory. */\r
+ if( pxTCB->ucStaticallyAllocated == ( uint8_t ) pdFALSE )\r
{\r
- vPortFreeAligned( pxTCB );\r
+ vPortFree( pxTCB->pxStack );\r
+ vPortFree( pxTCB );\r
}\r
else\r
{\r
mtCOVERAGE_TEST_MARKER();\r
}\r
}\r
- #else\r
- {\r
- vPortFreeAligned( pxTCB->pxStack );\r
- vPortFree( pxTCB );\r
- }\r
- #endif\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
}\r
\r
#endif /* INCLUDE_vTaskDelete */\r
function is executing. */\r
uxArraySize = uxCurrentNumberOfTasks;\r
\r
- /* Allocate an array index for each task. */\r
+ /* Allocate an array index for each task. NOTE! if\r
+ configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will\r
+ equate to NULL. */\r
pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );\r
\r
if( pxTaskStatusArray != NULL )\r
pcWriteBuffer += strlen( pcWriteBuffer );\r
}\r
\r
- /* Free the array again. */\r
+ /* Free the array again. NOTE! If configSUPPORT_DYNAMIC_ALLOCATION\r
+ is 0 then vPortFree() will be #defined to nothing. */\r
vPortFree( pxTaskStatusArray );\r
}\r
else\r
function is executing. */\r
uxArraySize = uxCurrentNumberOfTasks;\r
\r
- /* Allocate an array index for each task. */\r
+ /* Allocate an array index for each task. NOTE! If\r
+ configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will\r
+ equate to NULL. */\r
pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );\r
\r
if( pxTaskStatusArray != NULL )\r
mtCOVERAGE_TEST_MARKER();\r
}\r
\r
- /* Free the array again. */\r
+ /* Free the array again. NOTE! If configSUPPORT_DYNAMIC_ALLOCATION\r
+ is 0 then vPortFree() will be #defined to nothing. */\r
vPortFree( pxTaskStatusArray );\r
}\r
else\r
UBaseType_t uxTimerNumber; /*<< An ID assigned by trace tools such as FreeRTOS+Trace */\r
#endif\r
\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
- uint8_t ucStaticallyAllocated; /*<< Set to pdTRUE if the timer was created from a StaticTimer_t structure, and pdFALSE if the timer structure was allocated dynamically. */\r
+ #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\r
+ uint8_t ucStaticallyAllocated; /*<< Set to pdTRUE if the timer was created statically so no attempt is made to free the memory again if the timer is later deleted. */\r
#endif\r
} xTIMER;\r
\r
\r
/* A queue that is used to send commands to the timer service task. */\r
PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;\r
-\r
-#if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )\r
-\r
- PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;\r
-\r
-#endif\r
+PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;\r
\r
/*lint +e956 */\r
\r
*/\r
static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;\r
\r
+/*\r
+ * Called after a Timer_t structure has been allocated either statically or\r
+ * dynamically to fill in the structure's members.\r
+ */\r
+static void prvInitialiseNewTimer( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
/*-----------------------------------------------------------*/\r
\r
BaseType_t xTimerCreateTimerTask( void )\r
{\r
BaseType_t xReturn = pdFAIL;\r
-StaticTask_t *pxTimerTaskTCBBuffer = NULL;\r
-StackType_t *pxTimerTaskStackBuffer = NULL;\r
uint16_t usTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;\r
\r
\r
\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
{\r
- vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &usTimerTaskStackSize );\r
- }\r
- #endif /* configSUPPORT_STATIC_ALLOCATION */\r
+ StaticTask_t *pxTimerTaskTCBBuffer = NULL;\r
+ StackType_t *pxTimerTaskStackBuffer = NULL;\r
\r
- #if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )\r
- {\r
- /* Create the timer task, storing its handle in xTimerTaskHandle so\r
- it can be returned by the xTimerGetTimerDaemonTaskHandle() function. */\r
- xReturn = xTaskGenericCreate( prvTimerTask, "Tmr Svc", usTimerTaskStackSize, NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, &xTimerTaskHandle, pxTimerTaskStackBuffer, pxTimerTaskTCBBuffer, NULL );\r
+ vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &usTimerTaskStackSize );\r
+ xReturn = xTaskCreateStatic( prvTimerTask, "Tmr Svc", usTimerTaskStackSize, NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, &xTimerTaskHandle, pxTimerTaskStackBuffer, pxTimerTaskTCBBuffer );\r
}\r
#else\r
{\r
- /* Create the timer task without storing its handle. */\r
- xReturn = xTaskGenericCreate( prvTimerTask, "Tmr Svc", usTimerTaskStackSize, NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, NULL, pxTimerTaskStackBuffer, pxTimerTaskTCBBuffer, NULL );\r
+ xReturn = xTaskCreate( prvTimerTask, "Tmr Svc", usTimerTaskStackSize, NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, &xTimerTaskHandle );\r
}\r
- #endif\r
+ #endif /* configSUPPORT_STATIC_ALLOCATION */\r
}\r
else\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-TimerHandle_t xTimerGenericCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
-{\r
-Timer_t *pxNewTimer;\r
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
\r
- #if( ( configASSERT_DEFINED == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
+ TimerHandle_t xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
{\r
- /* Sanity check that the size of the structure used to declare a\r
- variable of type StaticTimer_t equals the size of the real timer\r
- structures. */\r
- volatile size_t xSize = sizeof( StaticTimer_t );\r
- configASSERT( xSize == sizeof( Timer_t ) );\r
- }\r
- #endif /* configASSERT_DEFINED */\r
+ Timer_t *pxNewTimer;\r
\r
- /* Allocate the timer structure. */\r
- if( xTimerPeriodInTicks == ( TickType_t ) 0U )\r
- {\r
- pxNewTimer = NULL;\r
- }\r
- else\r
- {\r
- /* If the user passed in a statically allocated timer structure then use\r
- it, otherwise allocate the structure dynamically. */\r
- if( pxTimerBuffer == NULL )\r
- {\r
- pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) );\r
- }\r
- else\r
- {\r
- pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */\r
- }\r
+ pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) );\r
\r
if( pxNewTimer != NULL )\r
{\r
- /* Ensure the infrastructure used by the timer service task has been\r
- created/initialised. */\r
- prvCheckForValidListAndQueue();\r
-\r
- /* Initialise the timer structure members using the function\r
- parameters. */\r
- pxNewTimer->pcTimerName = pcTimerName;\r
- pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;\r
- pxNewTimer->uxAutoReload = uxAutoReload;\r
- pxNewTimer->pvTimerID = pvTimerID;\r
- pxNewTimer->pxCallbackFunction = pxCallbackFunction;\r
- vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );\r
+ prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );\r
\r
#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
{\r
- if( pxTimerBuffer == NULL )\r
- {\r
- pxNewTimer->ucStaticallyAllocated = pdFALSE;\r
- }\r
- else\r
- {\r
- pxNewTimer->ucStaticallyAllocated = pdTRUE;\r
- }\r
+ /* Timers can be created statically or dynamically, so note this\r
+ timer was created dynamically in case the timer is later\r
+ deleted. */\r
+ pxNewTimer->ucStaticallyAllocated = pdFALSE;\r
}\r
#endif /* configSUPPORT_STATIC_ALLOCATION */\r
+ }\r
\r
- traceTIMER_CREATE( pxNewTimer );\r
+ return pxNewTimer;\r
+ }\r
+\r
+#endif /* configSUPPORT_STATIC_ALLOCATION */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+\r
+ TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ {\r
+ Timer_t *pxNewTimer;\r
+\r
+ #if( configASSERT_DEFINED == 1 )\r
+ {\r
+ /* Sanity check that the size of the structure used to declare a\r
+ variable of type StaticTimer_t equals the size of the real timer\r
+ structures. */\r
+ volatile size_t xSize = sizeof( StaticTimer_t );\r
+ configASSERT( xSize == sizeof( Timer_t ) );\r
}\r
- else\r
+ #endif /* configASSERT_DEFINED */\r
+\r
+ /* A pointer to a StaticTimer_t structure MUST be provided, use it. */\r
+ configASSERT( pxTimerBuffer );\r
+ pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */\r
+\r
+ if( pxNewTimer != NULL )\r
{\r
- traceTIMER_CREATE_FAILED();\r
+ prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );\r
+\r
+ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\r
+ {\r
+ /* Timers can be created statically or dynamically so note this\r
+ timer was created statically in case it is later deleted. */\r
+ pxNewTimer->ucStaticallyAllocated = pdTRUE;\r
+ }\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
}\r
+\r
+ return pxNewTimer;\r
}\r
\r
+#endif /* configSUPPORT_STATIC_ALLOCATION */\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvInitialiseNewTimer( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, Timer_t *pxNewTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+{\r
/* 0 is not a valid value for xTimerPeriodInTicks. */\r
configASSERT( ( xTimerPeriodInTicks > 0 ) );\r
\r
- return ( TimerHandle_t ) pxNewTimer;\r
+ if( pxNewTimer != NULL )\r
+ {\r
+ /* Ensure the infrastructure used by the timer service task has been\r
+ created/initialised. */\r
+ prvCheckForValidListAndQueue();\r
+\r
+ /* Initialise the timer structure members using the function\r
+ parameters. */\r
+ pxNewTimer->pcTimerName = pcTimerName;\r
+ pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;\r
+ pxNewTimer->uxAutoReload = uxAutoReload;\r
+ pxNewTimer->pvTimerID = pvTimerID;\r
+ pxNewTimer->pxCallbackFunction = pxCallbackFunction;\r
+ vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );\r
+ traceTIMER_CREATE( pxNewTimer );\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-#if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )\r
-\r
- TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )\r
- {\r
- /* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been\r
- started, then xTimerTaskHandle will be NULL. */\r
- configASSERT( ( xTimerTaskHandle != NULL ) );\r
- return xTimerTaskHandle;\r
- }\r
-\r
-#endif\r
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )\r
+{\r
+ /* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been\r
+ started, then xTimerTaskHandle will be NULL. */\r
+ configASSERT( ( xTimerTaskHandle != NULL ) );\r
+ return xTimerTaskHandle;\r
+}\r
/*-----------------------------------------------------------*/\r
\r
const char * pcTimerGetTimerName( TimerHandle_t xTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
{\r
/* Has the expiry time elapsed between the command to start/reset a\r
timer was issued, and the time the command was processed? */\r
- if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks )\r
+ if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
{\r
/* The time between a command being issued and the command being\r
processed actually exceeds the timers period. */\r
/* The timer has already been removed from the active list,\r
just free up the memory if the memory was dynamically\r
allocated. */\r
- #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )\r
{\r
+ /* The timer can only have been allocated dynamically -\r
+ free it again. */\r
+ vPortFree( pxTimer );\r
+ }\r
+ #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\r
+ {\r
+ /* The timer could have been allocated statically or\r
+ dynamically, so check before attempting to free the\r
+ memory. */\r
if( pxTimer->ucStaticallyAllocated == ( uint8_t ) pdFALSE )\r
{\r
vPortFree( pxTimer );\r
mtCOVERAGE_TEST_MARKER();\r
}\r
}\r
- #else\r
- {\r
- vPortFree( pxTimer );\r
- }\r
- #endif /* configSUPPORT_STATIC_ALLOCATION */\r
+ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */\r
break;\r
\r
default :\r
vListInitialise( &xActiveTimerList2 );\r
pxCurrentTimerList = &xActiveTimerList1;\r
pxOverflowTimerList = &xActiveTimerList2;\r
- xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );\r
- configASSERT( xTimerQueue );\r
+\r
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )\r
+ {\r
+ /* The timer queue is allocated statically in case\r
+ configSUPPORT_DYNAMIC_ALLOCATION is 0. */\r
+ static StaticQueue_t xStaticTimerQueue;\r
+ static uint8_t ucStaticTimerQueueStorage[ configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ];\r
+\r
+ xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );\r
+ }\r
+ #else\r
+ {\r
+ xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );\r
+ }\r
+ #endif\r
\r
#if ( configQUEUE_REGISTRY_SIZE > 0 )\r
{\r
projects / freertos / commitdiff