git.sur5r.net Git - openocd/blob - src/flash/nor/em357.c

   1 /***************************************************************************
   2  *   Copyright (C) 2005 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2008 by Spencer Oliver                                  *
   6  *   spen@spen-soft.co.uk                                                  *
   7  *
   8  *   Copyright (C) 2011 by Erik Botö
   9  *   erik.boto@pelagicore.com
  10  *
  11  *   This program is free software; you can redistribute it and/or modify  *
  12  *   it under the terms of the GNU General Public License as published by  *
  13  *   the Free Software Foundation; either version 2 of the License, or     *
  14  *   (at your option) any later version.                                   *
  15  *                                                                         *
  16  *   This program is distributed in the hope that it will be useful,       *
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  19  *   GNU General Public License for more details.                          *
  20  *                                                                         *
  21  *   You should have received a copy of the GNU General Public License     *
  22  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  23  ***************************************************************************/
  24
  25 #ifdef HAVE_CONFIG_H
  26 #include "config.h"
  27 #endif
  28
  29 #include "imp.h"
  30 #include <helper/binarybuffer.h>
  31 #include <target/algorithm.h>
  32 #include <target/armv7m.h>
  33
  34 /* em357 register locations */
  35
  36 #define EM357_FLASH_ACR         0x40008000
  37 #define EM357_FLASH_KEYR        0x40008004
  38 #define EM357_FLASH_OPTKEYR     0x40008008
  39 #define EM357_FLASH_SR          0x4000800C
  40 #define EM357_FLASH_CR          0x40008010
  41 #define EM357_FLASH_AR          0x40008014
  42 #define EM357_FLASH_OBR         0x4000801C
  43 #define EM357_FLASH_WRPR        0x40008020
  44
  45 #define EM357_FPEC_CLK          0x4000402c
  46 /* option byte location */
  47
  48 #define EM357_OB_RDP            0x08040800
  49 #define EM357_OB_WRP0           0x08040808
  50 #define EM357_OB_WRP1           0x0804080A
  51 #define EM357_OB_WRP2           0x0804080C
  52
  53 /* FLASH_CR register bits */
  54
  55 #define FLASH_PG                (1 << 0)
  56 #define FLASH_PER               (1 << 1)
  57 #define FLASH_MER               (1 << 2)
  58 #define FLASH_OPTPG             (1 << 4)
  59 #define FLASH_OPTER             (1 << 5)
  60 #define FLASH_STRT              (1 << 6)
  61 #define FLASH_LOCK              (1 << 7)
  62 #define FLASH_OPTWRE    (1 << 9)
  63
  64 /* FLASH_SR register bits */
  65
  66 #define FLASH_BSY               (1 << 0)
  67 #define FLASH_PGERR             (1 << 2)
  68 #define FLASH_WRPRTERR  (1 << 4)
  69 #define FLASH_EOP               (1 << 5)
  70
  71 /* EM357_FLASH_OBR bit definitions (reading) */
  72
  73 #define OPT_ERROR               0
  74 #define OPT_READOUT             1
  75
  76 /* register unlock keys */
  77
  78 #define KEY1                    0x45670123
  79 #define KEY2                    0xCDEF89AB
  80
  81 struct em357_options {
  82         uint16_t RDP;
  83         uint16_t user_options;
  84         uint16_t protection[3];
  85 };
  86
  87 struct em357_flash_bank {
  88         struct em357_options option_bytes;
  89         int ppage_size;
  90         int probed;
  91 };
  92
  93 static int em357_mass_erase(struct flash_bank *bank);
  94
  95 /* flash bank em357 <base> <size> 0 0 <target#>
  96  */
  97 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
  98 {
  99         struct em357_flash_bank *em357_info;
 100
 101         if (CMD_ARGC < 6)
 102                 return ERROR_COMMAND_SYNTAX_ERROR;
 103
 104         em357_info = malloc(sizeof(struct em357_flash_bank));
 105         bank->driver_priv = em357_info;
 106
 107         em357_info->probed = 0;
 108
 109         return ERROR_OK;
 110 }
 111
 112 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
 113 {
 114         struct target *target = bank->target;
 115         return target_read_u32(target, EM357_FLASH_SR, status);
 116 }
 117
 118 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
 119 {
 120         struct target *target = bank->target;
 121         uint32_t status;
 122         int retval = ERROR_OK;
 123
 124         /* wait for busy to clear */
 125         for (;; ) {
 126                 retval = em357_get_flash_status(bank, &status);
 127                 if (retval != ERROR_OK)
 128                         return retval;
 129                 LOG_DEBUG("status: 0x%" PRIx32 "", status);
 130                 if ((status & FLASH_BSY) == 0)
 131                         break;
 132                 if (timeout-- <= 0) {
 133                         LOG_ERROR("timed out waiting for flash");
 134                         return ERROR_FAIL;
 135                 }
 136                 alive_sleep(1);
 137         }
 138
 139         if (status & FLASH_WRPRTERR) {
 140                 LOG_ERROR("em357 device protected");
 141                 retval = ERROR_FAIL;
 142         }
 143
 144         if (status & FLASH_PGERR) {
 145                 LOG_ERROR("em357 device programming failed");
 146                 retval = ERROR_FAIL;
 147         }
 148
 149         /* Clear but report errors */
 150         if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
 151                 /* If this operation fails, we ignore it and report the original
 152                  * retval
 153                  */
 154                 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
 155         }
 156         return retval;
 157 }
 158
 159 static int em357_read_options(struct flash_bank *bank)
 160 {
 161         uint32_t optiondata;
 162         struct em357_flash_bank *em357_info = NULL;
 163         struct target *target = bank->target;
 164
 165         em357_info = bank->driver_priv;
 166
 167         /* read current option bytes */
 168         int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
 169         if (retval != ERROR_OK)
 170                 return retval;
 171
 172         em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
 173         em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
 174
 175         if (optiondata & (1 << OPT_READOUT))
 176                 LOG_INFO("Device Security Bit Set");
 177
 178         /* each bit refers to a 4bank protection */
 179         retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
 180         if (retval != ERROR_OK)
 181                 return retval;
 182
 183         em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
 184         em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
 185         em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
 186
 187         return ERROR_OK;
 188 }
 189
 190 static int em357_erase_options(struct flash_bank *bank)
 191 {
 192         struct em357_flash_bank *em357_info = NULL;
 193         struct target *target = bank->target;
 194
 195         em357_info = bank->driver_priv;
 196
 197         /* read current options */
 198         em357_read_options(bank);
 199
 200         /* unlock flash registers */
 201         int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
 202         if (retval != ERROR_OK)
 203                 return retval;
 204
 205         retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
 206         if (retval != ERROR_OK)
 207                 return retval;
 208
 209         /* unlock option flash registers */
 210         retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
 211         if (retval != ERROR_OK)
 212                 return retval;
 213         retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
 214         if (retval != ERROR_OK)
 215                 return retval;
 216
 217         /* erase option bytes */
 218         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
 219         if (retval != ERROR_OK)
 220                 return retval;
 221         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
 222         if (retval != ERROR_OK)
 223                 return retval;
 224
 225         retval = em357_wait_status_busy(bank, 10);
 226         if (retval != ERROR_OK)
 227                 return retval;
 228
 229         /* clear readout protection and complementary option bytes
 230          * this will also force a device unlock if set */
 231         em357_info->option_bytes.RDP = 0x5AA5;
 232
 233         return ERROR_OK;
 234 }
 235
 236 static int em357_write_options(struct flash_bank *bank)
 237 {
 238         struct em357_flash_bank *em357_info = NULL;
 239         struct target *target = bank->target;
 240
 241         em357_info = bank->driver_priv;
 242
 243         /* unlock flash registers */
 244         int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
 245         if (retval != ERROR_OK)
 246                 return retval;
 247         retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
 248         if (retval != ERROR_OK)
 249                 return retval;
 250
 251         /* unlock option flash registers */
 252         retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
 253         if (retval != ERROR_OK)
 254                 return retval;
 255         retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
 256         if (retval != ERROR_OK)
 257                 return retval;
 258
 259         /* program option bytes */
 260         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
 261         if (retval != ERROR_OK)
 262                 return retval;
 263
 264         retval = em357_wait_status_busy(bank, 10);
 265         if (retval != ERROR_OK)
 266                 return retval;
 267
 268         /* write protection byte 1 */
 269         retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
 270         if (retval != ERROR_OK)
 271                 return retval;
 272
 273         retval = em357_wait_status_busy(bank, 10);
 274         if (retval != ERROR_OK)
 275                 return retval;
 276
 277         /* write protection byte 2 */
 278         retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
 279         if (retval != ERROR_OK)
 280                 return retval;
 281
 282         retval = em357_wait_status_busy(bank, 10);
 283         if (retval != ERROR_OK)
 284                 return retval;
 285
 286         /* write protection byte 3 */
 287         retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
 288         if (retval != ERROR_OK)
 289                 return retval;
 290
 291         retval = em357_wait_status_busy(bank, 10);
 292         if (retval != ERROR_OK)
 293                 return retval;
 294
 295         /* write readout protection bit */
 296         retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
 297         if (retval != ERROR_OK)
 298                 return retval;
 299
 300         retval = em357_wait_status_busy(bank, 10);
 301         if (retval != ERROR_OK)
 302                 return retval;
 303
 304         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
 305         if (retval != ERROR_OK)
 306                 return retval;
 307
 308         return ERROR_OK;
 309 }
 310
 311 static int em357_protect_check(struct flash_bank *bank)
 312 {
 313         struct target *target = bank->target;
 314         struct em357_flash_bank *em357_info = bank->driver_priv;
 315
 316         uint32_t protection;
 317         int i, s;
 318         int num_bits;
 319         int set;
 320
 321         if (target->state != TARGET_HALTED) {
 322                 LOG_ERROR("Target not halted");
 323                 return ERROR_TARGET_NOT_HALTED;
 324         }
 325
 326         /* each bit refers to a 4bank protection (bit 0-23) */
 327         int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
 328         if (retval != ERROR_OK)
 329                 return retval;
 330
 331         /* each protection bit is for 4 * 2K pages */
 332         num_bits = (bank->num_sectors / em357_info->ppage_size);
 333
 334         for (i = 0; i < num_bits; i++) {
 335                 set = 1;
 336                 if (protection & (1 << i))
 337                         set = 0;
 338
 339                 for (s = 0; s < em357_info->ppage_size; s++)
 340                         bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
 341         }
 342
 343         return ERROR_OK;
 344 }
 345
 346 static int em357_erase(struct flash_bank *bank, int first, int last)
 347 {
 348         struct target *target = bank->target;
 349         int i;
 350
 351         if (bank->target->state != TARGET_HALTED) {
 352                 LOG_ERROR("Target not halted");
 353                 return ERROR_TARGET_NOT_HALTED;
 354         }
 355
 356         if ((first == 0) && (last == (bank->num_sectors - 1)))
 357                 return em357_mass_erase(bank);
 358
 359         /* Enable FPEC clock */
 360         target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
 361
 362         /* unlock flash registers */
 363         int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
 364         if (retval != ERROR_OK)
 365                 return retval;
 366         retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
 367         if (retval != ERROR_OK)
 368                 return retval;
 369
 370         for (i = first; i <= last; i++) {
 371                 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
 372                 if (retval != ERROR_OK)
 373                         return retval;
 374                 retval = target_write_u32(target, EM357_FLASH_AR,
 375                                 bank->base + bank->sectors[i].offset);
 376                 if (retval != ERROR_OK)
 377                         return retval;
 378                 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
 379                 if (retval != ERROR_OK)
 380                         return retval;
 381
 382                 retval = em357_wait_status_busy(bank, 100);
 383                 if (retval != ERROR_OK)
 384                         return retval;
 385
 386                 bank->sectors[i].is_erased = 1;
 387         }
 388
 389         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
 390         if (retval != ERROR_OK)
 391                 return retval;
 392
 393         return ERROR_OK;
 394 }
 395
 396 static int em357_protect(struct flash_bank *bank, int set, int first, int last)
 397 {
 398         struct em357_flash_bank *em357_info = NULL;
 399         struct target *target = bank->target;
 400         uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
 401         int i, reg, bit;
 402         int status;
 403         uint32_t protection;
 404
 405         em357_info = bank->driver_priv;
 406
 407         if (target->state != TARGET_HALTED) {
 408                 LOG_ERROR("Target not halted");
 409                 return ERROR_TARGET_NOT_HALTED;
 410         }
 411
 412         if ((first % em357_info->ppage_size) != 0) {
 413                 LOG_WARNING("aligned start protect sector to a %d sector boundary",
 414                         em357_info->ppage_size);
 415                 first = first - (first % em357_info->ppage_size);
 416         }
 417         if (((last + 1) % em357_info->ppage_size) != 0) {
 418                 LOG_WARNING("aligned end protect sector to a %d sector boundary",
 419                         em357_info->ppage_size);
 420                 last++;
 421                 last = last - (last % em357_info->ppage_size);
 422                 last--;
 423         }
 424
 425         /* each bit refers to a 4bank protection */
 426         int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
 427         if (retval != ERROR_OK)
 428                 return retval;
 429
 430         prot_reg[0] = (uint16_t)protection;
 431         prot_reg[1] = (uint16_t)(protection >> 8);
 432         prot_reg[2] = (uint16_t)(protection >> 16);
 433
 434         for (i = first; i <= last; i++) {
 435                 reg = (i / em357_info->ppage_size) / 8;
 436                 bit = (i / em357_info->ppage_size) - (reg * 8);
 437
 438                 LOG_WARNING("reg, bit: %d, %d", reg, bit);
 439                 if (set)
 440                         prot_reg[reg] &= ~(1 << bit);
 441                 else
 442                         prot_reg[reg] |= (1 << bit);
 443         }
 444
 445         status = em357_erase_options(bank);
 446         if (retval != ERROR_OK)
 447                 return status;
 448
 449         em357_info->option_bytes.protection[0] = prot_reg[0];
 450         em357_info->option_bytes.protection[1] = prot_reg[1];
 451         em357_info->option_bytes.protection[2] = prot_reg[2];
 452
 453         return em357_write_options(bank);
 454 }
 455
 456 static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
 457         uint32_t offset, uint32_t count)
 458 {
 459         struct target *target = bank->target;
 460         uint32_t buffer_size = 16384;
 461         struct working_area *write_algorithm;
 462         struct working_area *source;
 463         uint32_t address = bank->base + offset;
 464         struct reg_param reg_params[4];
 465         struct armv7m_algorithm armv7m_info;
 466         int retval = ERROR_OK;
 467
 468         /* see contib/loaders/flash/stm32x.s for src, the same is used here except for
 469          * a modified *_FLASH_BASE */
 470
 471         static const uint8_t em357_flash_write_code[] = {
 472                 /* #define EM357_FLASH_CR_OFFSET        0x10
 473                  * #define EM357_FLASH_SR_OFFSET        0x0C
 474                  * write: */
 475                 0x08, 0x4c,                                     /* ldr  r4, EM357_FLASH_BASE */
 476                 0x1c, 0x44,                                     /* add  r4, r3 */
 477                 /* write_half_word: */
 478                 0x01, 0x23,                                     /* movs r3, #0x01 */
 479                 0x23, 0x61,                                     /* str  r3, [r4,
 480                                                                  *#EM357_FLASH_CR_OFFSET] */
 481                 0x30, 0xf8, 0x02, 0x3b,         /* ldrh r3, [r0], #0x02 */
 482                 0x21, 0xf8, 0x02, 0x3b,         /* strh r3, [r1], #0x02 */
 483                 /* busy: */
 484                 0xe3, 0x68,                                     /* ldr  r3, [r4,
 485                                                                  *#EM357_FLASH_SR_OFFSET] */
 486                 0x13, 0xf0, 0x01, 0x0f,         /* tst  r3, #0x01 */
 487                 0xfb, 0xd0,                                     /* beq  busy */
 488                 0x13, 0xf0, 0x14, 0x0f,         /* tst  r3, #0x14 */
 489                 0x01, 0xd1,                                     /* bne  exit */
 490                 0x01, 0x3a,                                     /* subs r2, r2, #0x01 */
 491                 0xf0, 0xd1,                                     /* bne  write_half_word */
 492                 /* exit: */
 493                 0x00, 0xbe,                                     /* bkpt #0x00 */
 494                 0x00, 0x80, 0x00, 0x40,         /* EM357_FLASH_BASE: .word 0x40008000 */
 495         };
 496
 497         /* flash write code */
 498         if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
 499                         &write_algorithm) != ERROR_OK) {
 500                 LOG_WARNING("no working area available, can't do block memory writes");
 501                 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 502         }
 503
 504         retval = target_write_buffer(target, write_algorithm->address,
 505                         sizeof(em357_flash_write_code), em357_flash_write_code);
 506         if (retval != ERROR_OK)
 507                 return retval;
 508
 509         /* memory buffer */
 510         while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
 511                 buffer_size /= 2;
 512                 if (buffer_size <= 256) {
 513                         /* we already allocated the writing code, but failed to get a
 514                          * buffer, free the algorithm */
 515                         target_free_working_area(target, write_algorithm);
 516
 517                         LOG_WARNING(
 518                                 "no large enough working area available, can't do block memory writes");
 519                         return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 520                 }
 521         }
 522
 523         armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 524         armv7m_info.core_mode = ARM_MODE_THREAD;
 525
 526         init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
 527         init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
 528         init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
 529         init_reg_param(&reg_params[3], "r3", 32, PARAM_IN_OUT);
 530
 531         while (count > 0) {
 532                 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
 533                         (buffer_size / 2) : count;
 534
 535                 retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
 536                 if (retval != ERROR_OK)
 537                         break;
 538
 539                 buf_set_u32(reg_params[0].value, 0, 32, source->address);
 540                 buf_set_u32(reg_params[1].value, 0, 32, address);
 541                 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
 542                 buf_set_u32(reg_params[3].value, 0, 32, 0);
 543
 544                 retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
 545                                 write_algorithm->address, 0, 10000, &armv7m_info);
 546                 if (retval != ERROR_OK) {
 547                         LOG_ERROR("error executing em357 flash write algorithm");
 548                         break;
 549                 }
 550
 551                 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
 552                         LOG_ERROR("flash memory not erased before writing");
 553                         /* Clear but report errors */
 554                         target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
 555                         retval = ERROR_FAIL;
 556                         break;
 557                 }
 558
 559                 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
 560                         LOG_ERROR("flash memory write protected");
 561                         /* Clear but report errors */
 562                         target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
 563                         retval = ERROR_FAIL;
 564                         break;
 565                 }
 566
 567                 buffer += thisrun_count * 2;
 568                 address += thisrun_count * 2;
 569                 count -= thisrun_count;
 570         }
 571
 572         target_free_working_area(target, source);
 573         target_free_working_area(target, write_algorithm);
 574
 575         destroy_reg_param(&reg_params[0]);
 576         destroy_reg_param(&reg_params[1]);
 577         destroy_reg_param(&reg_params[2]);
 578         destroy_reg_param(&reg_params[3]);
 579
 580         return retval;
 581 }
 582
 583 static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
 584         uint32_t offset, uint32_t count)
 585 {
 586         struct target *target = bank->target;
 587         uint32_t words_remaining = (count / 2);
 588         uint32_t bytes_remaining = (count & 0x00000001);
 589         uint32_t address = bank->base + offset;
 590         uint32_t bytes_written = 0;
 591         int retval;
 592
 593         if (bank->target->state != TARGET_HALTED) {
 594                 LOG_ERROR("Target not halted");
 595                 return ERROR_TARGET_NOT_HALTED;
 596         }
 597
 598         if (offset & 0x1) {
 599                 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
 600                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 601         }
 602
 603         /* unlock flash registers */
 604         retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
 605         if (retval != ERROR_OK)
 606                 return retval;
 607         retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
 608         if (retval != ERROR_OK)
 609                 return retval;
 610
 611         target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
 612
 613         /* multiple half words (2-byte) to be programmed? */
 614         if (words_remaining > 0) {
 615                 /* try using a block write */
 616                 retval = em357_write_block(bank, buffer, offset, words_remaining);
 617                 if (retval != ERROR_OK) {
 618                         if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
 619                                 /* if block write failed (no sufficient working area),
 620                                  * we use normal (slow) single dword accesses */
 621                                 LOG_WARNING(
 622                                         "couldn't use block writes, falling back to single memory accesses");
 623                         }
 624                 } else {
 625                         buffer += words_remaining * 2;
 626                         address += words_remaining * 2;
 627                         words_remaining = 0;
 628                 }
 629         }
 630
 631         if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
 632                 return retval;
 633
 634         while (words_remaining > 0) {
 635                 uint16_t value;
 636                 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
 637
 638                 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
 639                 if (retval != ERROR_OK)
 640                         return retval;
 641                 retval = target_write_u16(target, address, value);
 642                 if (retval != ERROR_OK)
 643                         return retval;
 644
 645                 retval = em357_wait_status_busy(bank, 5);
 646                 if (retval != ERROR_OK)
 647                         return retval;
 648
 649                 bytes_written += 2;
 650                 words_remaining--;
 651                 address += 2;
 652         }
 653
 654         if (bytes_remaining) {
 655                 uint16_t value = 0xffff;
 656                 memcpy(&value, buffer + bytes_written, bytes_remaining);
 657
 658                 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
 659                 if (retval != ERROR_OK)
 660                         return retval;
 661                 retval = target_write_u16(target, address, value);
 662                 if (retval != ERROR_OK)
 663                         return retval;
 664
 665                 retval = em357_wait_status_busy(bank, 5);
 666                 if (retval != ERROR_OK)
 667                         return retval;
 668         }
 669
 670         return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
 671 }
 672
 673 static int em357_probe(struct flash_bank *bank)
 674 {
 675         struct target *target = bank->target;
 676         struct em357_flash_bank *em357_info = bank->driver_priv;
 677         int i;
 678         uint16_t num_pages;
 679         int page_size;
 680         uint32_t base_address = 0x08000000;
 681
 682         em357_info->probed = 0;
 683
 684         switch (bank->size) {
 685                 case 0x10000:
 686                         /* 64k -- 64 1k pages */
 687                         num_pages = 64;
 688                         page_size = 1024;
 689                         break;
 690                 case 0x20000:
 691                         /* 128k -- 128 1k pages */
 692                         num_pages = 128;
 693                         page_size = 1024;
 694                         break;
 695                 case 0x30000:
 696                         /* 192k -- 96 2k pages */
 697                         num_pages = 96;
 698                         page_size = 2048;
 699                         break;
 700                 case 0x40000:
 701                         /* 256k -- 128 2k pages */
 702                         num_pages = 128;
 703                         page_size = 2048;
 704                         break;
 705                 default:
 706                         LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
 707                         num_pages = 96;
 708                         page_size = 2048;
 709                         break;
 710         }
 711
 712         /* Enable FPEC CLK */
 713         int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
 714         if (retval != ERROR_OK)
 715                 return retval;
 716
 717         em357_info->ppage_size = 4;
 718
 719         LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
 720
 721         if (bank->sectors) {
 722                 free(bank->sectors);
 723                 bank->sectors = NULL;
 724         }
 725
 726         bank->base = base_address;
 727         bank->size = (num_pages * page_size);
 728         bank->num_sectors = num_pages;
 729         bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
 730
 731         for (i = 0; i < num_pages; i++) {
 732                 bank->sectors[i].offset = i * page_size;
 733                 bank->sectors[i].size = page_size;
 734                 bank->sectors[i].is_erased = -1;
 735                 bank->sectors[i].is_protected = 1;
 736         }
 737
 738         em357_info->probed = 1;
 739
 740         return ERROR_OK;
 741 }
 742
 743 static int em357_auto_probe(struct flash_bank *bank)
 744 {
 745         struct em357_flash_bank *em357_info = bank->driver_priv;
 746         if (em357_info->probed)
 747                 return ERROR_OK;
 748         return em357_probe(bank);
 749 }
 750
 751 COMMAND_HANDLER(em357_handle_lock_command)
 752 {
 753         struct target *target = NULL;
 754         struct em357_flash_bank *em357_info = NULL;
 755
 756         if (CMD_ARGC < 1)
 757                 return ERROR_COMMAND_SYNTAX_ERROR;
 758
 759         struct flash_bank *bank;
 760         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 761         if (ERROR_OK != retval)
 762                 return retval;
 763
 764         em357_info = bank->driver_priv;
 765
 766         target = bank->target;
 767
 768         if (target->state != TARGET_HALTED) {
 769                 LOG_ERROR("Target not halted");
 770                 return ERROR_TARGET_NOT_HALTED;
 771         }
 772
 773         if (em357_erase_options(bank) != ERROR_OK) {
 774                 command_print(CMD_CTX, "em357 failed to erase options");
 775                 return ERROR_OK;
 776         }
 777
 778         /* set readout protection */
 779         em357_info->option_bytes.RDP = 0;
 780
 781         if (em357_write_options(bank) != ERROR_OK) {
 782                 command_print(CMD_CTX, "em357 failed to lock device");
 783                 return ERROR_OK;
 784         }
 785
 786         command_print(CMD_CTX, "em357 locked");
 787
 788         return ERROR_OK;
 789 }
 790
 791 COMMAND_HANDLER(em357_handle_unlock_command)
 792 {
 793         struct target *target = NULL;
 794
 795         if (CMD_ARGC < 1)
 796                 return ERROR_COMMAND_SYNTAX_ERROR;
 797
 798         struct flash_bank *bank;
 799         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 800         if (ERROR_OK != retval)
 801                 return retval;
 802
 803         target = bank->target;
 804
 805         if (target->state != TARGET_HALTED) {
 806                 LOG_ERROR("Target not halted");
 807                 return ERROR_TARGET_NOT_HALTED;
 808         }
 809
 810         if (em357_erase_options(bank) != ERROR_OK) {
 811                 command_print(CMD_CTX, "em357 failed to unlock device");
 812                 return ERROR_OK;
 813         }
 814
 815         if (em357_write_options(bank) != ERROR_OK) {
 816                 command_print(CMD_CTX, "em357 failed to lock device");
 817                 return ERROR_OK;
 818         }
 819
 820         command_print(CMD_CTX, "em357 unlocked.\n"
 821                 "INFO: a reset or power cycle is required "
 822                 "for the new settings to take effect.");
 823
 824         return ERROR_OK;
 825 }
 826
 827 static int em357_mass_erase(struct flash_bank *bank)
 828 {
 829         struct target *target = bank->target;
 830
 831         if (target->state != TARGET_HALTED) {
 832                 LOG_ERROR("Target not halted");
 833                 return ERROR_TARGET_NOT_HALTED;
 834         }
 835
 836         /* Make sure the flash clock is on */
 837         target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
 838
 839         /* unlock option flash registers */
 840         int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
 841         if (retval != ERROR_OK)
 842                 return retval;
 843         retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
 844         if (retval != ERROR_OK)
 845                 return retval;
 846
 847         /* mass erase flash memory */
 848         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
 849         if (retval != ERROR_OK)
 850                 return retval;
 851         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
 852         if (retval != ERROR_OK)
 853                 return retval;
 854
 855         retval = em357_wait_status_busy(bank, 100);
 856         if (retval != ERROR_OK)
 857                 return retval;
 858
 859         retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
 860         if (retval != ERROR_OK)
 861                 return retval;
 862
 863         return ERROR_OK;
 864 }
 865
 866 COMMAND_HANDLER(em357_handle_mass_erase_command)
 867 {
 868         int i;
 869
 870         if (CMD_ARGC < 1)
 871                 return ERROR_COMMAND_SYNTAX_ERROR;
 872
 873         struct flash_bank *bank;
 874         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 875         if (ERROR_OK != retval)
 876                 return retval;
 877
 878         retval = em357_mass_erase(bank);
 879         if (retval == ERROR_OK) {
 880                 /* set all sectors as erased */
 881                 for (i = 0; i < bank->num_sectors; i++)
 882                         bank->sectors[i].is_erased = 1;
 883
 884                 command_print(CMD_CTX, "em357 mass erase complete");
 885         } else
 886                 command_print(CMD_CTX, "em357 mass erase failed");
 887
 888         return retval;
 889 }
 890
 891 static const struct command_registration em357_exec_command_handlers[] = {
 892         {
 893                 .name = "lock",
 894                 .usage = "<bank>",
 895                 .handler = em357_handle_lock_command,
 896                 .mode = COMMAND_EXEC,
 897                 .help = "Lock entire flash device.",
 898         },
 899         {
 900                 .name = "unlock",
 901                 .usage = "<bank>",
 902                 .handler = em357_handle_unlock_command,
 903                 .mode = COMMAND_EXEC,
 904                 .help = "Unlock entire protected flash device.",
 905         },
 906         {
 907                 .name = "mass_erase",
 908                 .usage = "<bank>",
 909                 .handler = em357_handle_mass_erase_command,
 910                 .mode = COMMAND_EXEC,
 911                 .help = "Erase entire flash device.",
 912         },
 913         COMMAND_REGISTRATION_DONE
 914 };
 915
 916 static const struct command_registration em357_command_handlers[] = {
 917         {
 918                 .name = "em357",
 919                 .mode = COMMAND_ANY,
 920                 .help = "em357 flash command group",
 921                 .usage = "",
 922                 .chain = em357_exec_command_handlers,
 923         },
 924         COMMAND_REGISTRATION_DONE
 925 };
 926
 927 struct flash_driver em357_flash = {
 928         .name = "em357",
 929         .commands = em357_command_handlers,
 930         .flash_bank_command = em357_flash_bank_command,
 931         .erase = em357_erase,
 932         .protect = em357_protect,
 933         .write = em357_write,
 934         .read = default_flash_read,
 935         .probe = em357_probe,
 936         .auto_probe = em357_auto_probe,
 937         .erase_check = default_flash_blank_check,
 938         .protect_check = em357_protect_check,
 939 };