1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
50 #include <target/embeddedice.h>
51 #include <jtag/minidriver.h>
52 #include <jtag/interface.h>
54 #include <helper/time_support.h>
56 #include <netinet/tcp.h>
59 #include "zy1000_version.h"
61 #include <cyg/hal/hal_io.h> /* low level i/o */
62 #include <cyg/hal/hal_diag.h>
64 #ifdef CYGPKG_HAL_NIOS2
65 #include <cyg/hal/io.h>
66 #include <cyg/firmwareutil/firmwareutil.h>
67 #define ZYLIN_KHZ 60000
69 #define ZYLIN_KHZ 64000
72 #define ZYLIN_VERSION GIT_ZY1000_VERSION
73 #define ZYLIN_DATE __DATE__
74 #define ZYLIN_TIME __TIME__
75 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
76 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
79 /* Assume we're connecting to a revc w/60MHz clock. */
80 #define ZYLIN_KHZ 60000
83 /* The software needs to check if it's in RCLK mode or not */
84 static bool zy1000_rclk;
86 static int zy1000_khz(int khz, int *jtag_speed)
92 /* Round speed up to nearest divisor.
95 * (64000 + 15999) / 16000 = 4
102 * (64000 + 15998) / 15999 = 5
109 speed = (ZYLIN_KHZ + (khz - 1)) / khz;
110 speed = (speed + 1) / 2;
113 /* maximum dividend */
121 static int zy1000_speed_div(int speed, int *khz)
126 *khz = ZYLIN_KHZ / speed;
131 static bool readPowerDropout(void)
134 /* sample and clear power dropout */
135 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
136 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
138 powerDropout = (state & 0x80) != 0;
143 static bool readSRST(void)
146 /* sample and clear SRST sensing */
147 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
148 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
150 srstAsserted = (state & 0x40) != 0;
154 static int zy1000_srst_asserted(int *srst_asserted)
156 *srst_asserted = readSRST();
160 static int zy1000_power_dropout(int *dropout)
162 *dropout = readPowerDropout();
166 /* Wait for SRST to assert or deassert */
167 static void waitSRST(bool asserted)
172 const char *mode = asserted ? "assert" : "deassert";
175 bool srstAsserted = readSRST();
176 if ((asserted && srstAsserted) || (!asserted && !srstAsserted)) {
178 LOG_USER("SRST took %dms to %s", (int)total, mode);
184 start = timeval_ms();
187 total = timeval_ms() - start;
192 LOG_ERROR("SRST took too long to %s: %dms", mode, (int)total);
198 void zy1000_reset(int trst, int srst)
200 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
202 /* flush the JTAG FIFO. Not flushing the queue before messing with
203 * reset has such interesting bugs as causing hard to reproduce
204 * RCLK bugs as RCLK will stop responding when TRST is asserted
209 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
211 /* Danger!!! if clk != 0 when in
212 * idle in TAP_IDLE, reset halt on str912 will fail.
214 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
220 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
223 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
226 if (trst || (srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST))) {
227 /* we're now in the RESET state until trst is deasserted */
228 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
230 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
231 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
234 /* wait for srst to float back up */
235 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0)) ||
236 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
240 int zy1000_speed(int speed)
242 /* flush JTAG master FIFO before setting speed */
249 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
251 LOG_DEBUG("jtag_speed using RCLK");
253 if (speed > 8190 || speed < 2) {
255 "valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
257 (ZYLIN_KHZ * 1000) / 8190,
258 ZYLIN_KHZ / (2 * 1000));
259 return ERROR_COMMAND_SYNTAX_ERROR;
264 zy1000_speed_div(speed, &khz);
265 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
266 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
267 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
272 static bool savePower;
274 static void setPower(bool power)
278 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
280 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
283 COMMAND_HANDLER(handle_power_command)
288 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
293 LOG_INFO("Target power %s", savePower ? "on" : "off");
296 return ERROR_COMMAND_SYNTAX_ERROR;
302 #if !BUILD_ZY1000_MASTER
303 static char *tcp_server = "notspecified";
304 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
309 tcp_server = strdup(Jim_GetString(argv[1], NULL));
316 /* Give TELNET a way to find out what version this is */
317 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
319 if ((argc < 1) || (argc > 3))
321 const char *version_str = NULL;
324 version_str = ZYLIN_OPENOCD_VERSION;
326 const char *str = Jim_GetString(argv[1], NULL);
327 const char *str2 = NULL;
329 str2 = Jim_GetString(argv[2], NULL);
330 if (strcmp("openocd", str) == 0)
331 version_str = ZYLIN_OPENOCD;
332 else if (strcmp("zy1000", str) == 0)
333 version_str = ZYLIN_VERSION;
334 else if (strcmp("date", str) == 0)
335 version_str = ZYLIN_DATE;
336 else if (strcmp("time", str) == 0)
337 version_str = ZYLIN_TIME;
338 else if (strcmp("pcb", str) == 0) {
339 #ifdef CYGPKG_HAL_NIOS2
345 #ifdef CYGPKG_HAL_NIOS2
346 else if (strcmp("fpga", str) == 0) {
348 /* return a list of 32 bit integers to describe the expected
351 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
352 uint32_t id, timestamp;
353 HAL_READ_UINT32(SYSID_BASE, id);
354 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
356 "0x%08x 0x%08x 0x%08x 0x%08x",
361 version_str = fpga_id;
362 if ((argc > 2) && (strcmp("time", str2) == 0)) {
363 time_t last_mod = timestamp;
364 char *t = ctime(&last_mod);
375 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
381 #ifdef CYGPKG_HAL_NIOS2
384 struct info_forward {
386 struct cyg_upgrade_info *upgraded_file;
389 static void report_info(void *data, const char *format, va_list args)
391 char *s = alloc_vprintf(format, args);
396 struct cyg_upgrade_info firmware_info = {
397 (uint8_t *)0x84000000,
403 "ZylinNiosFirmware\n",
407 /* File written to /ram/firmware.phi before arriving at this fn */
408 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
413 if (!cyg_firmware_upgrade(NULL, firmware_info))
420 static int zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
422 Jim_Obj * const *argv)
425 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
429 bool dropout = readPowerDropout();
431 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
436 int zy1000_quit(void)
442 int interface_jtag_execute_queue(void)
448 /* We must make sure to write data read back to memory location before we return
451 zy1000_flush_readqueue();
453 /* and handle any callbacks... */
454 zy1000_flush_callbackqueue();
457 /* Only check for errors when using RCLK to speed up
460 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
461 /* clear JTAG error register */
462 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
464 if ((empty&0x400) != 0) {
465 LOG_WARNING("RCLK timeout");
466 /* the error is informative only as we don't want to break the firmware if there
467 * is a false positive.
469 /* return ERROR_FAIL; */
475 static void writeShiftValue(uint8_t *data, int bits);
477 /* here we shuffle N bits out/in */
478 static inline void scanBits(const uint8_t *out_value,
482 tap_state_t shiftState,
483 tap_state_t end_state)
485 tap_state_t pause_state = shiftState;
486 for (int j = 0; j < num_bits; j += 32) {
487 int k = num_bits - j;
490 /* we have more to shift out */
491 } else if (pause_now) {
492 /* this was the last to shift out this time */
493 pause_state = end_state;
496 /* we have (num_bits + 7)/8 bytes of bits to toggle out. */
497 /* bits are pushed out LSB to MSB */
500 if (out_value != NULL) {
501 for (int l = 0; l < k; l += 8)
502 value |= out_value[(j + l)/8]<<l;
504 /* mask away unused bits for easier debugging */
506 value &= ~(((uint32_t)0xffffffff) << k);
508 /* Shifting by >= 32 is not defined by the C standard
509 * and will in fact shift by &0x1f bits on nios */
512 shiftValueInner(shiftState, pause_state, k, value);
514 if (in_value != NULL)
515 writeShiftValue(in_value + (j/8), k);
519 static inline void scanFields(int num_fields,
520 const struct scan_field *fields,
521 tap_state_t shiftState,
522 tap_state_t end_state)
524 for (int i = 0; i < num_fields; i++) {
525 scanBits(fields[i].out_value,
534 int interface_jtag_add_ir_scan(struct jtag_tap *active,
535 const struct scan_field *fields,
539 struct jtag_tap *tap, *nextTap;
540 tap_state_t pause_state = TAP_IRSHIFT;
542 for (tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = nextTap) {
543 nextTap = jtag_tap_next_enabled(tap);
546 scan_size = tap->ir_length;
548 /* search the list */
550 scanFields(1, fields, TAP_IRSHIFT, pause_state);
551 /* update device information */
552 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
556 /* if a device isn't listed, set it to BYPASS */
557 assert(scan_size <= 32);
558 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
560 /* Optimization code will check what the cur_instr is set to, so
561 * we must set it to bypass value.
563 buf_set_ones(tap->cur_instr, tap->ir_length);
572 int interface_jtag_add_plain_ir_scan(int num_bits,
573 const uint8_t *out_bits,
577 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
581 int interface_jtag_add_dr_scan(struct jtag_tap *active,
583 const struct scan_field *fields,
586 struct jtag_tap *tap, *nextTap;
587 tap_state_t pause_state = TAP_DRSHIFT;
588 for (tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = nextTap) {
589 nextTap = jtag_tap_next_enabled(tap);
593 /* Find a range of fields to write to this tap */
595 assert(!tap->bypass);
597 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
599 /* Shift out a 0 for disabled tap's */
601 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
607 int interface_jtag_add_plain_dr_scan(int num_bits,
608 const uint8_t *out_bits,
612 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
616 int interface_jtag_add_tlr()
618 setCurrentState(TAP_RESET);
622 int interface_jtag_add_reset(int req_trst, int req_srst)
624 zy1000_reset(req_trst, req_srst);
628 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
630 /* num_cycles can be 0 */
631 setCurrentState(clockstate);
633 /* execute num_cycles, 32 at the time. */
635 for (i = 0; i < num_cycles; i += 32) {
638 if (num_cycles-i < num)
640 shiftValueInner(clockstate, clockstate, num, 0);
644 /* finish in end_state */
645 setCurrentState(state);
647 tap_state_t t = TAP_IDLE;
648 /* test manual drive code on any target */
650 uint8_t tms_scan = tap_get_tms_path(t, state);
651 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
653 for (i = 0; i < tms_count; i++) {
654 tms = (tms_scan >> i) & 1;
656 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
659 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
665 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
667 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
670 int interface_jtag_add_clocks(int num_cycles)
672 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
675 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
677 /*wait for the fifo to be empty*/
680 for (unsigned i = 0; i < num_bits; i++) {
683 if (((seq[i/8] >> (i % 8)) & 1) == 0)
689 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
693 if (state != TAP_INVALID)
694 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
696 /* this would be normal if
697 * we are switching to SWD mode */
702 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
709 tap_state_t cur_state = cmd_queue_cur_state;
712 memset(seq, 0, sizeof(seq));
713 assert(num_states < (int)((sizeof(seq) * 8)));
716 if (tap_state_transition(cur_state, false) == path[state_count])
718 else if (tap_state_transition(cur_state, true) == path[state_count])
721 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
722 tap_state_name(cur_state), tap_state_name(path[state_count]));
726 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
728 cur_state = path[state_count];
733 return interface_add_tms_seq(state_count, seq, cur_state);
736 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
738 /* bypass bits before and after */
743 struct jtag_tap *cur_tap, *nextTap;
744 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap != NULL; cur_tap = nextTap) {
745 nextTap = jtag_tap_next_enabled(cur_tap);
760 static const int embeddedice_num_bits[] = {32, 6};
764 values[1] = (1 << 5) | reg_addr;
766 jtag_add_dr_out(tap, 2, embeddedice_num_bits, values, TAP_IDLE);
769 void embeddedice_write_dcc(struct jtag_tap *tap,
771 const uint8_t *buffer,
777 for (i = 0; i < count; i++) {
778 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer,
785 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
787 if ((pre_bits > 32) || (post_bits + 6 > 32)) {
789 for (i = 0; i < count; i++) {
790 embeddedice_write_reg_inner(tap, reg_addr,
791 fast_target_buffer_get_u32(buffer, little));
796 for (i = 0; i < count; i++) {
797 /* Fewer pokes means we get to use the FIFO more efficiently */
798 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
799 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32,
800 fast_target_buffer_get_u32(buffer, little));
801 /* Danger! here we need to exit into the TAP_IDLE state to make
802 * DCC pick up this value.
804 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits,
805 (reg_addr | (1 << 5)));
812 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap,
814 const uint32_t *data,
817 /* bypass bits before and after */
820 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
823 if ((pre_bits > 32) || (post_bits > 32)) {
824 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *,
825 uint32_t, const uint32_t *, size_t);
826 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
828 static const int bits[] = {32, 2};
829 uint32_t values[] = {0, 0};
831 /* FIX!!!!!! the target_write_memory() API started this nasty problem
832 * with unaligned uint32_t * pointers... */
833 const uint8_t *t = (const uint8_t *)data;
835 while (--count > 0) {
837 /* Danger! This code doesn't update cmd_queue_cur_state, so
838 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
839 * this loop would fail!
841 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
849 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
851 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
853 /* copy & paste from arm11_dbgtap.c */
854 /* TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT,
855 * TAP_DRCAPTURE, TAP_DRSHIFT */
856 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
857 * This is probably a bug in the Avalon bus(cross clocking bridge?)
858 * or in the jtag registers module.
861 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
862 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
863 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
864 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
865 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
866 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
867 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
868 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
869 /* we don't have to wait for the queue to empty here */
870 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
873 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] = {
874 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE,
875 TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
879 values[0] |= (*t++<<8);
880 values[0] |= (*t++<<16);
881 values[0] |= (*t++<<24);
889 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
890 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
895 values[0] |= (*t++<<8);
896 values[0] |= (*t++<<16);
897 values[0] |= (*t++<<24);
899 /* This will happen on the last iteration updating cmd_queue_cur_state
900 * so we don't have to track it during the common code path
908 return jtag_execute_queue();
912 static const struct command_registration zy1000_commands[] = {
915 .handler = handle_power_command,
917 .help = "Turn power switch to target on/off. "
918 "With no arguments, prints status.",
919 .usage = "('on'|'off)",
921 #if BUILD_ZY1000_MASTER
924 .name = "zy1000_version",
926 .jim_handler = jim_zy1000_version,
927 .help = "Print version info for zy1000.",
928 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
933 .name = "zy1000_server",
935 .jim_handler = jim_zy1000_server,
936 .help = "Tcpip address for ZY1000 server.",
941 .name = "powerstatus",
943 .jim_handler = zylinjtag_Jim_Command_powerstatus,
944 .help = "Returns power status of target",
946 #ifdef CYGPKG_HAL_NIOS2
948 .name = "updatezy1000firmware",
950 .jim_handler = jim_zy1000_writefirmware,
951 .help = "writes firmware to flash",
952 /* .usage = "some_string", */
955 COMMAND_REGISTRATION_DONE
958 #if !BUILD_ZY1000_MASTER
960 static int tcp_ip = -1;
962 /* Write large packets if we can */
963 static size_t out_pos;
964 static uint8_t out_buffer[16384];
965 static size_t in_pos;
966 static size_t in_write;
967 static uint8_t in_buffer[16384];
969 static bool flush_writes(void)
971 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
976 static bool writeLong(uint32_t l)
979 for (i = 0; i < 4; i++) {
980 uint8_t c = (l >> (i*8))&0xff;
981 out_buffer[out_pos++] = c;
982 if (out_pos >= sizeof(out_buffer)) {
990 static bool readLong(uint32_t *out_data)
994 for (i = 0; i < 4; i++) {
996 if (in_pos == in_write) {
997 /* If we have some data that we can send, send them before
998 * we wait for more data
1001 if (!flush_writes())
1007 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1010 in_write = (size_t) t;
1013 c = in_buffer[in_pos++];
1015 data |= (c << (i*8));
1022 ZY1000_CMD_POKE = 0x0,
1023 ZY1000_CMD_PEEK = 0x8,
1024 ZY1000_CMD_SLEEP = 0x1,
1025 ZY1000_CMD_WAITIDLE = 2
1028 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1029 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1031 /* We initialize this late since we need to know the server address
1034 static void tcpip_open(void)
1039 struct sockaddr_in echoServAddr;/* Echo server address */
1041 /* Create a reliable, stream socket using TCP */
1042 tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP);
1044 fprintf(stderr, "Failed to connect to zy1000 server\n");
1048 /* Construct the server address structure */
1049 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1050 echoServAddr.sin_family = AF_INET; /* Internet address family */
1051 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1052 echoServAddr.sin_port = htons(7777); /* Server port */
1054 /* Establish the connection to the echo server */
1055 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0) {
1056 fprintf(stderr, "Failed to connect to zy1000 server\n");
1061 setsockopt(tcp_ip, /* socket affected */
1062 IPPROTO_TCP, /* set option at TCP level */
1063 TCP_NODELAY, /* name of option */
1064 (char *)&flag, /* the cast is historical cruft */
1065 sizeof(int)); /* length of option value */
1070 void zy1000_tcpout(uint32_t address, uint32_t data)
1073 if (!writeLong((ZY1000_CMD_POKE << 24) | address) || !writeLong(data)) {
1074 fprintf(stderr, "Could not write to zy1000 server\n");
1079 /* By sending the wait to the server, we avoid a readback
1080 * of status. Radically improves performance for this operation
1081 * with long ping times.
1086 if (!writeLong((ZY1000_CMD_WAITIDLE << 24))) {
1087 fprintf(stderr, "Could not write to zy1000 server\n");
1092 uint32_t zy1000_tcpin(uint32_t address)
1096 zy1000_flush_readqueue();
1099 if (!writeLong((ZY1000_CMD_PEEK << 24) | address) || !readLong(&data)) {
1100 fprintf(stderr, "Could not read from zy1000 server\n");
1106 int interface_jtag_add_sleep(uint32_t us)
1109 if (!writeLong((ZY1000_CMD_SLEEP << 24)) || !writeLong(us)) {
1110 fprintf(stderr, "Could not read from zy1000 server\n");
1116 /* queue a readback */
1117 #define readqueue_size 16384
1121 } readqueue[readqueue_size];
1123 static int readqueue_pos;
1125 /* flush the readqueue, this means reading any data that
1126 * we're expecting and store them into the final position
1128 void zy1000_flush_readqueue(void)
1130 if (readqueue_pos == 0) {
1131 /* simply debugging by allowing easy breakpoints when there
1132 * is something to do. */
1137 for (i = 0; i < readqueue_pos; i++) {
1139 if (!readLong(&value)) {
1140 fprintf(stderr, "Could not read from zy1000 server\n");
1144 uint8_t *in_value = readqueue[i].dest;
1145 int k = readqueue[i].bits;
1147 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
1150 for (int l = 0; l < k; l += 8)
1151 in_value[l/8] = (value >> l)&0xff;
1156 /* By queuing the callback's we avoid flushing the
1157 * read queue until jtag_execute_queue(). This can
1158 * reduce latency dramatically for cases where
1159 * callbacks are used extensively.
1161 #define callbackqueue_size 128
1162 static struct callbackentry {
1163 jtag_callback_t callback;
1164 jtag_callback_data_t data0;
1165 jtag_callback_data_t data1;
1166 jtag_callback_data_t data2;
1167 jtag_callback_data_t data3;
1168 } callbackqueue[callbackqueue_size];
1170 static int callbackqueue_pos;
1172 void zy1000_jtag_add_callback4(jtag_callback_t callback,
1173 jtag_callback_data_t data0,
1174 jtag_callback_data_t data1,
1175 jtag_callback_data_t data2,
1176 jtag_callback_data_t data3)
1178 if (callbackqueue_pos >= callbackqueue_size)
1179 zy1000_flush_callbackqueue();
1181 callbackqueue[callbackqueue_pos].callback = callback;
1182 callbackqueue[callbackqueue_pos].data0 = data0;
1183 callbackqueue[callbackqueue_pos].data1 = data1;
1184 callbackqueue[callbackqueue_pos].data2 = data2;
1185 callbackqueue[callbackqueue_pos].data3 = data3;
1186 callbackqueue_pos++;
1189 * make callbacks synchronous for now as minidriver requires callback
1190 * to be synchronous.
1192 * We can get away with making read and writes asynchronous so we
1193 * don't completely kill performance.
1195 zy1000_flush_callbackqueue();
1198 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0,
1199 jtag_callback_data_t data1,
1200 jtag_callback_data_t data2,
1201 jtag_callback_data_t data3)
1203 ((jtag_callback1_t)data1)(data0);
1207 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1209 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4,
1211 (jtag_callback_data_t)callback,
1216 void zy1000_flush_callbackqueue(void)
1218 /* we have to flush the read queue so we have access to
1219 the data the callbacks will use
1221 zy1000_flush_readqueue();
1223 for (i = 0; i < callbackqueue_pos; i++) {
1224 struct callbackentry *entry = &callbackqueue[i];
1225 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2,
1228 callbackqueue_pos = 0;
1231 static void writeShiftValue(uint8_t *data, int bits)
1235 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc))) {
1236 fprintf(stderr, "Could not read from zy1000 server\n");
1240 if (readqueue_pos >= readqueue_size)
1241 zy1000_flush_readqueue();
1243 readqueue[readqueue_pos].dest = data;
1244 readqueue[readqueue_pos].bits = bits;
1247 /* KLUDGE!!! minidriver requires readqueue to be synchronous */
1248 zy1000_flush_readqueue();
1253 static void writeShiftValue(uint8_t *data, int bits)
1257 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1258 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1260 /* data in, LSB to MSB */
1261 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
1262 value >>= 32 - bits;
1264 for (int l = 0; l < bits; l += 8)
1265 data[l/8] = (value >> l)&0xff;
1270 #if BUILD_ZY1000_MASTER
1273 static char watchdog_stack[2048];
1274 static cyg_thread watchdog_thread_object;
1275 static cyg_handle_t watchdog_thread_handle;
1278 #ifdef WATCHDOG_BASE
1279 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1280 static void watchdog_server(cyg_addrword_t data)
1282 int so_reuseaddr_option = 1;
1284 int fd = socket(AF_INET, SOCK_STREAM, 0);
1286 LOG_ERROR("error creating socket: %s", strerror(errno));
1290 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void *) &so_reuseaddr_option,
1293 struct sockaddr_in sin;
1294 unsigned int address_size;
1295 address_size = sizeof(sin);
1296 memset(&sin, 0, sizeof(sin));
1297 sin.sin_family = AF_INET;
1298 sin.sin_addr.s_addr = INADDR_ANY;
1299 sin.sin_port = htons(8888);
1301 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1) {
1302 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1306 if (listen(fd, 1) == -1) {
1307 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1313 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1315 /* Start watchdog, must be reset every 10 seconds. */
1316 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1318 if (watchdog_ip < 0) {
1319 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1324 setsockopt(watchdog_ip, /* socket affected */
1325 IPPROTO_TCP, /* set option at TCP level */
1326 TCP_NODELAY, /* name of option */
1327 (char *)&flag, /* the cast is historical cruft */
1328 sizeof(int)); /* length of option value */
1333 if (read(watchdog_ip, &buf, 1) == 1) {
1335 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1336 /* Echo so we can telnet in and see that resetting works */
1337 write(watchdog_ip, &buf, 1);
1339 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1354 #if BUILD_ZY1000_MASTER
1355 int interface_jtag_add_sleep(uint32_t us)
1362 #if BUILD_ZY1000_MASTER && !BUILD_ECOSBOARD
1363 volatile void *zy1000_jtag_master;
1364 #include <sys/mman.h>
1367 int zy1000_init(void)
1370 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1371 #elif BUILD_ZY1000_MASTER
1372 int fd = open("/dev/mem", O_RDWR | O_SYNC);
1374 LOG_ERROR("No access to /dev/mem");
1377 #ifndef REGISTERS_BASE
1378 #define REGISTERS_BASE 0x9002000
1379 #define REGISTERS_SPAN 128
1382 zy1000_jtag_master = mmap(0,
1384 PROT_READ | PROT_WRITE,
1389 if (zy1000_jtag_master == (void *) -1) {
1391 LOG_ERROR("No access to /dev/mem");
1396 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); /* Turn on LED1 & LED2 */
1398 setPower(true); /* on by default */
1400 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1403 #if BUILD_ZY1000_MASTER
1405 #ifdef WATCHDOG_BASE
1406 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1407 (void *) watchdog_stack, sizeof(watchdog_stack),
1408 &watchdog_thread_handle, &watchdog_thread_object);
1409 cyg_thread_resume(watchdog_thread_handle);
1417 struct jtag_interface zy1000_interface = {
1419 .supported = DEBUG_CAP_TMS_SEQ,
1420 .execute_queue = NULL,
1421 .speed = zy1000_speed,
1422 .commands = zy1000_commands,
1423 .init = zy1000_init,
1424 .quit = zy1000_quit,
1426 .speed_div = zy1000_speed_div,
1427 .power_dropout = zy1000_power_dropout,
1428 .srst_asserted = zy1000_srst_asserted,