]> git.sur5r.net Git - openocd/blob - src/target/Makefile.am
ADIv5 transport support moves to separate files
[openocd] / src / target / Makefile.am
1
2 if OOCD_TRACE
3 OOCD_TRACE_FILES = oocd_trace.c
4 else
5 OOCD_TRACE_FILES =
6 endif
7
8 AM_CPPFLAGS = \
9         -I$(top_srcdir)/src \
10         -I$(top_builddir)/src
11
12 BIN2C           = $(top_builddir)/src/helper/bin2char$(EXEEXT_FOR_BUILD)
13
14 DEBUG_HANDLER   = $(srcdir)/xscale/debug_handler.bin
15 EXTRA_DIST = \
16         startup.tcl \
17         $(DEBUG_HANDLER)
18
19 DEBUG_HEADER    = xscale_debug.h
20 BUILT_SOURCES = $(DEBUG_HEADER)
21 CLEANFILES = $(DEBUG_HEADER)
22
23 $(DEBUG_HEADER): $(BIN2C) $(DEBUG_HANDLER)
24         $(BIN2C) < $(DEBUG_HANDLER) xscale_debug_handler > xscale_debug.h
25
26 METASOURCES = AUTO
27 noinst_LTLIBRARIES = libtarget.la
28 libtarget_la_SOURCES = \
29         $(TARGET_CORE_SRC) \
30         $(ARM_DEBUG_SRC) \
31         $(ARMV4_5_SRC) \
32         $(ARMV6_SRC) \
33         $(ARMV7_SRC) \
34         $(ARM_MISC_SRC) \
35         $(MIPS32_SRC) \
36         avrt.c \
37         dsp563xx.c \
38         dsp563xx_once.c
39
40 TARGET_CORE_SRC = \
41         algorithm.c \
42         register.c \
43         image.c \
44         breakpoints.c \
45         target.c \
46         target_request.c \
47         testee.c
48
49 ARMV4_5_SRC = \
50         armv4_5.c \
51         armv4_5_mmu.c \
52         armv4_5_cache.c \
53         $(ARM7_9_SRC)
54
55 ARM7_9_SRC = \
56         arm7_9_common.c \
57         arm7tdmi.c \
58         arm720t.c \
59         arm9tdmi.c \
60         arm920t.c \
61         arm966e.c \
62         arm926ejs.c \
63         feroceon.c
64
65 ARM_MISC_SRC = \
66         fa526.c \
67         xscale.c
68
69 ARMV6_SRC = \
70         arm11.c \
71         arm11_dbgtap.c
72
73 ARMV7_SRC = \
74         armv7m.c \
75         cortex_m3.c \
76         armv7a.c \
77         cortex_a8.c
78
79 ARM_DEBUG_SRC = \
80         arm_dpm.c \
81         arm_jtag.c \
82         arm_disassembler.c \
83         arm_simulator.c \
84         arm_semihosting.c \
85         arm_adi_v5.c \
86         adi_v5_jtag.c \
87         adi_v5_swd.c \
88         embeddedice.c \
89         trace.c \
90         etb.c \
91         etm.c \
92         $(OOCD_TRACE_FILES) \
93         etm_dummy.c
94
95 MIPS32_SRC = \
96         mips32.c \
97         mips_m4k.c \
98         mips32_pracc.c \
99         mips32_dmaacc.c \
100         mips_ejtag.c
101
102
103 noinst_HEADERS = \
104         algorithm.h \
105         arm.h \
106         arm_dpm.h \
107         arm_jtag.h \
108         arm_adi_v5.h \
109         arm_disassembler.h \
110         arm_opcodes.h \
111         arm_simulator.h \
112         arm_semihosting.h \
113         arm7_9_common.h \
114         arm7tdmi.h \
115         arm720t.h \
116         arm9tdmi.h \
117         arm920t.h \
118         arm926ejs.h \
119         arm966e.h \
120         arm11.h \
121         arm11_dbgtap.h \
122         armv4_5.h \
123         armv4_5_mmu.h \
124         armv4_5_cache.h \
125         armv7a.h \
126         armv7m.h \
127         avrt.h \
128         dsp563xx.h \
129         dsp563xx_once.h \
130         breakpoints.h \
131         cortex_m3.h \
132         cortex_a8.h \
133         embeddedice.h \
134         etb.h \
135         etm.h \
136         etm_dummy.h \
137         image.h \
138         mips32.h \
139         mips_m4k.h \
140         mips_ejtag.h \
141         mips32_pracc.h \
142         mips32_dmaacc.h \
143         oocd_trace.h \
144         register.h \
145         target.h \
146         target_type.h \
147         trace.h \
148         target_request.h \
149         trace.h \
150         xscale.h \
151         xscale_debug.h
152
153 nobase_dist_pkglib_DATA =
154 nobase_dist_pkglib_DATA += ecos/at91eb40a.elf
155
156 MAINTAINERCLEANFILES = $(srcdir)/Makefile.in