git.sur5r.net Git - openocd/blob - src/target/Makefile.am

   1 if OOCD_TRACE
   2 OOCD_TRACE_FILES = %D%/oocd_trace.c
   3 else
   4 OOCD_TRACE_FILES =
   5 endif
   6
   7 %C%_libtarget_la_LIBADD = %D%/openrisc/libopenrisc.la
   8
   9 STARTUP_TCL_SRCS += %D%/startup.tcl
  10
  11 noinst_LTLIBRARIES += %D%/libtarget.la
  12 %C%_libtarget_la_SOURCES = \
  13         $(TARGET_CORE_SRC) \
  14         $(ARM_DEBUG_SRC) \
  15         $(ARMV4_5_SRC) \
  16         $(ARMV6_SRC) \
  17         $(ARMV7_SRC) \
  18         $(ARM_MISC_SRC) \
  19         $(AVR32_SRC) \
  20         $(MIPS32_SRC) \
  21         $(NDS32_SRC) \
  22         $(INTEL_IA32_SRC) \
  23         %D%/avrt.c \
  24         %D%/dsp563xx.c \
  25         %D%/dsp563xx_once.c \
  26         %D%/dsp5680xx.c \
  27         %D%/hla_target.c
  28
  29 if TARGET64
  30 %C%_libtarget_la_SOURCES +=$(ARMV8_SRC)
  31 endif
  32
  33 TARGET_CORE_SRC = \
  34         %D%/algorithm.c \
  35         %D%/register.c \
  36         %D%/image.c \
  37         %D%/breakpoints.c \
  38         %D%/target.c \
  39         %D%/target_request.c \
  40         %D%/testee.c \
  41         %D%/smp.c
  42
  43 ARMV4_5_SRC = \
  44         %D%/armv4_5.c \
  45         %D%/armv4_5_mmu.c \
  46         %D%/armv4_5_cache.c \
  47         $(ARM7_9_SRC)
  48
  49 ARM7_9_SRC = \
  50         %D%/arm7_9_common.c \
  51         %D%/arm7tdmi.c \
  52         %D%/arm720t.c \
  53         %D%/arm9tdmi.c \
  54         %D%/arm920t.c \
  55         %D%/arm966e.c \
  56         %D%/arm946e.c \
  57         %D%/arm926ejs.c \
  58         %D%/feroceon.c
  59
  60 ARM_MISC_SRC = \
  61         %D%/fa526.c \
  62         %D%/xscale.c
  63
  64 ARMV6_SRC = \
  65         %D%/arm11.c \
  66         %D%/arm11_dbgtap.c
  67
  68 ARMV7_SRC = \
  69         %D%/armv7m.c \
  70         %D%/armv7m_trace.c \
  71         %D%/cortex_m.c \
  72         %D%/armv7a.c \
  73         %D%/cortex_a.c \
  74         %D%/ls1_sap.c
  75
  76 ARMV8_SRC = \
  77         %D%/armv8_dpm.c \
  78         %D%/armv8_opcodes.c \
  79         %D%/aarch64.c \
  80         %D%/armv8.c \
  81         %D%/armv8_cache.c
  82
  83 ARM_DEBUG_SRC = \
  84         %D%/arm_dpm.c \
  85         %D%/arm_jtag.c \
  86         %D%/arm_disassembler.c \
  87         %D%/arm_simulator.c \
  88         %D%/arm_semihosting.c \
  89         %D%/arm_adi_v5.c \
  90         %D%/armv7a_cache.c \
  91         %D%/armv7a_cache_l2x.c \
  92         %D%/adi_v5_jtag.c \
  93         %D%/adi_v5_swd.c \
  94         %D%/embeddedice.c \
  95         %D%/trace.c \
  96         %D%/etb.c \
  97         %D%/etm.c \
  98         $(OOCD_TRACE_FILES) \
  99         %D%/etm_dummy.c \
 100         %D%/arm_cti.c
 101
 102 AVR32_SRC = \
 103         %D%/avr32_ap7k.c \
 104         %D%/avr32_jtag.c \
 105         %D%/avr32_mem.c \
 106         %D%/avr32_regs.c
 107
 108 MIPS32_SRC = \
 109         %D%/mips32.c \
 110         %D%/mips_m4k.c \
 111         %D%/mips32_pracc.c \
 112         %D%/mips32_dmaacc.c \
 113         %D%/mips_ejtag.c
 114
 115 NDS32_SRC = \
 116         %D%/nds32.c \
 117         %D%/nds32_reg.c \
 118         %D%/nds32_cmd.c \
 119         %D%/nds32_disassembler.c \
 120         %D%/nds32_tlb.c \
 121         %D%/nds32_v2.c \
 122         %D%/nds32_v3_common.c \
 123         %D%/nds32_v3.c \
 124         %D%/nds32_v3m.c \
 125         %D%/nds32_aice.c
 126
 127 INTEL_IA32_SRC = \
 128         %D%/quark_x10xx.c \
 129         %D%/quark_d20xx.c \
 130         %D%/lakemont.c \
 131         %D%/x86_32_common.c
 132
 133 %C%_libtarget_la_SOURCES += \
 134         %D%/algorithm.h \
 135         %D%/arm.h \
 136         %D%/arm_dpm.h \
 137         %D%/arm_jtag.h \
 138         %D%/arm_adi_v5.h \
 139         %D%/armv7a_cache.h \
 140         %D%/armv7a_cache_l2x.h \
 141         %D%/arm_disassembler.h \
 142         %D%/arm_opcodes.h \
 143         %D%/arm_simulator.h \
 144         %D%/arm_semihosting.h \
 145         %D%/arm7_9_common.h \
 146         %D%/arm7tdmi.h \
 147         %D%/arm720t.h \
 148         %D%/arm9tdmi.h \
 149         %D%/arm920t.h \
 150         %D%/arm926ejs.h \
 151         %D%/arm966e.h \
 152         %D%/arm946e.h \
 153         %D%/arm11.h \
 154         %D%/arm11_dbgtap.h \
 155         %D%/armv4_5.h \
 156         %D%/armv4_5_mmu.h \
 157         %D%/armv4_5_cache.h \
 158         %D%/armv7a.h \
 159         %D%/armv7m.h \
 160         %D%/armv7m_trace.h \
 161         %D%/armv8.h \
 162         %D%/armv8_dpm.h \
 163         %D%/armv8_opcodes.h \
 164         %D%/armv8_cache.h \
 165         %D%/avrt.h \
 166         %D%/dsp563xx.h \
 167         %D%/dsp563xx_once.h \
 168         %D%/dsp5680xx.h \
 169         %D%/breakpoints.h \
 170         %D%/cortex_m.h \
 171         %D%/cortex_a.h \
 172         %D%/aarch64.h \
 173         %D%/embeddedice.h \
 174         %D%/etb.h \
 175         %D%/etm.h \
 176         %D%/etm_dummy.h \
 177         %D%/image.h \
 178         %D%/mips32.h \
 179         %D%/mips_m4k.h \
 180         %D%/mips_ejtag.h \
 181         %D%/mips32_pracc.h \
 182         %D%/mips32_dmaacc.h \
 183         %D%/oocd_trace.h \
 184         %D%/register.h \
 185         %D%/target.h \
 186         %D%/target_type.h \
 187         %D%/trace.h \
 188         %D%/target_request.h \
 189         %D%/trace.h \
 190         %D%/xscale.h \
 191         %D%/smp.h \
 192         %D%/avr32_ap7k.h \
 193         %D%/avr32_jtag.h \
 194         %D%/avr32_mem.h \
 195         %D%/avr32_regs.h \
 196         %D%/nds32.h \
 197         %D%/nds32_cmd.h \
 198         %D%/nds32_disassembler.h \
 199         %D%/nds32_edm.h \
 200         %D%/nds32_insn.h \
 201         %D%/nds32_reg.h \
 202         %D%/nds32_tlb.h \
 203         %D%/nds32_v2.h \
 204         %D%/nds32_v3_common.h \
 205         %D%/nds32_v3.h \
 206         %D%/nds32_v3m.h \
 207         %D%/nds32_aice.h \
 208         %D%/lakemont.h \
 209         %D%/x86_32_common.h \
 210         %D%/arm_cti.h
 211
 212 include %D%/openrisc/Makefile.am