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cortex a9: merge cortex a9 and a8 code
[openocd] / src / target / Makefile.am
1 include $(top_srcdir)/common.mk
2
3 if OOCD_TRACE
4 OOCD_TRACE_FILES = oocd_trace.c
5 else
6 OOCD_TRACE_FILES =
7 endif
8
9 BIN2C           = $(top_builddir)/src/helper/bin2char$(EXEEXT_FOR_BUILD)
10
11 DEBUG_HANDLER   = $(srcdir)/xscale/debug_handler.bin
12 EXTRA_DIST = \
13         startup.tcl \
14         $(DEBUG_HANDLER)
15
16 DEBUG_HEADER    = xscale_debug.h
17 BUILT_SOURCES = $(DEBUG_HEADER)
18 CLEANFILES = $(DEBUG_HEADER)
19
20 $(DEBUG_HEADER): $(BIN2C) $(DEBUG_HANDLER)
21         $(BIN2C) < $(DEBUG_HANDLER) xscale_debug_handler > xscale_debug.h
22
23 METASOURCES = AUTO
24 noinst_LTLIBRARIES = libtarget.la
25 libtarget_la_SOURCES = \
26         $(TARGET_CORE_SRC) \
27         $(ARM_DEBUG_SRC) \
28         $(ARMV4_5_SRC) \
29         $(ARMV6_SRC) \
30         $(ARMV7_SRC) \
31         $(ARM_MISC_SRC) \
32         $(AVR32_SRC) \
33         $(MIPS32_SRC) \
34         avrt.c \
35         dsp563xx.c \
36         dsp563xx_once.c
37
38 TARGET_CORE_SRC = \
39         algorithm.c \
40         register.c \
41         image.c \
42         breakpoints.c \
43         target.c \
44         target_request.c \
45         testee.c
46
47 ARMV4_5_SRC = \
48         armv4_5.c \
49         armv4_5_mmu.c \
50         armv4_5_cache.c \
51         $(ARM7_9_SRC)
52
53 ARM7_9_SRC = \
54         arm7_9_common.c \
55         arm7tdmi.c \
56         arm720t.c \
57         arm9tdmi.c \
58         arm920t.c \
59         arm966e.c \
60         arm946e.c \
61         arm926ejs.c \
62         feroceon.c
63
64 ARM_MISC_SRC = \
65         fa526.c \
66         xscale.c
67
68 ARMV6_SRC = \
69         arm11.c \
70         arm11_dbgtap.c
71
72 ARMV7_SRC = \
73         armv7m.c \
74         cortex_m3.c \
75         armv7a.c \
76         cortex_a8.c
77
78 ARM_DEBUG_SRC = \
79         arm_dpm.c \
80         arm_jtag.c \
81         arm_disassembler.c \
82         arm_simulator.c \
83         arm_semihosting.c \
84         arm_adi_v5.c \
85         adi_v5_jtag.c \
86         adi_v5_swd.c \
87         embeddedice.c \
88         trace.c \
89         etb.c \
90         etm.c \
91         $(OOCD_TRACE_FILES) \
92         etm_dummy.c
93
94 AVR32_SRC = \
95         avr32_ap7k.c \
96         avr32_jtag.c \
97         avr32_mem.c \
98         avr32_regs.c
99
100 MIPS32_SRC = \
101         mips32.c \
102         mips_m4k.c \
103         mips32_pracc.c \
104         mips32_dmaacc.c \
105         mips_ejtag.c
106
107
108 noinst_HEADERS = \
109         algorithm.h \
110         arm.h \
111         arm_dpm.h \
112         arm_jtag.h \
113         arm_adi_v5.h \
114         arm_disassembler.h \
115         arm_opcodes.h \
116         arm_simulator.h \
117         arm_semihosting.h \
118         arm7_9_common.h \
119         arm7tdmi.h \
120         arm720t.h \
121         arm9tdmi.h \
122         arm920t.h \
123         arm926ejs.h \
124         arm966e.h \
125         arm946e.h \
126         arm11.h \
127         arm11_dbgtap.h \
128         armv4_5.h \
129         armv4_5_mmu.h \
130         armv4_5_cache.h \
131         armv7a.h \
132         armv7m.h \
133         avrt.h \
134         dsp563xx.h \
135         dsp563xx_once.h \
136         breakpoints.h \
137         cortex_m3.h \
138         cortex_a8.h \
139         embeddedice.h \
140         etb.h \
141         etm.h \
142         etm_dummy.h \
143         image.h \
144         mips32.h \
145         mips_m4k.h \
146         mips_ejtag.h \
147         mips32_pracc.h \
148         mips32_dmaacc.h \
149         oocd_trace.h \
150         register.h \
151         target.h \
152         target_type.h \
153         trace.h \
154         target_request.h \
155         trace.h \
156         xscale.h \
157         xscale_debug.h
158
159 nobase_dist_pkglib_DATA =
160 nobase_dist_pkglib_DATA += ecos/at91eb40a.elf
161
162 MAINTAINERCLEANFILES = $(srcdir)/Makefile.in