1 # If you want to use the VJTAG TAP or the XILINX BSCAN,
2 # you must set your FPGA TAP ID here
4 set FPGATAPID 0x020b30dd
6 # Choose your TAP core (VJTAG , MOHOR or XILINX_BSCAN)
7 if { [info exists TAP_TYPE] == 0} {
14 source [find target/or1k.cfg]
16 # Set the adapter speed
19 # Enable the target description feature
20 gdb_target_description enable
22 # Add a new register in the cpu register list. This register will be
23 # included in the generated target descriptor file.
24 # format is addreg [name] [address] [feature] [reg_group]
25 addreg rtest 0x1234 org.gnu.gdb.or1k.group0 system
27 # Override default init_reset
28 proc init_reset {mode} {
33 # Target initialization
35 echo "Halting processor"
38 foreach name [target names] {
39 set y [$name cget -endian]
40 set z [$name cget -type]
41 puts [format "Chip is %s, Endian: %s, type: %s" \
45 set c_blue "\033\[01;34m"
46 set c_reset "\033\[0m"
48 puts [format "%sTarget ready...%s" $c_blue $c_reset]