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pipistrello: decrease jtag speed to 10 MHz
[openocd] / tcl / interface / ftdi / pipistrello.cfg
1 # http://pipistrello.saanlima.com/
2 # http://www.saanlima.com/download/pipistrello-v2.0/pipistrello_v2_schematic.pdf
3 interface ftdi
4 ftdi_device_desc "Pipistrello LX45"
5 ftdi_vid_pid 0x0403 0x6010
6 # interface 1 is the uart
7 ftdi_channel 0
8 # just TCK TDI TDO TMS, no reset
9 ftdi_layout_init 0x0008 0x000b
10 reset_config none
11 # this generally works fast: the fpga can handle 30MHz, the spi flash can handle
12 # 54MHz with simple read, no dummy cycles, and wait-for-write-completion
13 adapter_khz 10000