target: cortex_a: fix segfault when SPSR is not properly handled

OpenOCD doesn't (yet) know how to handle HYP mode properly so spsr
register is not getting initialised when OpenOCD connects to a target
stopped in this mode.

Reported on IRC by thinkfat and nearffxx.

Change-Id: I4bda9ba0c582c8e9cacefe708cc4a3d947151f84
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3906
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index d0eac751f6df3acbb0428126d3e3e7509586917e..8c8a2b79ea5719ebbf5e8a7f30a2ac2951f7af7d 100644 (file)
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1241,16 +1241,18 @@ static int cortex_a_debug_entry(struct target *target)
                reg->dirty = reg->valid;
        }
 
-       /* read Saved PSR */
-       retval = cortex_a_dap_read_coreregister_u32(target, &spsr, 17);
-       /*  store current spsr */
-       if (retval != ERROR_OK)
-               return retval;
+       if (arm->spsr) {
+               /* read Saved PSR */
+               retval = cortex_a_dap_read_coreregister_u32(target, &spsr, 17);
+               /*  store current spsr */
+               if (retval != ERROR_OK)
+                       return retval;
 
-       reg = arm->spsr;
-       buf_set_u32(reg->value, 0, 32, spsr);
-       reg->valid = 1;
-       reg->dirty = 0;
+               reg = arm->spsr;
+               buf_set_u32(reg->value, 0, 32, spsr);
+               reg->valid = 1;
+               reg->dirty = 0;
+       }
 
 #if 0
 /* TODO, Move this */