git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynq-zc706.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Copyright (C) 2011 - 2015 Xilinx
   4  *  Copyright (C) 2012 National Instruments Corp.
   5  */
   6 /dts-v1/;
   7 #include "zynq-7000.dtsi"
   8
   9 / {
  10         model = "Zynq ZC706 Development Board";
  11         compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
  12
  13         aliases {
  14                 ethernet0 = &gem0;
  15                 i2c0 = &i2c0;
  16                 serial0 = &uart1;
  17                 spi0 = &qspi;
  18                 mmc0 = &sdhci0;
  19         };
  20
  21         memory@0 {
  22                 device_type = "memory";
  23                 reg = <0x0 0x40000000>;
  24         };
  25
  26         chosen {
  27                 bootargs = "";
  28                 stdout-path = "serial0:115200n8";
  29         };
  30
  31         usb_phy0: phy0 {
  32                 compatible = "usb-nop-xceiv";
  33                 #phy-cells = <0>;
  34         };
  35 };
  36
  37 &clkc {
  38         ps-clk-frequency = <33333333>;
  39 };
  40
  41 &gem0 {
  42         status = "okay";
  43         phy-mode = "rgmii-id";
  44         phy-handle = <&ethernet_phy>;
  45         pinctrl-names = "default";
  46         pinctrl-0 = <&pinctrl_gem0_default>;
  47
  48         ethernet_phy: ethernet-phy@7 {
  49                 reg = <7>;
  50                 device_type = "ethernet-phy";
  51         };
  52 };
  53
  54 &gpio0 {
  55         pinctrl-names = "default";
  56         pinctrl-0 = <&pinctrl_gpio0_default>;
  57 };
  58
  59 &i2c0 {
  60         status = "okay";
  61         clock-frequency = <400000>;
  62         pinctrl-names = "default";
  63         pinctrl-0 = <&pinctrl_i2c0_default>;
  64
  65         i2cswitch@74 {
  66                 compatible = "nxp,pca9548";
  67                 #address-cells = <1>;
  68                 #size-cells = <0>;
  69                 reg = <0x74>;
  70
  71                 i2c@0 {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74                         reg = <0>;
  75                         si570: clock-generator@5d {
  76                                 #clock-cells = <0>;
  77                                 compatible = "silabs,si570";
  78                                 temperature-stability = <50>;
  79                                 reg = <0x5d>;
  80                                 factory-fout = <156250000>;
  81                                 clock-frequency = <148500000>;
  82                         };
  83                 };
  84
  85                 i2c@1 {
  86                         #address-cells = <1>;
  87                         #size-cells = <0>;
  88                         reg = <1>;
  89                         adv7511: hdmi-tx@39 {
  90                                 compatible = "adi,adv7511";
  91                                 reg = <0x39>;
  92                                 adi,input-depth = <8>;
  93                                 adi,input-colorspace = "yuv422";
  94                                 adi,input-clock = "1x";
  95                                 adi,input-style = <3>;
  96                                 adi,input-justification = "evenly";
  97                         };
  98                 };
  99
 100                 i2c@2 {
 101                         #address-cells = <1>;
 102                         #size-cells = <0>;
 103                         reg = <2>;
 104                         eeprom@54 {
 105                                 compatible = "at,24c08";
 106                                 reg = <0x54>;
 107                         };
 108                 };
 109
 110                 i2c@3 {
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113                         reg = <3>;
 114                         gpio@21 {
 115                                 compatible = "ti,tca6416";
 116                                 reg = <0x21>;
 117                                 gpio-controller;
 118                                 #gpio-cells = <2>;
 119                         };
 120                 };
 121
 122                 i2c@4 {
 123                         #address-cells = <1>;
 124                         #size-cells = <0>;
 125                         reg = <4>;
 126                         rtc@51 {
 127                                 compatible = "nxp,pcf8563";
 128                                 reg = <0x51>;
 129                         };
 130                 };
 131
 132                 i2c@7 {
 133                         #address-cells = <1>;
 134                         #size-cells = <0>;
 135                         reg = <7>;
 136                         ucd90120@65 {
 137                                 compatible = "ti,ucd90120";
 138                                 reg = <0x65>;
 139                         };
 140                 };
 141         };
 142 };
 143
 144 &pinctrl0 {
 145         pinctrl_gem0_default: gem0-default {
 146                 mux {
 147                         function = "ethernet0";
 148                         groups = "ethernet0_0_grp";
 149                 };
 150
 151                 conf {
 152                         groups = "ethernet0_0_grp";
 153                         slew-rate = <0>;
 154                         io-standard = <4>;
 155                 };
 156
 157                 conf-rx {
 158                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 159                         bias-high-impedance;
 160                         low-power-disable;
 161                 };
 162
 163                 conf-tx {
 164                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 165                         low-power-enable;
 166                         bias-disable;
 167                 };
 168
 169                 mux-mdio {
 170                         function = "mdio0";
 171                         groups = "mdio0_0_grp";
 172                 };
 173
 174                 conf-mdio {
 175                         groups = "mdio0_0_grp";
 176                         slew-rate = <0>;
 177                         io-standard = <1>;
 178                         bias-disable;
 179                 };
 180         };
 181
 182         pinctrl_gpio0_default: gpio0-default {
 183                 mux {
 184                         function = "gpio0";
 185                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 186                 };
 187
 188                 conf {
 189                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 190                         slew-rate = <0>;
 191                         io-standard = <1>;
 192                 };
 193
 194                 conf-pull-up {
 195                         pins = "MIO46", "MIO47";
 196                         bias-pull-up;
 197                 };
 198
 199                 conf-pull-none {
 200                         pins = "MIO7";
 201                         bias-disable;
 202                 };
 203         };
 204
 205         pinctrl_i2c0_default: i2c0-default {
 206                 mux {
 207                         groups = "i2c0_10_grp";
 208                         function = "i2c0";
 209                 };
 210
 211                 conf {
 212                         groups = "i2c0_10_grp";
 213                         bias-pull-up;
 214                         slew-rate = <0>;
 215                         io-standard = <1>;
 216                 };
 217         };
 218
 219         pinctrl_sdhci0_default: sdhci0-default {
 220                 mux {
 221                         groups = "sdio0_2_grp";
 222                         function = "sdio0";
 223                 };
 224
 225                 conf {
 226                         groups = "sdio0_2_grp";
 227                         slew-rate = <0>;
 228                         io-standard = <1>;
 229                         bias-disable;
 230                 };
 231
 232                 mux-cd {
 233                         groups = "gpio0_14_grp";
 234                         function = "sdio0_cd";
 235                 };
 236
 237                 conf-cd {
 238                         groups = "gpio0_14_grp";
 239                         bias-high-impedance;
 240                         bias-pull-up;
 241                         slew-rate = <0>;
 242                         io-standard = <1>;
 243                 };
 244
 245                 mux-wp {
 246                         groups = "gpio0_15_grp";
 247                         function = "sdio0_wp";
 248                 };
 249
 250                 conf-wp {
 251                         groups = "gpio0_15_grp";
 252                         bias-high-impedance;
 253                         bias-pull-up;
 254                         slew-rate = <0>;
 255                         io-standard = <1>;
 256                 };
 257         };
 258
 259         pinctrl_uart1_default: uart1-default {
 260                 mux {
 261                         groups = "uart1_10_grp";
 262                         function = "uart1";
 263                 };
 264
 265                 conf {
 266                         groups = "uart1_10_grp";
 267                         slew-rate = <0>;
 268                         io-standard = <1>;
 269                 };
 270
 271                 conf-rx {
 272                         pins = "MIO49";
 273                         bias-high-impedance;
 274                 };
 275
 276                 conf-tx {
 277                         pins = "MIO48";
 278                         bias-disable;
 279                 };
 280         };
 281
 282         pinctrl_usb0_default: usb0-default {
 283                 mux {
 284                         groups = "usb0_0_grp";
 285                         function = "usb0";
 286                 };
 287
 288                 conf {
 289                         groups = "usb0_0_grp";
 290                         slew-rate = <0>;
 291                         io-standard = <1>;
 292                 };
 293
 294                 conf-rx {
 295                         pins = "MIO29", "MIO31", "MIO36";
 296                         bias-high-impedance;
 297                 };
 298
 299                 conf-tx {
 300                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 301                                "MIO35", "MIO37", "MIO38", "MIO39";
 302                         bias-disable;
 303                 };
 304         };
 305 };
 306
 307 &qspi {
 308         u-boot,dm-pre-reloc;
 309         status = "okay";
 310 };
 311
 312 &sdhci0 {
 313         u-boot,dm-pre-reloc;
 314         status = "okay";
 315         pinctrl-names = "default";
 316         pinctrl-0 = <&pinctrl_sdhci0_default>;
 317 };
 318
 319 &uart1 {
 320         u-boot,dm-pre-reloc;
 321         status = "okay";
 322         pinctrl-names = "default";
 323         pinctrl-0 = <&pinctrl_uart1_default>;
 324 };
 325
 326 &usb0 {
 327         status = "okay";
 328         dr_mode = "host";
 329         usb-phy = <&usb_phy0>;
 330         pinctrl-names = "default";
 331         pinctrl-0 = <&pinctrl_usb0_default>;
 332 };
 333
 334 &watchdog0 {
 335         reset-on-timeout;
 336 };