git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynq-zed.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Copyright (C) 2011 - 2015 Xilinx
   4  *  Copyright (C) 2012 National Instruments Corp.
   5  */
   6 /dts-v1/;
   7 #include "zynq-7000.dtsi"
   8
   9 / {
  10         model = "Zynq Zed Development Board";
  11         compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
  12
  13         aliases {
  14                 ethernet0 = &gem0;
  15                 serial0 = &uart1;
  16                 spi0 = &qspi;
  17                 mmc0 = &sdhci0;
  18         };
  19
  20         memory@0 {
  21                 device_type = "memory";
  22                 reg = <0x0 0x20000000>;
  23         };
  24
  25         chosen {
  26                 bootargs = "";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         usb_phy0: phy0 {
  31                 compatible = "usb-nop-xceiv";
  32                 #phy-cells = <0>;
  33         };
  34 };
  35
  36 &clkc {
  37         ps-clk-frequency = <33333333>;
  38 };
  39
  40 &gem0 {
  41         status = "okay";
  42         phy-mode = "rgmii-id";
  43         phy-handle = <&ethernet_phy>;
  44
  45         ethernet_phy: ethernet-phy@0 {
  46                 reg = <0>;
  47                 device_type = "ethernet-phy";
  48         };
  49 };
  50
  51 &qspi {
  52         u-boot,dm-pre-reloc;
  53         status = "okay";
  54 };
  55
  56 &sdhci0 {
  57         u-boot,dm-pre-reloc;
  58         status = "okay";
  59 };
  60
  61 &uart1 {
  62         u-boot,dm-pre-reloc;
  63         status = "okay";
  64 };
  65
  66 &usb0 {
  67         status = "okay";
  68         dr_mode = "host";
  69         usb-phy = <&usb_phy0>;
  70 };