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   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Tegra pulse width frequency modulator definitions
   4  *
   5  * Copyright (c) 2011 The Chromium OS Authors.
   6  */
   7
   8 #ifndef __ASM_ARCH_TEGRA_PWM_H
   9 #define __ASM_ARCH_TEGRA_PWM_H
  10
  11 /* This is a single PWM channel */
  12 struct pwm_ctlr {
  13         uint control;           /* Control register */
  14         uint reserved[3];       /* Space space */
  15 };
  16
  17 #define PWM_NUM_CHANNELS        4
  18
  19 /* PWM_CONTROLLER_PWM_CSR_0/1/2/3_0 */
  20 #define PWM_ENABLE_SHIFT        31
  21 #define PWM_ENABLE_MASK (0x1 << PWM_ENABLE_SHIFT)
  22
  23 #define PWM_WIDTH_SHIFT 16
  24 #define PWM_WIDTH_MASK          (0x7FFF << PWM_WIDTH_SHIFT)
  25
  26 #define PWM_DIVIDER_SHIFT       0
  27 #define PWM_DIVIDER_MASK        (0x1FFF << PWM_DIVIDER_SHIFT)
  28
  29 #endif  /* __ASM_ARCH_TEGRA_PWM_H */