git.sur5r.net Git - u-boot/blob - arch/arm/mach-rmobile/pfc-r8a7790.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * arch/arm/cpu/armv7/rmobile/pfc-r8a7790.c
   4  *     This file is r8a7790 processor support - PFC hardware block.
   5  *
   6  * Copy from linux-kernel:drivers/pinctrl/sh-pfc/pfc-r8a7790.c
   7  *
   8  * Copyright (C) 2013 Renesas Electronics Corporation
   9  * Copyright (C) 2013 Magnus Damm
  10  * Copyright (C) 2012 Renesas Solutions Corp.
  11  * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  12  */
  13
  14 #include <common.h>
  15 #include <sh_pfc.h>
  16 #include <asm/gpio.h>
  17 #include "pfc-r8a7790.h"
  18
  19 enum {
  20         PINMUX_RESERVED = 0,
  21
  22         PINMUX_DATA_BEGIN,
  23         GP_ALL(DATA),
  24         PINMUX_DATA_END,
  25
  26         PINMUX_INPUT_BEGIN,
  27         GP_ALL(IN),
  28         PINMUX_INPUT_END,
  29
  30         PINMUX_OUTPUT_BEGIN,
  31         GP_ALL(OUT),
  32         PINMUX_OUTPUT_END,
  33
  34         PINMUX_FUNCTION_BEGIN,
  35         GP_ALL(FN),
  36
  37         /* GPSR0 */
  38         FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,
  39         FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,
  40         FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,
  41         FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,
  42         FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,
  43         FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,
  44         FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,
  45         FN_IP3_14_12, FN_IP3_17_15,
  46
  47         /* GPSR1 */
  48         FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,
  49         FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,
  50         FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,
  51         FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,
  52         FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,
  53         FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,
  54         FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,
  55
  56         /* GPSR2 */
  57         FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,
  58         FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,
  59         FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,
  60         FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,
  61         FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,
  62         FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,
  63         FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13,
  64
  65         /* GPSR3 */
  66         FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,
  67         FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,
  68         FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,
  69         FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,
  70         FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,
  71         FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,
  72         FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,
  73
  74         /* GPSR4 */
  75         FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,
  76         FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,
  77         FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,
  78         FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,
  79         FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,
  80         FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,
  81         FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,
  82         FN_IP14_15_12, FN_IP14_18_16,
  83
  84         /* GPSR5 */
  85         FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,
  86         FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,
  87         FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,
  88         FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,
  89         FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,
  90         FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,
  91         FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,
  92
  93         /* IPSR0 - IPSR5 */
  94         /* IPSR6 */
  95         FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
  96         FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C,
  97         FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
  98         FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,
  99         FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C,
 100         FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,
 101         FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
 102         FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,
 103         FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
 104         FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
 105         FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,
 106         FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,
 107         FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,
 108         FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,
 109         FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,
 110         FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
 111         FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,
 112         FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
 113         FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,
 114         FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
 115         FN_STP_IVCXO27_1_B, FN_HRX0_F,
 116
 117         /* IPSR7 */
 118         FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
 119         FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,
 120         FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
 121         FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,
 122         FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,
 123         FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,
 124         FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,
 125         FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
 126         FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,
 127         FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
 128         FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
 129         FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,
 130         FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
 131         FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,
 132         FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
 133         FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
 134         FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
 135         FN_MII_RXD2,
 136
 137         /* IPSR8 */
 138         FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3,
 139         FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,
 140         FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N,
 141         FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N,
 142         FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1,
 143         FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER,
 144         FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,
 145         FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV,
 146         FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,
 147         FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1,
 148         FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
 149         FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
 150         FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,
 151         FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
 152         FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5,
 153         FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,
 154         FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD,
 155         FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B,
 156
 157         /* IPSR9 */
 158         FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B,
 159         FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B,
 160         FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B,
 161         FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B,
 162         FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
 163         FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
 164         FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,
 165         FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
 166         FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
 167         FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,
 168         FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,
 169         FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
 170         FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,
 171         FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK,
 172         FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2,
 173         FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
 174         FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,
 175         FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,
 176         FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,
 177         FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B,
 178         FN_VI3_CLK_B,
 179
 180         /* IPSR10 */
 181         FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
 182         FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
 183         FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,
 184         FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,
 185         FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,
 186         FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,
 187         FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,
 188         FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,
 189         FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,
 190         FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,
 191         FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
 192         FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
 193         FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
 194         FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
 195         FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
 196         FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3,
 197         FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
 198         FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B,
 199         FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4,
 200         FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,
 201         FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,
 202         FN_GLO_I0_B, FN_VI3_DATA6_B,
 203
 204         /* IPSR11 */
 205         FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,
 206         FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,
 207         FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B,
 208         FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD,
 209         FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N,
 210         FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2,
 211         FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3,
 212         FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
 213         FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,
 214         FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
 215         FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
 216         FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,
 217         FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,
 218         FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN,
 219         FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
 220         FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,
 221         FN_MOUT0,
 222
 223         FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
 224         FN_SEL_SCIF1_4,
 225         FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2,
 226         FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2,
 227         FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
 228         FN_SEL_SCIFB1_4,
 229         FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6,
 230         FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,
 231         FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,
 232         FN_SEL_SCFA_0, FN_SEL_SCFA_1,
 233         FN_SEL_SOF1_0, FN_SEL_SOF1_1,
 234         FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,
 235         FN_SEL_SSI6_0, FN_SEL_SSI6_1,
 236         FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2,
 237         FN_SEL_VI3_0, FN_SEL_VI3_1,
 238         FN_SEL_VI2_0, FN_SEL_VI2_1,
 239         FN_SEL_VI1_0, FN_SEL_VI1_1,
 240         FN_SEL_VI0_0, FN_SEL_VI0_1,
 241         FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2,
 242         FN_SEL_LBS_0, FN_SEL_LBS_1,
 243         FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
 244         FN_SEL_SOF3_0, FN_SEL_SOF3_1,
 245         FN_SEL_SOF0_0, FN_SEL_SOF0_1,
 246
 247         FN_SEL_TMU1_0, FN_SEL_TMU1_1,
 248         FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
 249         FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,
 250         FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
 251         FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
 252         FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,
 253         FN_SEL_CAN1_0, FN_SEL_CAN1_1,
 254         FN_SEL_ADI_0, FN_SEL_ADI_1,
 255         FN_SEL_SSP_0, FN_SEL_SSP_1,
 256         FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
 257         FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6,
 258         FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,
 259         FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5,
 260         FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,
 261         FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
 262         FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,
 263         FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,
 264         FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,
 265
 266         FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
 267         FN_SEL_IIC0_0, FN_SEL_IIC0_1,
 268         FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
 269         FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
 270         FN_SEL_IIC2_4,
 271         FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2,
 272         FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
 273         FN_SEL_I2C2_4,
 274         FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2,
 275         PINMUX_FUNCTION_END,
 276
 277         PINMUX_MARK_BEGIN,
 278
 279         VI1_DATA7_VI1_B7_MARK,
 280
 281         USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,
 282         USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK,
 283         DU_DOTCLKIN0_MARK, DU_DOTCLKIN2_MARK,
 284
 285         D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,
 286         D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK,
 287         VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK,
 288         VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK,
 289         VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK,
 290         SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK,
 291         VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,
 292         SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK,
 293         VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,
 294         SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,
 295         SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,
 296         VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,
 297         D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,
 298         VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,
 299
 300         D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,
 301         VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,
 302         SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK,
 303         VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,
 304         SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK,
 305         VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK,
 306         D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK,
 307         VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK,
 308         D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK,
 309         VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK,
 310         SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK,
 311         VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK,
 312         D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK,
 313         VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK,
 314         A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK,
 315
 316         A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK,
 317         PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK,
 318         TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK,
 319         A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,
 320         SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK,
 321         A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,
 322         VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK,
 323         A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,
 324         VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK,
 325         A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,
 326         VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK,
 327
 328         A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK,
 329         VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK,
 330         A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK,
 331         VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK,
 332         A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK,
 333         MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK,
 334         VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK,
 335         ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK,
 336         ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK,
 337         A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK,
 338         AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK,
 339         ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK,
 340         VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK,
 341
 342         A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,
 343         A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK,
 344         VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK,
 345         VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK,
 346         VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK,
 347         VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK,
 348         VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK,
 349         VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK,
 350         CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK,
 351         VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK,
 352         VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK,
 353         MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK,
 354         HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK,
 355         VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK,
 356         VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK,
 357
 358         EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK,
 359         VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK,
 360         EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK,
 361         VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK,
 362         INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,
 363         MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK,
 364         VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,
 365         SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,
 366         CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,
 367         CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,
 368         VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK,
 369         INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK,
 370         VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK,
 371         WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK,
 372         VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK,
 373         IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK,
 374         VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK,
 375         MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK,
 376         VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK,
 377         SSI_WS78_B_MARK,
 378
 379         DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,
 380         VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK,
 381         DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK,
 382         SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,
 383         INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK,
 384         DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,
 385         MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,
 386         SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,
 387         ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,
 388         TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,
 389         SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,
 390         STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,
 391         SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,
 392         STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,
 393         SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,
 394         RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,
 395         TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,
 396         RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,
 397         STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,
 398         ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,
 399         STP_IVCXO27_1_B_MARK, HRX0_F_MARK,
 400
 401         ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,
 402         SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,
 403         RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,
 404         ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,
 405         HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,
 406         SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,
 407         STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,
 408         ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,
 409         TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,
 410         SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,
 411         GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
 412         STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,
 413         PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
 414         PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,
 415         AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
 416         ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,
 417         VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
 418         MII_RXD2_MARK,
 419
 420         VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK,
 421         MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,
 422         AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK,
 423         AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK,
 424         AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK,
 425         AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK,
 426         MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,
 427         MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK,
 428         MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,
 429         AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK,
 430         SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK,
 431         VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK,
 432         MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,
 433         AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK,
 434         AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,
 435         AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK,
 436         SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK,
 437         SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK,
 438
 439         SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK,
 440         SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK,
 441         SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK,
 442         SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK,
 443         SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,
 444         GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK,
 445         SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,
 446         MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,
 447         GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK,
 448         SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,
 449         AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,
 450         AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,
 451         SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,
 452         SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK,
 453         MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,
 454         AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK,
 455         SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,
 456         SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,
 457         TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,
 458         SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK,
 459         VI3_CLK_B_MARK,
 460
 461         SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,
 462         GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,
 463         SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,
 464         VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK,
 465         VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,
 466         VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK,
 467         TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK,
 468         SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK,
 469         VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK,
 470         TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK,
 471         SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,
 472         VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK,
 473         TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK,
 474         SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,
 475         VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK,
 476         GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK,
 477         MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK,
 478         HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK,
 479         VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK,
 480         TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK,
 481         VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK,
 482         GLO_I0_B_MARK, VI3_DATA6_B_MARK,
 483
 484         SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK,
 485         GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK,
 486         TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK,
 487         SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK,
 488         MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK,
 489         SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK,
 490         MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK,
 491         SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,
 492         VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,
 493         MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,
 494         RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,
 495         RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,
 496         MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,
 497         SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,
 498         SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,
 499         RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,
 500         MOUT0_MARK,
 501
 502         SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK,
 503         SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK,
 504         SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK,
 505         SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK,
 506         SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK,
 507         MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK,
 508         STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK,
 509         CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK,
 510         SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK,
 511         SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK,
 512         MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK,
 513         SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK,
 514         MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK,
 515         SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK,
 516         CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK,
 517         IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK,
 518         CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK,
 519         IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK,
 520         CAN_DEBUGOUT4_MARK,
 521
 522         SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,
 523         LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK,
 524         SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK,
 525         DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK,
 526         BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK,
 527         SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK,
 528         LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK,
 529         FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,
 530         CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK,
 531         SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,
 532         CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK,
 533         SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK,
 534         LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK,
 535         STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK,
 536         TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK,
 537         BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK,
 538         FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK,
 539         STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK,
 540         CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK,
 541         STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK,
 542         SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK,
 543         SCIFB2_RTS_N_MARK, CAN_DEBUGOUT14_MARK,
 544
 545         AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK,
 546         DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK,
 547         REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,
 548         MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,
 549         SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,
 550         DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,
 551         TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,
 552         HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,
 553         LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,
 554         SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,
 555         MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,
 556         SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,
 557         DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK,
 558         SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,
 559         LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK,
 560         CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,
 561         SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK,
 562         MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,
 563         HRTS0_N_C_MARK,
 564
 565         SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,
 566         LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,
 567         DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,
 568         SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,
 569         SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,
 570         DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,
 571         DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,
 572         LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,
 573         LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK,
 574         LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,
 575         DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,
 576         SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,
 577         SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,
 578         DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,
 579         DU2_DG6_MARK, LCDOUT14_MARK,
 580
 581         MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK,
 582         DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,
 583         MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK,
 584         ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,
 585         USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
 586         TCLK1_B_MARK,
 587         PINMUX_MARK_END,
 588 };
 589
 590 static pinmux_enum_t pinmux_data[] = {
 591         PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
 592
 593         PINMUX_DATA(VI1_DATA7_VI1_B7_MARK, FN_VI1_DATA7_VI1_B7),
 594         PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN),
 595         PINMUX_DATA(USB0_OVC_VBUS_MARK, FN_USB0_OVC_VBUS),
 596         PINMUX_DATA(USB2_PWEN_MARK, FN_USB2_PWEN),
 597         PINMUX_DATA(USB2_OVC_MARK, FN_USB2_OVC),
 598         PINMUX_DATA(AVS1_MARK, FN_AVS1),
 599         PINMUX_DATA(AVS2_MARK, FN_AVS2),
 600         PINMUX_DATA(DU_DOTCLKIN0_MARK, FN_DU_DOTCLKIN0),
 601         PINMUX_DATA(DU_DOTCLKIN2_MARK, FN_DU_DOTCLKIN2),
 602
 603         PINMUX_IPSR_DATA(IP6_2_0, DACK0),
 604         PINMUX_IPSR_DATA(IP6_2_0, IRQ0),
 605         PINMUX_IPSR_DATA(IP6_2_0, INTC_IRQ0_N),
 606         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1),
 607         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0),
 608         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1),
 609         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_WS78_C, SEL_SSI7_2),
 610         PINMUX_IPSR_DATA(IP6_5_3, DREQ1_N),
 611         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB, SEL_VI1_0),
 612         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1),
 613         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2),
 614         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1),
 615         PINMUX_IPSR_DATA(IP6_8_6, DACK1),
 616         PINMUX_IPSR_DATA(IP6_8_6, IRQ1),
 617         PINMUX_IPSR_DATA(IP6_8_6, INTC_IRQ1_N),
 618         PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_WS6_B, SEL_SSI6_1),
 619         PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2),
 620         PINMUX_IPSR_DATA(IP6_10_9, DREQ2_N),
 621         PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HSCK1_B, SEL_HSCIF1_1),
 622         PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1),
 623         PINMUX_IPSR_MODSEL_DATA(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1),
 624         PINMUX_IPSR_DATA(IP6_13_11, DACK2),
 625         PINMUX_IPSR_DATA(IP6_13_11, IRQ2),
 626         PINMUX_IPSR_DATA(IP6_13_11, INTC_IRQ2_N),
 627         PINMUX_IPSR_MODSEL_DATA(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1),
 628         PINMUX_IPSR_MODSEL_DATA(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1),
 629         PINMUX_IPSR_MODSEL_DATA(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1),
 630         PINMUX_IPSR_DATA(IP6_16_14, ETH_CRS_DV),
 631         PINMUX_IPSR_DATA(IP6_16_14, RMII_CRS_DV),
 632         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1),
 633         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3),
 634         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2),
 635         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_E, SEL_IIC2_4),
 636         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_CIS_E, SEL_I2C2_4),
 637         PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER),
 638         PINMUX_IPSR_DATA(IP6_19_17, RMII_RX_ER),
 639         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1),
 640         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3),
 641         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2),
 642         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_E, SEL_IIC2_4),
 643         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_CIS_E, SEL_I2C2_4),
 644         PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0),
 645         PINMUX_IPSR_DATA(IP6_22_20, RMII_RXD0),
 646         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1),
 647         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3),
 648         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, GLO_I0_C, SEL_GPS_2),
 649         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6),
 650         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK1_E, SEL_SCIF1_4),
 651         PINMUX_IPSR_DATA(IP6_25_23, ETH_RXD1),
 652         PINMUX_IPSR_DATA(IP6_25_23, RMII_RXD1),
 653         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, HRX0_E, SEL_HSCIF0_4),
 654         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1),
 655         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3),
 656         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, GLO_I1_C, SEL_GPS_2),
 657         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6),
 658         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, RX1_E, SEL_SCIF1_4),
 659         PINMUX_IPSR_DATA(IP6_28_26, ETH_LINK),
 660         PINMUX_IPSR_DATA(IP6_28_26, RMII_LINK),
 661         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, HTX0_E, SEL_HSCIF0_4),
 662         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1),
 663         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6),
 664         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, TX1_E, SEL_SCIF1_4),
 665         PINMUX_IPSR_DATA(IP6_31_29, ETH_REF_CLK),
 666         PINMUX_IPSR_DATA(IP6_31_29, RMII_REF_CLK),
 667         PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4),
 668         PINMUX_IPSR_MODSEL_DATA(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1),
 669         PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HRX0_F, SEL_HSCIF0_5),
 670
 671         PINMUX_IPSR_DATA(IP7_2_0, ETH_MDIO),
 672         PINMUX_IPSR_DATA(IP7_2_0, RMII_MDIO),
 673         PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4),
 674         PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2),
 675         PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5),
 676         PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1),
 677         PINMUX_IPSR_DATA(IP7_5_3, RMII_TXD1),
 678         PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4),
 679         PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2),
 680         PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RDS_CLK_F, SEL_HSCIF0_5),
 681         PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN),
 682         PINMUX_IPSR_DATA(IP7_7_6, RMII_TX_EN),
 683         PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2),
 684         PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5),
 685         PINMUX_IPSR_DATA(IP7_9_8, ETH_MAGIC),
 686         PINMUX_IPSR_DATA(IP7_9_8, RMII_MAGIC),
 687         PINMUX_IPSR_MODSEL_DATA(IP7_9_8, SIM0_RST_C, SEL_SIM_2),
 688         PINMUX_IPSR_DATA(IP7_12_10, ETH_TXD0),
 689         PINMUX_IPSR_DATA(IP7_12_10, RMII_TXD0),
 690         PINMUX_IPSR_MODSEL_DATA(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1),
 691         PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2),
 692         PINMUX_IPSR_MODSEL_DATA(IP7_12_10, GLO_SCLK_C, SEL_GPS_2),
 693         PINMUX_IPSR_DATA(IP7_15_13, ETH_MDC),
 694         PINMUX_IPSR_DATA(IP7_15_13, RMII_MDC),
 695         PINMUX_IPSR_MODSEL_DATA(IP7_15_13, STP_ISD_1_B, SEL_SSP_1),
 696         PINMUX_IPSR_MODSEL_DATA(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2),
 697         PINMUX_IPSR_MODSEL_DATA(IP7_15_13, GLO_SDATA_C, SEL_GPS_2),
 698         PINMUX_IPSR_DATA(IP7_18_16, PWM0),
 699         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2),
 700         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1),
 701         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2),
 702         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, GLO_SS_C, SEL_GPS_2),
 703         PINMUX_IPSR_DATA(IP7_21_19, PWM1),
 704         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2),
 705         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1),
 706         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2),
 707         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, GLO_RFON_C, SEL_GPS_2),
 708         PINMUX_IPSR_DATA(IP7_21_19, PCMOE_N),
 709         PINMUX_IPSR_DATA(IP7_24_22, PWM2),
 710         PINMUX_IPSR_DATA(IP7_24_22, PWMFSW0),
 711         PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2),
 712         PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N),
 713         PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2),
 714         PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN),
 715         PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC),
 716         PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C),
 717         PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
 718         PINMUX_IPSR_DATA(IP7_28_27, ATACS00_N),
 719         PINMUX_IPSR_DATA(IP7_28_27, AVB_RXD1),
 720         PINMUX_IPSR_DATA(IP7_28_27, MII_RXD1),
 721         PINMUX_IPSR_MODSEL_DATA(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0),
 722         PINMUX_IPSR_DATA(IP7_30_29, ATACS10_N),
 723         PINMUX_IPSR_DATA(IP7_30_29, AVB_RXD2),
 724         PINMUX_IPSR_DATA(IP7_30_29, MII_RXD2),
 725
 726         PINMUX_IPSR_MODSEL_DATA(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0),
 727         PINMUX_IPSR_DATA(IP8_1_0, ATARD0_N),
 728         PINMUX_IPSR_DATA(IP8_1_0, AVB_RXD3),
 729         PINMUX_IPSR_DATA(IP8_1_0, MII_RXD3),
 730         PINMUX_IPSR_MODSEL_DATA(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0),
 731         PINMUX_IPSR_DATA(IP8_3_2, ATAWR0_N),
 732         PINMUX_IPSR_DATA(IP8_3_2, AVB_RXD4),
 733         PINMUX_IPSR_MODSEL_DATA(IP8_5_4, VI0_DATA3_VI0_B3, SEL_VI0_0),
 734         PINMUX_IPSR_DATA(IP8_5_4, ATADIR0_N),
 735         PINMUX_IPSR_DATA(IP8_5_4, AVB_RXD5),
 736         PINMUX_IPSR_MODSEL_DATA(IP8_7_6, VI0_DATA4_VI0_B4, SEL_VI0_0),
 737         PINMUX_IPSR_DATA(IP8_7_6, ATAG0_N),
 738         PINMUX_IPSR_DATA(IP8_7_6, AVB_RXD6),
 739         PINMUX_IPSR_MODSEL_DATA(IP8_9_8, VI0_DATA5_VI0_B5, SEL_VI0_0),
 740         PINMUX_IPSR_DATA(IP8_9_8, EX_WAIT1),
 741         PINMUX_IPSR_DATA(IP8_9_8, AVB_RXD7),
 742         PINMUX_IPSR_MODSEL_DATA(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0),
 743         PINMUX_IPSR_DATA(IP8_11_10, AVB_RX_ER),
 744         PINMUX_IPSR_DATA(IP8_11_10, MII_RX_ER),
 745         PINMUX_IPSR_MODSEL_DATA(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0),
 746         PINMUX_IPSR_DATA(IP8_13_12, AVB_RX_CLK),
 747         PINMUX_IPSR_DATA(IP8_13_12, MII_RX_CLK),
 748         PINMUX_IPSR_MODSEL_DATA(IP8_15_14, VI1_CLK, SEL_VI1_0),
 749         PINMUX_IPSR_DATA(IP8_15_14, AVB_RX_DV),
 750         PINMUX_IPSR_DATA(IP8_15_14, MII_RX_DV),
 751         PINMUX_IPSR_MODSEL_DATA(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0),
 752         PINMUX_IPSR_MODSEL_DATA(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3),
 753         PINMUX_IPSR_DATA(IP8_17_16, AVB_CRS),
 754         PINMUX_IPSR_DATA(IP8_17_16, MII_CRS),
 755         PINMUX_IPSR_MODSEL_DATA(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0),
 756         PINMUX_IPSR_MODSEL_DATA(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3),
 757         PINMUX_IPSR_DATA(IP8_19_18, AVB_MDC),
 758         PINMUX_IPSR_DATA(IP8_19_18, MII_MDC),
 759         PINMUX_IPSR_MODSEL_DATA(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0),
 760         PINMUX_IPSR_MODSEL_DATA(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3),
 761         PINMUX_IPSR_DATA(IP8_21_20, AVB_MDIO),
 762         PINMUX_IPSR_DATA(IP8_21_20, MII_MDIO),
 763         PINMUX_IPSR_MODSEL_DATA(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0),
 764         PINMUX_IPSR_MODSEL_DATA(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3),
 765         PINMUX_IPSR_DATA(IP8_23_22, AVB_GTX_CLK),
 766         PINMUX_IPSR_MODSEL_DATA(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0),
 767         PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3),
 768         PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC),
 769         PINMUX_IPSR_DATA(IP8_25_24, MII_MAGIC),
 770         PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0),
 771         PINMUX_IPSR_MODSEL_DATA(IP8_26, AVB_PHY_INT, SEL_SCIFA1_3),
 772         PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0),
 773         PINMUX_IPSR_DATA(IP8_27, AVB_GTXREFCLK),
 774         PINMUX_IPSR_DATA(IP8_28, SD0_CLK),
 775         PINMUX_IPSR_MODSEL_DATA(IP8_28, VI1_DATA0_VI1_B0_B, SEL_VI1_1),
 776         PINMUX_IPSR_DATA(IP8_30_29, SD0_CMD),
 777         PINMUX_IPSR_MODSEL_DATA(IP8_30_29, SCIFB1_SCK_B, SEL_SCIFB1_1),
 778         PINMUX_IPSR_MODSEL_DATA(IP8_30_29, VI1_DATA1_VI1_B1_B, SEL_VI1_1),
 779
 780         PINMUX_IPSR_DATA(IP9_1_0, SD0_DAT0),
 781         PINMUX_IPSR_MODSEL_DATA(IP9_1_0, SCIFB1_RXD_B, SEL_SCIFB1_1),
 782         PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_DATA2_VI1_B2_B, SEL_VI1_1),
 783         PINMUX_IPSR_DATA(IP9_3_2, SD0_DAT1),
 784         PINMUX_IPSR_MODSEL_DATA(IP9_3_2, SCIFB1_TXD_B, SEL_SCIFB1_1),
 785         PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_DATA3_VI1_B3_B, SEL_VI1_1),
 786         PINMUX_IPSR_DATA(IP9_5_4, SD0_DAT2),
 787         PINMUX_IPSR_MODSEL_DATA(IP9_5_4, SCIFB1_CTS_N_B, SEL_SCIFB1_1),
 788         PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_DATA4_VI1_B4_B, SEL_VI1_1),
 789         PINMUX_IPSR_DATA(IP9_7_6, SD0_DAT3),
 790         PINMUX_IPSR_MODSEL_DATA(IP9_7_6, SCIFB1_RTS_N_B, SEL_SCIFB1_1),
 791         PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_DATA5_VI1_B5_B, SEL_VI1_1),
 792         PINMUX_IPSR_DATA(IP9_11_8, SD0_CD),
 793         PINMUX_IPSR_DATA(IP9_11_8, MMC0_D6),
 794         PINMUX_IPSR_MODSEL_DATA(IP9_11_8, TS_SDEN0_B, SEL_TSIF0_1),
 795         PINMUX_IPSR_DATA(IP9_11_8, USB0_EXTP),
 796         PINMUX_IPSR_MODSEL_DATA(IP9_11_8, GLO_SCLK, SEL_GPS_0),
 797         PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1),
 798         PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_B, SEL_IIC1_1),
 799         PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_CIS_B, SEL_I2C1_1),
 800         PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1),
 801         PINMUX_IPSR_DATA(IP9_15_12, SD0_WP),
 802         PINMUX_IPSR_DATA(IP9_15_12, MMC0_D7),
 803         PINMUX_IPSR_MODSEL_DATA(IP9_15_12, TS_SPSYNC0_B, SEL_TSIF0_1),
 804         PINMUX_IPSR_DATA(IP9_15_12, USB0_IDIN),
 805         PINMUX_IPSR_MODSEL_DATA(IP9_15_12, GLO_SDATA, SEL_GPS_0),
 806         PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1),
 807         PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_B, SEL_IIC1_1),
 808         PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_CIS_B, SEL_I2C1_1),
 809         PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1),
 810         PINMUX_IPSR_DATA(IP9_17_16, SD1_CLK),
 811         PINMUX_IPSR_DATA(IP9_17_16, AVB_TX_EN),
 812         PINMUX_IPSR_DATA(IP9_17_16, MII_TX_EN),
 813         PINMUX_IPSR_DATA(IP9_19_18, SD1_CMD),
 814         PINMUX_IPSR_DATA(IP9_19_18, AVB_TX_ER),
 815         PINMUX_IPSR_DATA(IP9_19_18, MII_TX_ER),
 816         PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1),
 817         PINMUX_IPSR_DATA(IP9_21_20, SD1_DAT0),
 818         PINMUX_IPSR_DATA(IP9_21_20, AVB_TX_CLK),
 819         PINMUX_IPSR_DATA(IP9_21_20, MII_TX_CLK),
 820         PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1),
 821         PINMUX_IPSR_DATA(IP9_23_22, SD1_DAT1),
 822         PINMUX_IPSR_DATA(IP9_23_22, AVB_LINK),
 823         PINMUX_IPSR_DATA(IP9_23_22, MII_LINK),
 824         PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1),
 825         PINMUX_IPSR_DATA(IP9_25_24, SD1_DAT2),
 826         PINMUX_IPSR_DATA(IP9_25_24, AVB_COL),
 827         PINMUX_IPSR_DATA(IP9_25_24, MII_COL),
 828         PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1),
 829         PINMUX_IPSR_DATA(IP9_27_26, SD1_DAT3),
 830         PINMUX_IPSR_DATA(IP9_27_26, AVB_RXD0),
 831         PINMUX_IPSR_DATA(IP9_27_26, MII_RXD0),
 832         PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1),
 833         PINMUX_IPSR_DATA(IP9_31_28, SD1_CD),
 834         PINMUX_IPSR_DATA(IP9_31_28, MMC1_D6),
 835         PINMUX_IPSR_MODSEL_DATA(IP9_31_28, TS_SDEN1, SEL_TSIF1_0),
 836         PINMUX_IPSR_DATA(IP9_31_28, USB1_EXTP),
 837         PINMUX_IPSR_MODSEL_DATA(IP9_31_28, GLO_SS, SEL_GPS_0),
 838         PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI0_CLK_B, SEL_VI0_1),
 839         PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_D, SEL_IIC2_3),
 840         PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_CIS_D, SEL_I2C2_3),
 841         PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SIM0_CLK_B, SEL_SIM_1),
 842         PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI3_CLK_B, SEL_VI3_1),
 843
 844         PINMUX_IPSR_DATA(IP10_3_0, SD1_WP),
 845         PINMUX_IPSR_DATA(IP10_3_0, MMC1_D7),
 846         PINMUX_IPSR_MODSEL_DATA(IP10_3_0, TS_SPSYNC1, SEL_TSIF1_0),
 847         PINMUX_IPSR_DATA(IP10_3_0, USB1_IDIN),
 848         PINMUX_IPSR_MODSEL_DATA(IP10_3_0, GLO_RFON, SEL_GPS_0),
 849         PINMUX_IPSR_MODSEL_DATA(IP10_3_0, VI1_CLK_B, SEL_VI1_1),
 850         PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_D, SEL_IIC2_3),
 851         PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_CIS_D, SEL_I2C2_3),
 852         PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SIM0_D_B, SEL_SIM_1),
 853         PINMUX_IPSR_DATA(IP10_6_4, SD2_CLK),
 854         PINMUX_IPSR_DATA(IP10_6_4, MMC0_CLK),
 855         PINMUX_IPSR_MODSEL_DATA(IP10_6_4, SIM0_CLK, SEL_SIM_0),
 856         PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI0_DATA0_VI0_B0_B, SEL_VI0_1),
 857         PINMUX_IPSR_MODSEL_DATA(IP10_6_4, TS_SDEN0_C, SEL_TSIF0_2),
 858         PINMUX_IPSR_MODSEL_DATA(IP10_6_4, GLO_SCLK_B, SEL_GPS_1),
 859         PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI3_DATA0_B, SEL_VI3_1),
 860         PINMUX_IPSR_DATA(IP10_10_7, SD2_CMD),
 861         PINMUX_IPSR_DATA(IP10_10_7, MMC0_CMD),
 862         PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SIM0_D, SEL_SIM_0),
 863         PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI0_DATA1_VI0_B1_B, SEL_VI0_1),
 864         PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCIFB1_SCK_E, SEL_SCIFB1_4),
 865         PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCK1_D, SEL_SCIF1_3),
 866         PINMUX_IPSR_MODSEL_DATA(IP10_10_7, TS_SPSYNC0_C, SEL_TSIF0_2),
 867         PINMUX_IPSR_MODSEL_DATA(IP10_10_7, GLO_SDATA_B, SEL_GPS_1),
 868         PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI3_DATA1_B, SEL_VI3_1),
 869         PINMUX_IPSR_DATA(IP10_14_11, SD2_DAT0),
 870         PINMUX_IPSR_DATA(IP10_14_11, MMC0_D0),
 871         PINMUX_IPSR_MODSEL_DATA(IP10_14_11, FMCLK_B, SEL_FM_1),
 872         PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI0_DATA2_VI0_B2_B, SEL_VI0_1),
 873         PINMUX_IPSR_MODSEL_DATA(IP10_14_11, SCIFB1_RXD_E, SEL_SCIFB1_4),
 874         PINMUX_IPSR_MODSEL_DATA(IP10_14_11, RX1_D, SEL_SCIF1_3),
 875         PINMUX_IPSR_MODSEL_DATA(IP10_14_11, TS_SDAT0_C, SEL_TSIF0_2),
 876         PINMUX_IPSR_MODSEL_DATA(IP10_14_11, GLO_SS_B, SEL_GPS_1),
 877         PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI3_DATA2_B, SEL_VI3_1),
 878         PINMUX_IPSR_DATA(IP10_18_15, SD2_DAT1),
 879         PINMUX_IPSR_DATA(IP10_18_15, MMC0_D1),
 880         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, FMIN_B, SEL_FM_1),
 881         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, RDS_DATA, SEL_RDS_0),
 882         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1),
 883         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4),
 884         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TX1_D, SEL_SCIF1_3),
 885         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TS_SCK0_C, SEL_TSIF0_2),
 886         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, GLO_RFON_B, SEL_GPS_1),
 887         PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI3_DATA3_B, SEL_VI3_1),
 888         PINMUX_IPSR_DATA(IP10_22_19, SD2_DAT2),
 889         PINMUX_IPSR_DATA(IP10_22_19, MMC0_D2),
 890         PINMUX_IPSR_MODSEL_DATA(IP10_22_19, BPFCLK_B, SEL_FM_1),
 891         PINMUX_IPSR_MODSEL_DATA(IP10_22_19, RDS_CLK, SEL_RDS_0),
 892         PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1),
 893         PINMUX_IPSR_MODSEL_DATA(IP10_22_19, HRX0_D, SEL_HSCIF0_3),
 894         PINMUX_IPSR_MODSEL_DATA(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1),
 895         PINMUX_IPSR_MODSEL_DATA(IP10_22_19, GLO_Q0_B, SEL_GPS_1),
 896         PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI3_DATA4_B, SEL_VI3_1),
 897         PINMUX_IPSR_DATA(IP10_25_23, SD2_DAT3),
 898         PINMUX_IPSR_DATA(IP10_25_23, MMC0_D3),
 899         PINMUX_IPSR_MODSEL_DATA(IP10_25_23, SIM0_RST, SEL_SIM_0),
 900         PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI0_DATA5_VI0_B5_B, SEL_VI0_1),
 901         PINMUX_IPSR_MODSEL_DATA(IP10_25_23, HTX0_D, SEL_HSCIF0_3),
 902         PINMUX_IPSR_MODSEL_DATA(IP10_25_23, TS_SPSYNC1_B, SEL_TSIF1_1),
 903         PINMUX_IPSR_MODSEL_DATA(IP10_25_23, GLO_Q1_B, SEL_GPS_1),
 904         PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI3_DATA5_B, SEL_VI3_1),
 905         PINMUX_IPSR_DATA(IP10_29_26, SD2_CD),
 906         PINMUX_IPSR_DATA(IP10_29_26, MMC0_D4),
 907         PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT0_B, SEL_TSIF0_1),
 908         PINMUX_IPSR_DATA(IP10_29_26, USB2_EXTP),
 909         PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0, SEL_GPS_0),
 910         PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI0_DATA6_VI0_B6_B, SEL_VI0_1),
 911         PINMUX_IPSR_MODSEL_DATA(IP10_29_26, HCTS0_N_D, SEL_HSCIF0_3),
 912         PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT1_B, SEL_TSIF1_1),
 913         PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0_B, SEL_GPS_1),
 914         PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI3_DATA6_B, SEL_VI3_1),
 915
 916         PINMUX_IPSR_DATA(IP11_3_0, SD2_WP),
 917         PINMUX_IPSR_DATA(IP11_3_0, MMC0_D5),
 918         PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK0_B, SEL_TSIF0_1),
 919         PINMUX_IPSR_DATA(IP11_3_0, USB2_IDIN),
 920         PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1, SEL_GPS_0),
 921         PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI0_DATA7_VI0_B7_B, SEL_VI0_1),
 922         PINMUX_IPSR_MODSEL_DATA(IP11_3_0, HRTS0_N_D, SEL_HSCIF0_3),
 923         PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK1_B, SEL_TSIF1_1),
 924         PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1_B, SEL_GPS_1),
 925         PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI3_DATA7_B, SEL_VI3_1),
 926         PINMUX_IPSR_DATA(IP11_4, SD3_CLK),
 927         PINMUX_IPSR_DATA(IP11_4, MMC1_CLK),
 928         PINMUX_IPSR_DATA(IP11_6_5, SD3_CMD),
 929         PINMUX_IPSR_DATA(IP11_6_5, MMC1_CMD),
 930         PINMUX_IPSR_DATA(IP11_6_5, MTS_N),
 931         PINMUX_IPSR_DATA(IP11_8_7, SD3_DAT0),
 932         PINMUX_IPSR_DATA(IP11_8_7, MMC1_D0),
 933         PINMUX_IPSR_DATA(IP11_8_7, STM_N),
 934         PINMUX_IPSR_DATA(IP11_10_9, SD3_DAT1),
 935         PINMUX_IPSR_DATA(IP11_10_9, MMC1_D1),
 936         PINMUX_IPSR_DATA(IP11_10_9, MDATA),
 937         PINMUX_IPSR_DATA(IP11_12_11, SD3_DAT2),
 938         PINMUX_IPSR_DATA(IP11_12_11, MMC1_D2),
 939         PINMUX_IPSR_DATA(IP11_12_11, SDATA),
 940         PINMUX_IPSR_DATA(IP11_14_13, SD3_DAT3),
 941         PINMUX_IPSR_DATA(IP11_14_13, MMC1_D3),
 942         PINMUX_IPSR_DATA(IP11_14_13, SCKZ),
 943         PINMUX_IPSR_DATA(IP11_17_15, SD3_CD),
 944         PINMUX_IPSR_DATA(IP11_17_15, MMC1_D4),
 945         PINMUX_IPSR_MODSEL_DATA(IP11_17_15, TS_SDAT1, SEL_TSIF1_0),
 946         PINMUX_IPSR_DATA(IP11_17_15, VSP),
 947         PINMUX_IPSR_MODSEL_DATA(IP11_17_15, GLO_Q0, SEL_GPS_0),
 948         PINMUX_IPSR_MODSEL_DATA(IP11_17_15, SIM0_RST_B, SEL_SIM_1),
 949         PINMUX_IPSR_DATA(IP11_21_18, SD3_WP),
 950         PINMUX_IPSR_DATA(IP11_21_18, MMC1_D5),
 951         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, TS_SCK1, SEL_TSIF1_0),
 952         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, GLO_Q1, SEL_GPS_0),
 953         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_C, SEL_FM_2),
 954         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_B, SEL_RDS_1),
 955         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_E, SEL_FM_4),
 956         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_D, SEL_RDS_3),
 957         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_F, SEL_FM_5),
 958         PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_E, SEL_RDS_4),
 959         PINMUX_IPSR_DATA(IP11_23_22, MLB_CLK),
 960         PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_B, SEL_IIC2_1),
 961         PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_CIS_B, SEL_I2C2_1),
 962         PINMUX_IPSR_DATA(IP11_26_24, MLB_SIG),
 963         PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3),
 964         PINMUX_IPSR_MODSEL_DATA(IP11_26_24, RX1_C, SEL_SCIF1_2),
 965         PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_B, SEL_IIC2_1),
 966         PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_CIS_B, SEL_I2C2_1),
 967         PINMUX_IPSR_DATA(IP11_29_27, MLB_DAT),
 968         PINMUX_IPSR_DATA(IP11_29_27, SPV_EVEN),
 969         PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3),
 970         PINMUX_IPSR_MODSEL_DATA(IP11_29_27, TX1_C, SEL_SCIF1_2),
 971         PINMUX_IPSR_MODSEL_DATA(IP11_29_27, BPFCLK_C, SEL_FM_2),
 972         PINMUX_IPSR_MODSEL_DATA(IP11_29_27, RDS_CLK_B, SEL_RDS_1),
 973         PINMUX_IPSR_DATA(IP11_31_30, SSI_SCK0129),
 974         PINMUX_IPSR_MODSEL_DATA(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1),
 975         PINMUX_IPSR_DATA(IP11_31_30, MOUT0),
 976
 977 };
 978
 979 static struct pinmux_gpio pinmux_gpios[] = {
 980         PINMUX_GPIO_GP_ALL(),
 981
 982         GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC_VBUS),
 983         GPIO_FN(USB2_PWEN), GPIO_FN(USB2_OVC), GPIO_FN(AVS1), GPIO_FN(AVS2),
 984         GPIO_FN(DU_DOTCLKIN0), GPIO_FN(DU_DOTCLKIN2),
 985
 986         /* IPSR0 - IPSR5 */
 987         /*IPSR6*/
 988         GPIO_FN(DACK0), GPIO_FN(IRQ0), GPIO_FN(INTC_IRQ0_N),
 989         GPIO_FN(SSI_SCK6_B), GPIO_FN(VI1_VSYNC_N), GPIO_FN(VI1_VSYNC_N_B),
 990         GPIO_FN(SSI_WS78_C), GPIO_FN(DREQ1_N), GPIO_FN(VI1_CLKENB),
 991         GPIO_FN(VI1_CLKENB_B), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SSI_SCK78_B),
 992         GPIO_FN(DACK1), GPIO_FN(IRQ1), GPIO_FN(INTC_IRQ1_N), GPIO_FN(SSI_WS6_B),
 993         GPIO_FN(SSI_SDATA8_C), GPIO_FN(DREQ2_N), GPIO_FN(HSCK1_B),
 994         GPIO_FN(HCTS0_N_B), GPIO_FN(MSIOF0_TXD_B), GPIO_FN(DACK2),
 995         GPIO_FN(IRQ2), GPIO_FN(INTC_IRQ2_N), GPIO_FN(SSI_SDATA6_B),
 996         GPIO_FN(HRTS0_N_B), GPIO_FN(MSIOF0_RXD_B), GPIO_FN(ETH_CRS_DV),
 997         GPIO_FN(RMII_CRS_DV), GPIO_FN(STP_ISCLK_0_B), GPIO_FN(TS_SDEN0_D),
 998         GPIO_FN(GLO_Q0_C), GPIO_FN(SCL2_E), GPIO_FN(SCL2_CIS_E),
 999         GPIO_FN(ETH_RX_ER), GPIO_FN(RMII_RX_ER), GPIO_FN(STP_ISD_0_B),
1000         GPIO_FN(TS_SPSYNC0_D), GPIO_FN(GLO_Q1_C), GPIO_FN(SDA2_E),
1001         GPIO_FN(SDA2_CIS_E), GPIO_FN(ETH_RXD0), GPIO_FN(RMII_RXD0),
1002         GPIO_FN(STP_ISEN_0_B), GPIO_FN(TS_SDAT0_D), GPIO_FN(GLO_I0_C),
1003         GPIO_FN(SCIFB1_SCK_G), GPIO_FN(SCK1_E), GPIO_FN(ETH_RXD1),
1004         GPIO_FN(RMII_RXD1), GPIO_FN(HRX0_E), GPIO_FN(STP_ISSYNC_0_B),
1005         GPIO_FN(TS_SCK0_D), GPIO_FN(GLO_I1_C), GPIO_FN(SCIFB1_RXD_G),
1006         GPIO_FN(RX1_E), GPIO_FN(ETH_LINK), GPIO_FN(RMII_LINK), GPIO_FN(HTX0_E),
1007         GPIO_FN(STP_IVCXO27_0_B), GPIO_FN(SCIFB1_TXD_G), GPIO_FN(TX1_E),
1008         GPIO_FN(ETH_REF_CLK), GPIO_FN(RMII_REF_CLK), GPIO_FN(HCTS0_N_E),
1009         GPIO_FN(STP_IVCXO27_1_B), GPIO_FN(HRX0_F),
1010
1011         /*IPSR7*/
1012         GPIO_FN(ETH_MDIO), GPIO_FN(RMII_MDIO), GPIO_FN(HRTS0_N_E),
1013         GPIO_FN(SIM0_D_C), GPIO_FN(HCTS0_N_F), GPIO_FN(ETH_TXD1),
1014         GPIO_FN(RMII_TXD1), GPIO_FN(HTX0_F), GPIO_FN(BPFCLK_G),
1015         GPIO_FN(RDS_CLK_F), GPIO_FN(ETH_TX_EN), GPIO_FN(RMII_TX_EN),
1016         GPIO_FN(SIM0_CLK_C), GPIO_FN(HRTS0_N_F), GPIO_FN(ETH_MAGIC),
1017         GPIO_FN(RMII_MAGIC), GPIO_FN(SIM0_RST_C), GPIO_FN(ETH_TXD0),
1018         GPIO_FN(RMII_TXD0), GPIO_FN(STP_ISCLK_1_B), GPIO_FN(TS_SDEN1_C),
1019         GPIO_FN(GLO_SCLK_C), GPIO_FN(ETH_MDC), GPIO_FN(RMII_MDC),
1020         GPIO_FN(STP_ISD_1_B), GPIO_FN(TS_SPSYNC1_C), GPIO_FN(GLO_SDATA_C),
1021         GPIO_FN(PWM0), GPIO_FN(SCIFA2_SCK_C), GPIO_FN(STP_ISEN_1_B),
1022         GPIO_FN(TS_SDAT1_C), GPIO_FN(GLO_SS_C), GPIO_FN(PWM1),
1023         GPIO_FN(SCIFA2_TXD_C), GPIO_FN(STP_ISSYNC_1_B), GPIO_FN(TS_SCK1_C),
1024         GPIO_FN(GLO_RFON_C), GPIO_FN(PCMOE_N), GPIO_FN(PWM2), GPIO_FN(PWMFSW0),
1025         GPIO_FN(SCIFA2_RXD_C), GPIO_FN(PCMWE_N), GPIO_FN(IECLK_C),
1026         GPIO_FN(DU1_DOTCLKIN), GPIO_FN(AUDIO_CLKC), GPIO_FN(AUDIO_CLKOUT_C),
1027         GPIO_FN(VI0_CLK), GPIO_FN(ATACS00_N), GPIO_FN(AVB_RXD1),
1028         GPIO_FN(MII_RXD1), GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(ATACS10_N),
1029         GPIO_FN(AVB_RXD2), GPIO_FN(MII_RXD2),
1030
1031         /*IPSR8*/
1032         GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(ATARD0_N), GPIO_FN(AVB_RXD3),
1033         GPIO_FN(MII_RXD3), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(ATAWR0_N),
1034         GPIO_FN(AVB_RXD4), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ATADIR0_N),
1035         GPIO_FN(AVB_RXD5), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ATAG0_N),
1036         GPIO_FN(AVB_RXD6), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(EX_WAIT1),
1037         GPIO_FN(AVB_RXD7), GPIO_FN(VI0_DATA6_VI0_B6), GPIO_FN(AVB_RX_ER),
1038         GPIO_FN(MII_RX_ER), GPIO_FN(VI0_DATA7_VI0_B7), GPIO_FN(AVB_RX_CLK),
1039         GPIO_FN(MII_RX_CLK), GPIO_FN(VI1_CLK), GPIO_FN(AVB_RX_DV),
1040         GPIO_FN(MII_RX_DV), GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SCIFA1_SCK_D),
1041         GPIO_FN(AVB_CRS), GPIO_FN(MII_CRS), GPIO_FN(VI1_DATA1_VI1_B1),
1042         GPIO_FN(SCIFA1_RXD_D), GPIO_FN(AVB_MDC), GPIO_FN(MII_MDC),
1043         GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SCIFA1_TXD_D), GPIO_FN(AVB_MDIO),
1044         GPIO_FN(MII_MDIO), GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SCIFA1_CTS_N_D),
1045         GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI1_DATA4_VI1_B4),
1046         GPIO_FN(SCIFA1_RTS_N_D), GPIO_FN(AVB_MAGIC), GPIO_FN(MII_MAGIC),
1047         GPIO_FN(VI1_DATA5_VI1_B5), GPIO_FN(AVB_PHY_INT),
1048         GPIO_FN(VI1_DATA6_VI1_B6), GPIO_FN(AVB_GTXREFCLK),
1049         GPIO_FN(SD0_CLK), GPIO_FN(VI1_DATA0_VI1_B0_B), GPIO_FN(SD0_CMD),
1050         GPIO_FN(SCIFB1_SCK_B), GPIO_FN(VI1_DATA1_VI1_B1_B),
1051
1052         /*IPSR9*/
1053         GPIO_FN(SD0_DAT0), GPIO_FN(SCIFB1_RXD_B), GPIO_FN(VI1_DATA2_VI1_B2_B),
1054         GPIO_FN(SD0_DAT1), GPIO_FN(SCIFB1_TXD_B), GPIO_FN(VI1_DATA3_VI1_B3_B),
1055         GPIO_FN(SD0_DAT2), GPIO_FN(SCIFB1_CTS_N_B), GPIO_FN(VI1_DATA4_VI1_B4_B),
1056         GPIO_FN(SD0_DAT3), GPIO_FN(SCIFB1_RTS_N_B), GPIO_FN(VI1_DATA5_VI1_B5_B),
1057         GPIO_FN(SD0_CD), GPIO_FN(MMC0_D6), GPIO_FN(TS_SDEN0_B),
1058         GPIO_FN(USB0_EXTP), GPIO_FN(GLO_SCLK), GPIO_FN(VI1_DATA6_VI1_B6_B),
1059         GPIO_FN(SCL1_B), GPIO_FN(SCL1_CIS_B), GPIO_FN(VI2_DATA6_VI2_B6_B),
1060         GPIO_FN(SD0_WP), GPIO_FN(MMC0_D7), GPIO_FN(TS_SPSYNC0_B),
1061         GPIO_FN(USB0_IDIN), GPIO_FN(GLO_SDATA), GPIO_FN(VI1_DATA7_VI1_B7_B),
1062         GPIO_FN(SDA1_B), GPIO_FN(SDA1_CIS_B), GPIO_FN(VI2_DATA7_VI2_B7_B),
1063         GPIO_FN(SD1_CLK), GPIO_FN(AVB_TX_EN), GPIO_FN(MII_TX_EN),
1064         GPIO_FN(SD1_CMD), GPIO_FN(AVB_TX_ER), GPIO_FN(MII_TX_ER),
1065         GPIO_FN(SCIFB0_SCK_B), GPIO_FN(SD1_DAT0), GPIO_FN(AVB_TX_CLK),
1066         GPIO_FN(MII_TX_CLK), GPIO_FN(SCIFB0_RXD_B), GPIO_FN(SD1_DAT1),
1067         GPIO_FN(AVB_LINK), GPIO_FN(MII_LINK), GPIO_FN(SCIFB0_TXD_B),
1068         GPIO_FN(SD1_DAT2), GPIO_FN(AVB_COL), GPIO_FN(MII_COL),
1069         GPIO_FN(SCIFB0_CTS_N_B), GPIO_FN(SD1_DAT3), GPIO_FN(AVB_RXD0),
1070         GPIO_FN(MII_RXD0), GPIO_FN(SCIFB0_RTS_N_B), GPIO_FN(SD1_CD),
1071         GPIO_FN(MMC1_D6), GPIO_FN(TS_SDEN1), GPIO_FN(USB1_EXTP),
1072         GPIO_FN(GLO_SS), GPIO_FN(VI0_CLK_B), GPIO_FN(SCL2_D),
1073         GPIO_FN(SCL2_CIS_D), GPIO_FN(SIM0_CLK_B), GPIO_FN(VI3_CLK_B),
1074
1075         /*IPSR10*/
1076         GPIO_FN(SD1_WP), GPIO_FN(MMC1_D7), GPIO_FN(TS_SPSYNC1),
1077         GPIO_FN(USB1_IDIN), GPIO_FN(GLO_RFON), GPIO_FN(VI1_CLK_B),
1078         GPIO_FN(SDA2_D), GPIO_FN(SDA2_CIS_D), GPIO_FN(SIM0_D_B),
1079         GPIO_FN(SD2_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(SIM0_CLK),
1080         GPIO_FN(VI0_DATA0_VI0_B0_B), GPIO_FN(TS_SDEN0_C), GPIO_FN(GLO_SCLK_B),
1081         GPIO_FN(VI3_DATA0_B), GPIO_FN(SD2_CMD), GPIO_FN(MMC0_CMD),
1082         GPIO_FN(SIM0_D), GPIO_FN(VI0_DATA1_VI0_B1_B), GPIO_FN(SCIFB1_SCK_E),
1083         GPIO_FN(SCK1_D), GPIO_FN(TS_SPSYNC0_C), GPIO_FN(GLO_SDATA_B),
1084         GPIO_FN(VI3_DATA1_B), GPIO_FN(SD2_DAT0), GPIO_FN(MMC0_D0),
1085         GPIO_FN(FMCLK_B), GPIO_FN(VI0_DATA2_VI0_B2_B), GPIO_FN(SCIFB1_RXD_E),
1086         GPIO_FN(RX1_D), GPIO_FN(TS_SDAT0_C), GPIO_FN(GLO_SS_B),
1087         GPIO_FN(VI3_DATA2_B), GPIO_FN(SD2_DAT1), GPIO_FN(MMC0_D1),
1088         GPIO_FN(FMIN_B), GPIO_FN(RDS_DATA), GPIO_FN(VI0_DATA3_VI0_B3_B),
1089         GPIO_FN(SCIFB1_TXD_E), GPIO_FN(TX1_D), GPIO_FN(TS_SCK0_C),
1090         GPIO_FN(GLO_RFON_B), GPIO_FN(VI3_DATA3_B), GPIO_FN(SD2_DAT2),
1091         GPIO_FN(MMC0_D2), GPIO_FN(BPFCLK_B), GPIO_FN(RDS_CLK),
1092         GPIO_FN(VI0_DATA4_VI0_B4_B), GPIO_FN(HRX0_D), GPIO_FN(TS_SDEN1_B),
1093         GPIO_FN(GLO_Q0_B), GPIO_FN(VI3_DATA4_B), GPIO_FN(SD2_DAT3),
1094         GPIO_FN(MMC0_D3), GPIO_FN(SIM0_RST), GPIO_FN(VI0_DATA5_VI0_B5_B),
1095         GPIO_FN(HTX0_D), GPIO_FN(TS_SPSYNC1_B), GPIO_FN(GLO_Q1_B),
1096         GPIO_FN(VI3_DATA5_B), GPIO_FN(SD2_CD), GPIO_FN(MMC0_D4),
1097         GPIO_FN(TS_SDAT0_B), GPIO_FN(USB2_EXTP), GPIO_FN(GLO_I0),
1098         GPIO_FN(VI0_DATA6_VI0_B6_B), GPIO_FN(HCTS0_N_D), GPIO_FN(TS_SDAT1_B),
1099         GPIO_FN(GLO_I0_B), GPIO_FN(VI3_DATA6_B),
1100
1101         /*IPSR11*/
1102         GPIO_FN(SD2_WP), GPIO_FN(MMC0_D5), GPIO_FN(TS_SCK0_B),
1103         GPIO_FN(USB2_IDIN), GPIO_FN(GLO_I1), GPIO_FN(VI0_DATA7_VI0_B7_B),
1104         GPIO_FN(HRTS0_N_D), GPIO_FN(TS_SCK1_B), GPIO_FN(GLO_I1_B),
1105         GPIO_FN(VI3_DATA7_B), GPIO_FN(SD3_CLK), GPIO_FN(MMC1_CLK),
1106         GPIO_FN(SD3_CMD), GPIO_FN(MMC1_CMD), GPIO_FN(MTS_N), GPIO_FN(SD3_DAT0),
1107         GPIO_FN(MMC1_D0), GPIO_FN(STM_N), GPIO_FN(SD3_DAT1), GPIO_FN(MMC1_D1),
1108         GPIO_FN(MDATA), GPIO_FN(SD3_DAT2), GPIO_FN(MMC1_D2), GPIO_FN(SDATA),
1109         GPIO_FN(SD3_DAT3), GPIO_FN(MMC1_D3), GPIO_FN(SCKZ), GPIO_FN(SD3_CD),
1110         GPIO_FN(MMC1_D4), GPIO_FN(TS_SDAT1), GPIO_FN(VSP), GPIO_FN(GLO_Q0),
1111         GPIO_FN(SIM0_RST_B), GPIO_FN(SD3_WP), GPIO_FN(MMC1_D5),
1112         GPIO_FN(TS_SCK1), GPIO_FN(GLO_Q1), GPIO_FN(FMIN_C), GPIO_FN(RDS_DATA_B),
1113         GPIO_FN(FMIN_E), GPIO_FN(RDS_DATA_D), GPIO_FN(FMIN_F),
1114         GPIO_FN(RDS_DATA_E), GPIO_FN(MLB_CLK), GPIO_FN(SCL2_B),
1115         GPIO_FN(SCL2_CIS_B), GPIO_FN(MLB_SIG), GPIO_FN(SCIFB1_RXD_D),
1116         GPIO_FN(RX1_C), GPIO_FN(SDA2_B), GPIO_FN(SDA2_CIS_B), GPIO_FN(MLB_DAT),
1117         GPIO_FN(SPV_EVEN), GPIO_FN(SCIFB1_TXD_D), GPIO_FN(TX1_C),
1118         GPIO_FN(BPFCLK_C), GPIO_FN(RDS_CLK_B), GPIO_FN(SSI_SCK0129),
1119         GPIO_FN(CAN_CLK_B), GPIO_FN(MOUT0),
1120
1121 };
1122
1123 static struct pinmux_cfg_reg pinmux_config_regs[] = {
1124         { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
1125                 GP_0_31_FN, FN_IP3_17_15,
1126                 GP_0_30_FN, FN_IP3_14_12,
1127                 GP_0_29_FN, FN_IP3_11_8,
1128                 GP_0_28_FN, FN_IP3_7_4,
1129                 GP_0_27_FN, FN_IP3_3_0,
1130                 GP_0_26_FN, FN_IP2_28_26,
1131                 GP_0_25_FN, FN_IP2_25_22,
1132                 GP_0_24_FN, FN_IP2_21_18,
1133                 GP_0_23_FN, FN_IP2_17_15,
1134                 GP_0_22_FN, FN_IP2_14_12,
1135                 GP_0_21_FN, FN_IP2_11_9,
1136                 GP_0_20_FN, FN_IP2_8_6,
1137                 GP_0_19_FN, FN_IP2_5_3,
1138                 GP_0_18_FN, FN_IP2_2_0,
1139                 GP_0_17_FN, FN_IP1_29_28,
1140                 GP_0_16_FN, FN_IP1_27_26,
1141                 GP_0_15_FN, FN_IP1_25_22,
1142                 GP_0_14_FN, FN_IP1_21_18,
1143                 GP_0_13_FN, FN_IP1_17_15,
1144                 GP_0_12_FN, FN_IP1_14_12,
1145                 GP_0_11_FN, FN_IP1_11_8,
1146                 GP_0_10_FN, FN_IP1_7_4,
1147                 GP_0_9_FN, FN_IP1_3_0,
1148                 GP_0_8_FN, FN_IP0_30_27,
1149                 GP_0_7_FN, FN_IP0_26_23,
1150                 GP_0_6_FN, FN_IP0_22_20,
1151                 GP_0_5_FN, FN_IP0_19_16,
1152                 GP_0_4_FN, FN_IP0_15_12,
1153                 GP_0_3_FN, FN_IP0_11_9,
1154                 GP_0_2_FN, FN_IP0_8_6,
1155                 GP_0_1_FN, FN_IP0_5_3,
1156                 GP_0_0_FN, FN_IP0_2_0 }
1157         },
1158         { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
1159                 0, 0,
1160                 0, 0,
1161                 GP_1_29_FN, FN_IP6_13_11,
1162                 GP_1_28_FN, FN_IP6_10_9,
1163                 GP_1_27_FN, FN_IP6_8_6,
1164                 GP_1_26_FN, FN_IP6_5_3,
1165                 GP_1_25_FN, FN_IP6_2_0,
1166                 GP_1_24_FN, FN_IP5_29_27,
1167                 GP_1_23_FN, FN_IP5_26_24,
1168                 GP_1_22_FN, FN_IP5_23_21,
1169                 GP_1_21_FN, FN_IP5_20_18,
1170                 GP_1_20_FN, FN_IP5_17_15,
1171                 GP_1_19_FN, FN_IP5_14_13,
1172                 GP_1_18_FN, FN_IP5_12_10,
1173                 GP_1_17_FN, FN_IP5_9_6,
1174                 GP_1_16_FN, FN_IP5_5_3,
1175                 GP_1_15_FN, FN_IP5_2_0,
1176                 GP_1_14_FN, FN_IP4_29_27,
1177                 GP_1_13_FN, FN_IP4_26_24,
1178                 GP_1_12_FN, FN_IP4_23_21,
1179                 GP_1_11_FN, FN_IP4_20_18,
1180                 GP_1_10_FN, FN_IP4_17_15,
1181                 GP_1_9_FN, FN_IP4_14_12,
1182                 GP_1_8_FN, FN_IP4_11_9,
1183                 GP_1_7_FN, FN_IP4_8_6,
1184                 GP_1_6_FN, FN_IP4_5_3,
1185                 GP_1_5_FN, FN_IP4_2_0,
1186                 GP_1_4_FN, FN_IP3_31_29,
1187                 GP_1_3_FN, FN_IP3_28_26,
1188                 GP_1_2_FN, FN_IP3_25_23,
1189                 GP_1_1_FN, FN_IP3_22_20,
1190                 GP_1_0_FN, FN_IP3_19_18, }
1191         },
1192         { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
1193                 0, 0,
1194                 0, 0,
1195                 GP_2_29_FN, FN_IP7_15_13,
1196                 GP_2_28_FN, FN_IP7_12_10,
1197                 GP_2_27_FN, FN_IP7_9_8,
1198                 GP_2_26_FN, FN_IP7_7_6,
1199                 GP_2_25_FN, FN_IP7_5_3,
1200                 GP_2_24_FN, FN_IP7_2_0,
1201                 GP_2_23_FN, FN_IP6_31_29,
1202                 GP_2_22_FN, FN_IP6_28_26,
1203                 GP_2_21_FN, FN_IP6_25_23,
1204                 GP_2_20_FN, FN_IP6_22_20,
1205                 GP_2_19_FN, FN_IP6_19_17,
1206                 GP_2_18_FN, FN_IP6_16_14,
1207                 GP_2_17_FN, FN_VI1_DATA7_VI1_B7,
1208                 GP_2_16_FN, FN_IP8_27,
1209                 GP_2_15_FN, FN_IP8_26,
1210                 GP_2_14_FN, FN_IP8_25_24,
1211                 GP_2_13_FN, FN_IP8_23_22,
1212                 GP_2_12_FN, FN_IP8_21_20,
1213                 GP_2_11_FN, FN_IP8_19_18,
1214                 GP_2_10_FN, FN_IP8_17_16,
1215                 GP_2_9_FN, FN_IP8_15_14,
1216                 GP_2_8_FN, FN_IP8_13_12,
1217                 GP_2_7_FN, FN_IP8_11_10,
1218                 GP_2_6_FN, FN_IP8_9_8,
1219                 GP_2_5_FN, FN_IP8_7_6,
1220                 GP_2_4_FN, FN_IP8_5_4,
1221                 GP_2_3_FN, FN_IP8_3_2,
1222                 GP_2_2_FN, FN_IP8_1_0,
1223                 GP_2_1_FN, FN_IP7_30_29,
1224                 GP_2_0_FN, FN_IP7_28_27 }
1225         },
1226         { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
1227                 GP_3_31_FN, FN_IP11_21_18,
1228                 GP_3_30_FN, FN_IP11_17_15,
1229                 GP_3_29_FN, FN_IP11_14_13,
1230                 GP_3_28_FN, FN_IP11_12_11,
1231                 GP_3_27_FN, FN_IP11_10_9,
1232                 GP_3_26_FN, FN_IP11_8_7,
1233                 GP_3_25_FN, FN_IP11_6_5,
1234                 GP_3_24_FN, FN_IP11_4,
1235                 GP_3_23_FN, FN_IP11_3_0,
1236                 GP_3_22_FN, FN_IP10_29_26,
1237                 GP_3_21_FN, FN_IP10_25_23,
1238                 GP_3_20_FN, FN_IP10_22_19,
1239                 GP_3_19_FN, FN_IP10_18_15,
1240                 GP_3_18_FN, FN_IP10_14_11,
1241                 GP_3_17_FN, FN_IP10_10_7,
1242                 GP_3_16_FN, FN_IP10_6_4,
1243                 GP_3_15_FN, FN_IP10_3_0,
1244                 GP_3_14_FN, FN_IP9_31_28,
1245                 GP_3_13_FN, FN_IP9_27_26,
1246                 GP_3_12_FN, FN_IP9_25_24,
1247                 GP_3_11_FN, FN_IP9_23_22,
1248                 GP_3_10_FN, FN_IP9_21_20,
1249                 GP_3_9_FN, FN_IP9_19_18,
1250                 GP_3_8_FN, FN_IP9_17_16,
1251                 GP_3_7_FN, FN_IP9_15_12,
1252                 GP_3_6_FN, FN_IP9_11_8,
1253                 GP_3_5_FN, FN_IP9_7_6,
1254                 GP_3_4_FN, FN_IP9_5_4,
1255                 GP_3_3_FN, FN_IP9_3_2,
1256                 GP_3_2_FN, FN_IP9_1_0,
1257                 GP_3_1_FN, FN_IP8_30_29,
1258                 GP_3_0_FN, FN_IP8_28 }
1259         },
1260         { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
1261                 GP_4_31_FN, FN_IP14_18_16,
1262                 GP_4_30_FN, FN_IP14_15_12,
1263                 GP_4_29_FN, FN_IP14_11_9,
1264                 GP_4_28_FN, FN_IP14_8_6,
1265                 GP_4_27_FN, FN_IP14_5_3,
1266                 GP_4_26_FN, FN_IP14_2_0,
1267                 GP_4_25_FN, FN_IP13_30_29,
1268                 GP_4_24_FN, FN_IP13_28_26,
1269                 GP_4_23_FN, FN_IP13_25_23,
1270                 GP_4_22_FN, FN_IP13_22_19,
1271                 GP_4_21_FN, FN_IP13_18_16,
1272                 GP_4_20_FN, FN_IP13_15_13,
1273                 GP_4_19_FN, FN_IP13_12_10,
1274                 GP_4_18_FN, FN_IP13_9_7,
1275                 GP_4_17_FN, FN_IP13_6_3,
1276                 GP_4_16_FN, FN_IP13_2_0,
1277                 GP_4_15_FN, FN_IP12_30_28,
1278                 GP_4_14_FN, FN_IP12_27_25,
1279                 GP_4_13_FN, FN_IP12_24_23,
1280                 GP_4_12_FN, FN_IP12_22_20,
1281                 GP_4_11_FN, FN_IP12_19_17,
1282                 GP_4_10_FN, FN_IP12_16_14,
1283                 GP_4_9_FN, FN_IP12_13_11,
1284                 GP_4_8_FN, FN_IP12_10_8,
1285                 GP_4_7_FN, FN_IP12_7_6,
1286                 GP_4_6_FN, FN_IP12_5_4,
1287                 GP_4_5_FN, FN_IP12_3_2,
1288                 GP_4_4_FN, FN_IP12_1_0,
1289                 GP_4_3_FN, FN_IP11_31_30,
1290                 GP_4_2_FN, FN_IP11_29_27,
1291                 GP_4_1_FN, FN_IP11_26_24,
1292                 GP_4_0_FN, FN_IP11_23_22 }
1293         },
1294         { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
1295                 GP_5_31_FN, FN_IP7_24_22,
1296                 GP_5_30_FN, FN_IP7_21_19,
1297                 GP_5_29_FN, FN_IP7_18_16,
1298                 GP_5_28_FN, FN_DU_DOTCLKIN2,
1299                 GP_5_27_FN, FN_IP7_26_25,
1300                 GP_5_26_FN, FN_DU_DOTCLKIN0,
1301                 GP_5_25_FN, FN_AVS2,
1302                 GP_5_24_FN, FN_AVS1,
1303                 GP_5_23_FN, FN_USB2_OVC,
1304                 GP_5_22_FN, FN_USB2_PWEN,
1305                 GP_5_21_FN, FN_IP16_7,
1306                 GP_5_20_FN, FN_IP16_6,
1307                 GP_5_19_FN, FN_USB0_OVC_VBUS,
1308                 GP_5_18_FN, FN_USB0_PWEN,
1309                 GP_5_17_FN, FN_IP16_5_3,
1310                 GP_5_16_FN, FN_IP16_2_0,
1311                 GP_5_15_FN, FN_IP15_29_28,
1312                 GP_5_14_FN, FN_IP15_27_26,
1313                 GP_5_13_FN, FN_IP15_25_23,
1314                 GP_5_12_FN, FN_IP15_22_20,
1315                 GP_5_11_FN, FN_IP15_19_18,
1316                 GP_5_10_FN, FN_IP15_17_16,
1317                 GP_5_9_FN, FN_IP15_15_14,
1318                 GP_5_8_FN, FN_IP15_13_12,
1319                 GP_5_7_FN, FN_IP15_11_9,
1320                 GP_5_6_FN, FN_IP15_8_6,
1321                 GP_5_5_FN, FN_IP15_5_3,
1322                 GP_5_4_FN, FN_IP15_2_0,
1323                 GP_5_3_FN, FN_IP14_30_28,
1324                 GP_5_2_FN, FN_IP14_27_25,
1325                 GP_5_1_FN, FN_IP14_24_22,
1326                 GP_5_0_FN, FN_IP14_21_19 }
1327         },
1328         /* IPSR0 - IPSR5 */
1329         { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
1330                              3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3) {
1331                 /* IP6_31_29 [3] */
1332                 FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
1333                 FN_STP_IVCXO27_1_B, FN_HRX0_F, 0, 0, 0,
1334                 /* IP6_28_26 [3] */
1335                 FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
1336                 FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 0, 0,
1337                 /* IP6_25_23 [3] */
1338                 FN_ETH_RXD1, FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
1339                 FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, FN_RX1_E,
1340                 /* IP6_22_20 [3] */
1341                 FN_ETH_RXD0, FN_RMII_RXD0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D,
1342                 FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0,
1343                 /* IP6_19_17 [3] */
1344                 FN_ETH_RX_ER, FN_RMII_RX_ER, FN_STP_ISD_0_B,
1345                 FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_SDA2_E, FN_SDA2_CIS_E, 0,
1346                 /* IP6_16_14 [3] */
1347                 FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
1348                 FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
1349                 FN_SCL2_CIS_E, 0,
1350                 /* IP6_13_11 [3] */
1351                 FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
1352                 FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, 0, 0,
1353                 /* IP6_10_9 [2] */
1354                 FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, FN_MSIOF0_TXD_B,
1355                 /* IP6_8_6 [3] */
1356                 FN_DACK1, FN_IRQ1, FN_INTC_IRQ1_N, FN_SSI_WS6_B,
1357                 FN_SSI_SDATA8_C, 0, 0, 0,
1358                 /* IP6_5_3 [3] */
1359                 FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
1360                 FN_SSI_SDATA7_C, FN_SSI_SCK78_B, 0, 0, 0,
1361                 /* IP6_2_0 [3] */
1362                 FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
1363                 FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, 0, }
1364         },
1365         { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
1366                              1, 2, 2, 2, 3, 3, 3, 3, 3, 2, 2, 3, 3) {
1367                 /* IP7_31 [1] */
1368                 0, 0,
1369                 /* IP7_30_29 [2] */
1370                 FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
1371                 FN_MII_RXD2,
1372                 /* IP7_28_27 [2] */
1373                 FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
1374                 /* IP7_26_25 [2] */
1375                 FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
1376                 /* IP7_24_22 [3] */
1377                 FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C,
1378                 0, 0, 0,
1379                 /* IP7_21_19 [3] */
1380                 FN_PWM1, FN_SCIFA2_TXD_C, FN_STP_ISSYNC_1_B, FN_TS_SCK1_C,
1381                 FN_GLO_RFON_C, FN_PCMOE_N, 0, 0,
1382                 /* IP7_18_16 [3] */
1383                 FN_PWM0, FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
1384                 FN_GLO_SS_C, 0, 0, 0,
1385                 /* IP7_15_13 [3] */
1386                 FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
1387                 FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, 0, 0, 0,
1388                 /* IP7_12_10 [3] */
1389                 FN_ETH_TXD0, FN_RMII_TXD0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C,
1390                 FN_GLO_SCLK_C, 0, 0, 0,
1391                 /* IP7_9_8 [2] */
1392                 FN_ETH_MAGIC, FN_RMII_MAGIC, FN_SIM0_RST_C, 0,
1393                 /* IP7_7_6 [2] */
1394                 FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C, FN_HRTS0_N_F,
1395                 /* IP7_5_3 [3] */
1396                 FN_ETH_TXD1, FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
1397                 0, 0, 0,
1398                 /* IP7_2_0 [3] */
1399                 FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
1400                 FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, }
1401         },
1402         { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
1403                              1, 2, 1, 1, 1, 2, 2, 2, 2, 2, 2,
1404                              2, 2, 2, 2, 2, 2, 2) {
1405                 /* IP8_31 [1] */
1406                 0, 0,
1407                 /* IP8_30_29 [2] */
1408                 FN_SD0_CMD, FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B, 0,
1409                 /* IP8_28 [1] */
1410                 FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B,
1411                 /* IP8_27 [1] */
1412                 FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,
1413                 /* IP8_26 [1] */
1414                 FN_VI1_DATA5_VI1_B5, FN_AVB_PHY_INT,
1415                 /* IP8_25_24 [2] */
1416                 FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
1417                 FN_AVB_MAGIC, FN_MII_MAGIC,
1418                 /* IP8_23_22 [2] */
1419                 FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, FN_AVB_GTX_CLK, 0,
1420                 /* IP8_21_20 [2] */
1421                 FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
1422                 FN_MII_MDIO,
1423                 /* IP8_19_18 [2] */
1424                 FN_VI1_DATA1_VI1_B1, FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
1425                 /* IP8_17_16 [2] */
1426                 FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, FN_AVB_CRS, FN_MII_CRS,
1427                 /* IP8_15_14 [2] */
1428                 FN_VI1_CLK, FN_AVB_RX_DV, FN_MII_RX_DV, 0,
1429                 /* IP8_13_12 [2] */
1430                 FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, FN_MII_RX_CLK, 0,
1431                 /* IP8_11_10 [2] */
1432                 FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, FN_MII_RX_ER, 0,
1433                 /* IP8_9_8 [2] */
1434                 FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, FN_AVB_RXD7, 0,
1435                 /* IP8_7_6 [2] */
1436                 FN_VI0_DATA4_VI0_B4, FN_ATAG0_N, FN_AVB_RXD6, 0,
1437                 /* IP8_5_4 [2] */
1438                 FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N, FN_AVB_RXD5, 0,
1439                 /* IP8_3_2 [2] */
1440                 FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, FN_AVB_RXD4, 0,
1441                 /* IP8_1_0 [2] */
1442                 FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, FN_MII_RXD3, }
1443         },
1444         { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
1445                              4, 2, 2, 2, 2, 2, 2, 4, 4, 2, 2, 2, 2) {
1446                 /* IP9_31_28 [4] */
1447                 FN_SD1_CD, FN_MMC1_D6, FN_TS_SDEN1, FN_USB1_EXTP,
1448                 FN_GLO_SS, FN_VI0_CLK_B, FN_SCL2_D, FN_SCL2_CIS_D,
1449                 FN_SIM0_CLK_B, FN_VI3_CLK_B, 0, 0, 0, 0, 0, 0,
1450                 /* IP9_27_26 [2] */
1451                 FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0, FN_SCIFB0_RTS_N_B,
1452                 /* IP9_25_24 [2] */
1453                 FN_SD1_DAT2, FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
1454                 /* IP9_23_22 [2] */
1455                 FN_SD1_DAT1, FN_AVB_LINK, FN_MII_LINK, FN_SCIFB0_TXD_B,
1456                 /* IP9_21_20 [2] */
1457                 FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK, FN_SCIFB0_RXD_B,
1458                 /* IP9_19_18 [2] */
1459                 FN_SD1_CMD, FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
1460                 /* IP9_17_16 [2] */
1461                 FN_SD1_CLK, FN_AVB_TX_EN, FN_MII_TX_EN, 0,
1462                 /* IP9_15_12 [4] */
1463                 FN_SD0_WP, FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
1464                 FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
1465                 FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, 0, 0, 0, 0, 0, 0, 0,
1466                 /* IP9_11_8 [4] */
1467                 FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
1468                 FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
1469                 FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, 0, 0, 0, 0, 0, 0, 0,
1470                 /* IP9_7_6 [2] */
1471                 FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, 0,
1472                 /* IP9_5_4 [2] */
1473                 FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B, 0,
1474                 /* IP9_3_2 [2] */
1475                 FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B, 0,
1476                 /* IP9_1_0 [2] */
1477                 FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B, 0, }
1478         },
1479         { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32,
1480                              2, 4, 3, 4, 4, 4, 4, 3, 4) {
1481                 /* IP10_31_30 [2] */
1482                 0, 0, 0, 0,
1483                 /* IP10_29_26 [4] */
1484                 FN_SD2_CD, FN_MMC0_D4, FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,
1485                 FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,
1486                 FN_GLO_I0_B, FN_VI3_DATA6_B, 0, 0, 0, 0, 0, 0,
1487                 /* IP10_25_23 [3] */
1488                 FN_SD2_DAT3, FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
1489                 FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, FN_VI3_DATA5_B,
1490                 /* IP10_22_19 [4] */
1491                 FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
1492                 FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
1493                 FN_GLO_Q0_B, FN_VI3_DATA4_B, 0, 0, 0, 0, 0, 0, 0,
1494                 /* IP10_18_15 [4] */
1495                 FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
1496                 FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
1497                 FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
1498                 0, 0, 0, 0, 0, 0,
1499                 /* IP10_14_11 [4] */
1500                 FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,
1501                 FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,
1502                 FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,
1503                 0, 0, 0, 0, 0, 0, 0,
1504                 /* IP10_10_7 [4] */
1505                 FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,
1506                 FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,
1507                 FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,
1508                 0, 0, 0, 0, 0, 0, 0,
1509                 /* IP10_6_4 [3] */
1510                 FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,
1511                 FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,
1512                 FN_VI3_DATA0_B, 0,
1513                 /* IP10_3_0 [4] */
1514                 FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
1515                 FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
1516                 FN_SIM0_D_B, 0, 0, 0, 0, 0, 0, 0, }
1517         },
1518         { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
1519                              2, 3, 3, 2, 4, 3, 2, 2, 2, 2, 2, 1, 4) {
1520                 /* IP11_31_30 [2] */
1521                 FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0,
1522                 /* IP11_29_27 [3] */
1523                 FN_MLB_DAT, FN_SPV_EVEN, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
1524                 FN_RDS_CLK_B, 0, 0,
1525                 /* IP11_26_24 [3] */
1526                 FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B, FN_SDA2_CIS_B,
1527                 0, 0, 0,
1528                 /* IP11_23_22 [2] */
1529                 FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B, 0,
1530                 /* IP11_21_18 [4] */
1531                 FN_SD3_WP, FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
1532                 FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
1533                 FN_RDS_DATA_E, 0, 0, 0, 0, 0, 0,
1534                 /* IP11_17_15 [3] */
1535                 FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
1536                 FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, 0, 0,
1537                 /* IP11_14_13 [2] */
1538                 FN_SD3_DAT3, FN_MMC1_D3, FN_SCKZ, 0,
1539                 /* IP11_12_11 [2] */
1540                 FN_SD3_DAT2, FN_MMC1_D2, FN_SDATA, 0,
1541                 /* IP11_10_9 [2] */
1542                 FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, 0,
1543                 /* IP11_8_7 [2] */
1544                 FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N, 0,
1545                 /* IP11_6_5 [2] */
1546                 FN_SD3_CMD, FN_MMC1_CMD, FN_MTS_N, 0,
1547                 /* IP11_4 [1] */
1548                 FN_SD3_CLK, FN_MMC1_CLK,
1549                 /* IP11_3_0 [4] */
1550                 FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,
1551                 FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,
1552                 FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B, 0, 0, 0, 0, 0, 0, }
1553         },
1554         { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
1555                              3, 2, 2, 3, 2, 1, 1, 1, 2, 1,
1556                              2, 1, 1, 1, 1, 2, 1, 1, 2, 1, 1) {
1557                 /* SEL_SCIF1 [3] */
1558                 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
1559                 FN_SEL_SCIF1_4, 0, 0, 0,
1560                 /* SEL_SCIFB [2] */
1561                 FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, 0,
1562                 /* SEL_SCIFB2 [2] */
1563                 FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, 0,
1564                 /* SEL_SCIFB1 [3] */
1565                 FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2,
1566                 FN_SEL_SCIFB1_3, FN_SEL_SCIFB1_4, FN_SEL_SCIFB1_5,
1567                 FN_SEL_SCIFB1_6, 0,
1568                 /* SEL_SCIFA1 [2] */
1569                 FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,
1570                 FN_SEL_SCIFA1_3,
1571                 /* SEL_SCIF0 [1] */
1572                 FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,
1573                 /* SEL_SCIFA [1] */
1574                 FN_SEL_SCFA_0, FN_SEL_SCFA_1,
1575                 /* SEL_SOF1 [1] */
1576                 FN_SEL_SOF1_0, FN_SEL_SOF1_1,
1577                 /* SEL_SSI7 [2] */
1578                 FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 0,
1579                 /* SEL_SSI6 [1] */
1580                 FN_SEL_SSI6_0, FN_SEL_SSI6_1,
1581                 /* SEL_SSI5 [2] */
1582                 FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2, 0,
1583                 /* SEL_VI3 [1] */
1584                 FN_SEL_VI3_0, FN_SEL_VI3_1,
1585                 /* SEL_VI2 [1] */
1586                 FN_SEL_VI2_0, FN_SEL_VI2_1,
1587                 /* SEL_VI1 [1] */
1588                 FN_SEL_VI1_0, FN_SEL_VI1_1,
1589                 /* SEL_VI0 [1] */
1590                 FN_SEL_VI0_0, FN_SEL_VI0_1,
1591                 /* SEL_TSIF1 [2] */
1592                 FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2, 0,
1593                 /* RESERVED [1] */
1594                 0, 0,
1595                 /* SEL_LBS [1] */
1596                 FN_SEL_LBS_0, FN_SEL_LBS_1,
1597                 /* SEL_TSIF0 [2] */
1598                 FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
1599                 /* SEL_SOF3 [1] */
1600                 FN_SEL_SOF3_0, FN_SEL_SOF3_1,
1601                 /* SEL_SOF0 [1] */
1602                 FN_SEL_SOF0_0, FN_SEL_SOF0_1, }
1603         },
1604         { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
1605                              2, 1, 1, 1, 1, 2, 1, 2, 1,
1606                              2, 1, 1, 1, 3, 3, 2, 3, 2, 2) {
1607                 /* RESEVED [2] */
1608                 0, 0, 0, 0, 0, 0, 0, 0,
1609                 /* RESEVED [1] */
1610                 0, 0,
1611                 /* SEL_TMU1 [1] */
1612                 FN_SEL_TMU1_0, FN_SEL_TMU1_1,
1613                 /* SEL_HSCIF1 [1] */
1614                 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
1615                 /* SEL_SCIFCLK [1] */
1616                 FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,
1617                 /* SEL_CAN0 [2] */
1618                 FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
1619                 /* SEL_CANCLK [1] */
1620                 FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
1621                 /* SEL_SCIFA2 [2] */
1622                 FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, 0,
1623                 /* SEL_CAN1 [1] */
1624                 FN_SEL_CAN1_0, FN_SEL_CAN1_1,
1625                 /* RESEVED [2] */
1626                 0, 0, 0, 0, 0, 0, 0, 0,
1627                 /* RESEVED [1] */
1628                 0, 0,
1629                 /* SEL_ADI [1] */
1630                 FN_SEL_ADI_0, FN_SEL_ADI_1,
1631                 /* SEL_SSP [1] */
1632                 FN_SEL_SSP_0, FN_SEL_SSP_1,
1633                 /* SEL_FM [3] */
1634                 FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
1635                 FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6, 0,
1636                 /* SEL_HSCIF0 [3] */
1637                 FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,
1638                 FN_SEL_HSCIF0_3, FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, 0, 0,
1639                 /* SEL_GPS [2] */
1640                 FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, 0,
1641                 /* SEL_RDS [3] */
1642                 FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
1643                 FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5, 0, 0,
1644                 /* SEL_SIM [2] */
1645                 FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, 0,
1646                 /* SEL_SSI8 [2] */
1647                 FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 0, }
1648         },
1649         { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
1650                              1, 1, 2, 4, 4, 2, 2,
1651                              4, 2, 3, 2, 3, 2) {
1652                 /* SEL_IICDVFS [1] */
1653                 FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
1654                 /* SEL_IIC0 [1] */
1655                 FN_SEL_IIC0_0, FN_SEL_IIC0_1,
1656                 /* RESEVED [2] */
1657                 0, 0, 0, 0,
1658                 /* RESEVED [4] */
1659                 0, 0, 0, 0, 0, 0, 0, 0,
1660                 0, 0, 0, 0, 0, 0, 0, 0,
1661                 /* RESEVED [4] */
1662                 0, 0, 0, 0, 0, 0, 0, 0,
1663                 0, 0, 0, 0, 0, 0, 0, 0,
1664                 /* RESEVED [2] */
1665                 0, 0, 0, 0,
1666                 /* SEL_IEB [2] */
1667                 FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
1668                 /* RESEVED [4] */
1669                 0, 0, 0, 0, 0, 0, 0, 0,
1670                 0, 0, 0, 0, 0, 0, 0, 0,
1671                 /* RESEVED [2] */
1672                 0, 0, 0, 0,
1673                 /* SEL_IIC2 [3] */
1674                 FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
1675                 FN_SEL_IIC2_4, 0, 0, 0,
1676                 /* SEL_IIC1 [2] */
1677                 FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 0,
1678                 /* SEL_I2C2 [3] */
1679                 FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
1680                 FN_SEL_I2C2_4, 0, 0, 0,
1681                 /* SEL_I2C1 [2] */
1682                 FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, }
1683         },
1684         { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
1685         { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
1686                 0, 0,
1687                 0, 0,
1688                 GP_1_29_IN, GP_1_29_OUT,
1689                 GP_1_28_IN, GP_1_28_OUT,
1690                 GP_1_27_IN, GP_1_27_OUT,
1691                 GP_1_26_IN, GP_1_26_OUT,
1692                 GP_1_25_IN, GP_1_25_OUT,
1693                 GP_1_24_IN, GP_1_24_OUT,
1694                 GP_1_23_IN, GP_1_23_OUT,
1695                 GP_1_22_IN, GP_1_22_OUT,
1696                 GP_1_21_IN, GP_1_21_OUT,
1697                 GP_1_20_IN, GP_1_20_OUT,
1698                 GP_1_19_IN, GP_1_19_OUT,
1699                 GP_1_18_IN, GP_1_18_OUT,
1700                 GP_1_17_IN, GP_1_17_OUT,
1701                 GP_1_16_IN, GP_1_16_OUT,
1702                 GP_1_15_IN, GP_1_15_OUT,
1703                 GP_1_14_IN, GP_1_14_OUT,
1704                 GP_1_13_IN, GP_1_13_OUT,
1705                 GP_1_12_IN, GP_1_12_OUT,
1706                 GP_1_11_IN, GP_1_11_OUT,
1707                 GP_1_10_IN, GP_1_10_OUT,
1708                 GP_1_9_IN, GP_1_9_OUT,
1709                 GP_1_8_IN, GP_1_8_OUT,
1710                 GP_1_7_IN, GP_1_7_OUT,
1711                 GP_1_6_IN, GP_1_6_OUT,
1712                 GP_1_5_IN, GP_1_5_OUT,
1713                 GP_1_4_IN, GP_1_4_OUT,
1714                 GP_1_3_IN, GP_1_3_OUT,
1715                 GP_1_2_IN, GP_1_2_OUT,
1716                 GP_1_1_IN, GP_1_1_OUT,
1717                 GP_1_0_IN, GP_1_0_OUT, }
1718         },
1719         { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
1720                 0, 0,
1721                 0, 0,
1722                 GP_2_29_IN, GP_2_29_OUT,
1723                 GP_2_28_IN, GP_2_28_OUT,
1724                 GP_2_27_IN, GP_2_27_OUT,
1725                 GP_2_26_IN, GP_2_26_OUT,
1726                 GP_2_25_IN, GP_2_25_OUT,
1727                 GP_2_24_IN, GP_2_24_OUT,
1728                 GP_2_23_IN, GP_2_23_OUT,
1729                 GP_2_22_IN, GP_2_22_OUT,
1730                 GP_2_21_IN, GP_2_21_OUT,
1731                 GP_2_20_IN, GP_2_20_OUT,
1732                 GP_2_19_IN, GP_2_19_OUT,
1733                 GP_2_18_IN, GP_2_18_OUT,
1734                 GP_2_17_IN, GP_2_17_OUT,
1735                 GP_2_16_IN, GP_2_16_OUT,
1736                 GP_2_15_IN, GP_2_15_OUT,
1737                 GP_2_14_IN, GP_2_14_OUT,
1738                 GP_2_13_IN, GP_2_13_OUT,
1739                 GP_2_12_IN, GP_2_12_OUT,
1740                 GP_2_11_IN, GP_2_11_OUT,
1741                 GP_2_10_IN, GP_2_10_OUT,
1742                 GP_2_9_IN, GP_2_9_OUT,
1743                 GP_2_8_IN, GP_2_8_OUT,
1744                 GP_2_7_IN, GP_2_7_OUT,
1745                 GP_2_6_IN, GP_2_6_OUT,
1746                 GP_2_5_IN, GP_2_5_OUT,
1747                 GP_2_4_IN, GP_2_4_OUT,
1748                 GP_2_3_IN, GP_2_3_OUT,
1749                 GP_2_2_IN, GP_2_2_OUT,
1750                 GP_2_1_IN, GP_2_1_OUT,
1751                 GP_2_0_IN, GP_2_0_OUT, }
1752         },
1753         { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
1754         { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
1755         { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
1756         { },
1757 };
1758
1759 static struct pinmux_data_reg pinmux_data_regs[] = {
1760         { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } },
1761         { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
1762                 0, 0, GP_1_29_DATA, GP_1_28_DATA,
1763                 GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
1764                 GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
1765                 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
1766                 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
1767                 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
1768                 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
1769                 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
1770         },
1771         { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
1772                 0, 0, GP_2_29_DATA, GP_2_28_DATA,
1773                 GP_2_27_DATA, GP_2_26_DATA, GP_2_25_DATA, GP_2_24_DATA,
1774                 GP_2_23_DATA, GP_2_22_DATA, GP_2_21_DATA, GP_2_20_DATA,
1775                 GP_2_19_DATA, GP_2_18_DATA, GP_2_17_DATA, GP_2_16_DATA,
1776                 GP_2_15_DATA, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
1777                 GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
1778                 GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
1779                 GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
1780         },
1781         { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } },
1782         { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } },
1783         { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } },
1784         { },
1785 };
1786
1787 static struct pinmux_info r8a7790_pinmux_info = {
1788         .name = "r8a7790_pfc",
1789
1790         .unlock_reg = 0xe6060000, /* PMMR */
1791
1792         .reserved_id = PINMUX_RESERVED,
1793         .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1794         .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1795         .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1796         .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1797         .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1798
1799         .first_gpio = GPIO_GP_0_0,
1800         .last_gpio = GPIO_FN_MOUT0,
1801
1802         .gpios = pinmux_gpios,
1803         .cfg_regs = pinmux_config_regs,
1804         .data_regs = pinmux_data_regs,
1805
1806         .gpio_data = pinmux_data,
1807         .gpio_data_size = ARRAY_SIZE(pinmux_data),
1808 };
1809
1810 void r8a7790_pinmux_init(void)
1811 {
1812         register_pinmux(&r8a7790_pinmux_info);
1813 }