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arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
[u-boot] / arch / arm / mach-socfpga / Makefile
1 # SPDX-License-Identifier: GPL-2.0+
2 #
3 # (C) Copyright 2000-2003
4 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 #
6 # Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
7
8 obj-y   += board.o
9 obj-y   += clock_manager.o
10 obj-y   += misc.o
11 obj-y   += reset_manager.o
12 obj-y   += timer.o
13
14 ifdef CONFIG_TARGET_SOCFPGA_GEN5
15 obj-y   += clock_manager_gen5.o
16 obj-y   += misc_gen5.o
17 obj-y   += reset_manager_gen5.o
18 obj-y   += scan_manager.o
19 obj-y   += system_manager_gen5.o
20 obj-y   += wrap_pll_config.o
21 obj-y   += fpga_manager.o
22 endif
23
24 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
25 obj-y   += clock_manager_arria10.o
26 obj-y   += misc_arria10.o
27 obj-y   += pinmux_arria10.o
28 obj-y   += reset_manager_arria10.o
29 endif
30
31 ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
32 obj-y   += clock_manager_s10.o
33 obj-y   += mailbox_s10.o
34 obj-y   += misc_s10.o
35 obj-y   += mmu-arm64_s10.o
36 obj-y   += reset_manager_s10.o
37 obj-y   += system_manager_s10.o
38 obj-y   += wrap_pinmux_config_s10.o
39 obj-y   += wrap_pll_config_s10.o
40 endif
41
42 ifdef CONFIG_SPL_BUILD
43 ifdef CONFIG_TARGET_SOCFPGA_GEN5
44 obj-y   += spl_gen5.o
45 obj-y   += freeze_controller.o
46 obj-y   += wrap_iocsr_config.o
47 obj-y   += wrap_pinmux_config.o
48 obj-y   += wrap_sdram_config.o
49 endif
50 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
51 obj-y   += spl_a10.o
52 endif
53 ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
54 obj-y   += spl_s10.o
55 endif
56 endif
57
58 ifdef CONFIG_TARGET_SOCFPGA_GEN5
59 # QTS-generated config file wrappers
60 CFLAGS_wrap_iocsr_config.o      += -I$(srctree)/board/$(BOARDDIR)
61 CFLAGS_wrap_pinmux_config.o     += -I$(srctree)/board/$(BOARDDIR)
62 CFLAGS_wrap_pll_config.o        += -I$(srctree)/board/$(BOARDDIR)
63 CFLAGS_wrap_sdram_config.o      += -I$(srctree)/board/$(BOARDDIR)
64 endif