git.sur5r.net Git - u-boot/blob - arch/arm/mach-socfpga/Makefile

   1 # SPDX-License-Identifier: GPL-2.0+
   2 #
   3 # (C) Copyright 2000-2003
   4 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5 #
   6 # Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
   7
   8 obj-y   += board.o
   9 obj-y   += clock_manager.o
  10 obj-y   += misc.o
  11 obj-y   += reset_manager.o
  12 obj-y   += timer.o
  13
  14 ifdef CONFIG_TARGET_SOCFPGA_GEN5
  15 obj-y   += clock_manager_gen5.o
  16 obj-y   += misc_gen5.o
  17 obj-y   += reset_manager_gen5.o
  18 obj-y   += scan_manager.o
  19 obj-y   += system_manager_gen5.o
  20 obj-y   += wrap_pll_config.o
  21 obj-y   += fpga_manager.o
  22 endif
  23
  24 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
  25 obj-y   += clock_manager_arria10.o
  26 obj-y   += misc_arria10.o
  27 obj-y   += pinmux_arria10.o
  28 obj-y   += reset_manager_arria10.o
  29 endif
  30
  31 ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
  32 obj-y   += clock_manager_s10.o
  33 obj-y   += misc_s10.o
  34 obj-y   += reset_manager_s10.o
  35 obj-y   += system_manager_s10.o
  36 obj-y   += wrap_pinmux_config_s10.o
  37 obj-y   += wrap_pll_config_s10.o
  38 endif
  39 ifdef CONFIG_SPL_BUILD
  40 obj-y   += spl.o
  41 ifdef CONFIG_TARGET_SOCFPGA_GEN5
  42 obj-y   += freeze_controller.o
  43 obj-y   += wrap_iocsr_config.o
  44 obj-y   += wrap_pinmux_config.o
  45 obj-y   += wrap_sdram_config.o
  46 endif
  47 endif
  48
  49 ifdef CONFIG_TARGET_SOCFPGA_GEN5
  50 # QTS-generated config file wrappers
  51 CFLAGS_wrap_iocsr_config.o      += -I$(srctree)/board/$(BOARDDIR)
  52 CFLAGS_wrap_pinmux_config.o     += -I$(srctree)/board/$(BOARDDIR)
  53 CFLAGS_wrap_pll_config.o        += -I$(srctree)/board/$(BOARDDIR)
  54 CFLAGS_wrap_sdram_config.o      += -I$(srctree)/board/$(BOARDDIR)
  55 endif