git.sur5r.net Git - u-boot/blob - arch/arm/mach-uniphier/clk/clk-dram-pro5.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015-2017 Socionext Inc.
   4  */
   5
   6 #include <linux/io.h>
   7
   8 #include "../init.h"
   9 #include "../sc-regs.h"
  10
  11 void uniphier_pro5_dram_clk_init(void)
  12 {
  13         u32 tmp;
  14
  15         /*
  16          * deassert reset
  17          * UMCA2: Ch1 (DDR3)
  18          * UMCA1, UMC31: Ch0 (WIO1)
  19          * UMCA0, UMC30: Ch0 (WIO0)
  20          */
  21         tmp = readl(SC_RSTCTRL4);
  22         tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 |
  23                SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
  24                SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30;
  25         writel(tmp, SC_RSTCTRL4);
  26         readl(SC_RSTCTRL4); /* dummy read */
  27
  28         /* provide clocks */
  29         tmp = readl(SC_CLKCTRL4);
  30         tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 |
  31                SC_CLKCTRL4_CEN_UMC0;
  32         writel(tmp, SC_CLKCTRL4);
  33         readl(SC_CLKCTRL4); /* dummy read */
  34 }