git.sur5r.net Git - u-boot/blob - arch/mips/dts/brcm,bcm6358.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
   4  */
   5
   6 #include <dt-bindings/clock/bcm6358-clock.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/reset/bcm6358-reset.h>
   9 #include "skeleton.dtsi"
  10
  11 / {
  12         compatible = "brcm,bcm6358";
  13
  14         aliases {
  15                 spi0 = &spi;
  16         };
  17
  18         cpus {
  19                 reg = <0xfffe0000 0x4>;
  20                 #address-cells = <1>;
  21                 #size-cells = <0>;
  22                 u-boot,dm-pre-reloc;
  23
  24                 cpu@0 {
  25                         compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
  26                         device_type = "cpu";
  27                         reg = <0>;
  28                         u-boot,dm-pre-reloc;
  29                 };
  30
  31                 cpu@1 {
  32                         compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
  33                         device_type = "cpu";
  34                         reg = <1>;
  35                         u-boot,dm-pre-reloc;
  36                 };
  37         };
  38
  39         clocks {
  40                 compatible = "simple-bus";
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43                 u-boot,dm-pre-reloc;
  44
  45                 periph_osc: periph-osc {
  46                         compatible = "fixed-clock";
  47                         #clock-cells = <0>;
  48                         clock-frequency = <50000000>;
  49                         u-boot,dm-pre-reloc;
  50                 };
  51
  52                 periph_clk: periph-clk {
  53                         compatible = "brcm,bcm6345-clk";
  54                         reg = <0xfffe0004 0x4>;
  55                         #clock-cells = <1>;
  56                 };
  57         };
  58
  59         pflash: nor@1e000000 {
  60                 compatible = "cfi-flash";
  61                 reg = <0x1e000000 0x2000000>;
  62                 bank-width = <2>;
  63                 #address-cells = <1>;
  64                 #size-cells = <1>;
  65
  66                 status = "disabled";
  67         };
  68
  69         ubus {
  70                 compatible = "simple-bus";
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73                 u-boot,dm-pre-reloc;
  74
  75                 pll_cntl: syscon@fffe0008 {
  76                         compatible = "syscon";
  77                         reg = <0xfffe0008 0x4>;
  78                 };
  79
  80                 syscon-reboot {
  81                         compatible = "syscon-reboot";
  82                         regmap = <&pll_cntl>;
  83                         offset = <0x0>;
  84                         mask = <0x1>;
  85                 };
  86
  87                 periph_rst: reset-controller@fffe0034 {
  88                         compatible = "brcm,bcm6345-reset";
  89                         reg = <0xfffe0034 0x4>;
  90                         #reset-cells = <1>;
  91                 };
  92
  93                 wdt: watchdog@fffe005c {
  94                         compatible = "brcm,bcm6345-wdt";
  95                         reg = <0xfffe005c 0xc>;
  96                         clocks = <&periph_osc>;
  97                 };
  98
  99                 wdt-reboot {
 100                         compatible = "wdt-reboot";
 101                         wdt = <&wdt>;
 102                 };
 103
 104                 gpio1: gpio-controller@fffe0080 {
 105                         compatible = "brcm,bcm6345-gpio";
 106                         reg = <0xfffe0080 0x4>, <0xfffe0088 0x4>;
 107                         gpio-controller;
 108                         #gpio-cells = <2>;
 109                         ngpios = <8>;
 110
 111                         status = "disabled";
 112                 };
 113
 114                 gpio0: gpio-controller@fffe0084 {
 115                         compatible = "brcm,bcm6345-gpio";
 116                         reg = <0xfffe0084 0x4>, <0xfffe008c 0x4>;
 117                         gpio-controller;
 118                         #gpio-cells = <2>;
 119
 120                         status = "disabled";
 121                 };
 122
 123                 leds: led-controller@fffe00d0 {
 124                         compatible = "brcm,bcm6358-leds";
 125                         reg = <0xfffe00d0 0x8>;
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128
 129                         status = "disabled";
 130                 };
 131
 132                 uart0: serial@fffe0100 {
 133                         compatible = "brcm,bcm6345-uart";
 134                         reg = <0xfffe0100 0x18>;
 135                         clocks = <&periph_osc>;
 136
 137                         status = "disabled";
 138                 };
 139
 140                 uart1: serial@fffe0120 {
 141                         compatible = "brcm,bcm6345-uart";
 142                         reg = <0xfffe0120 0x18>;
 143                         clocks = <&periph_osc>;
 144
 145                         status = "disabled";
 146                 };
 147
 148                 spi: spi@fffe0800 {
 149                         compatible = "brcm,bcm6358-spi";
 150                         reg = <0xfffe0800 0x70c>;
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153                         clocks = <&periph_clk BCM6358_CLK_SPI>;
 154                         resets = <&periph_rst BCM6358_RST_SPI>;
 155                         spi-max-frequency = <20000000>;
 156                         num-cs = <4>;
 157
 158                         status = "disabled";
 159                 };
 160
 161                 memory-controller@fffe1200 {
 162                         compatible = "brcm,bcm6358-mc";
 163                         reg = <0xfffe1200 0x4c>;
 164                         u-boot,dm-pre-reloc;
 165                 };
 166
 167                 ehci: usb-controller@fffe1300 {
 168                         compatible = "brcm,bcm6358-ehci", "generic-ehci";
 169                         reg = <0xfffe1300 0x100>;
 170                         phys = <&usbh>;
 171                         big-endian;
 172
 173                         status = "disabled";
 174                 };
 175
 176                 ohci: usb-controller@fffe1400 {
 177                         compatible = "brcm,bcm6358-ohci", "generic-ohci";
 178                         reg = <0xfffe1400 0x100>;
 179                         phys = <&usbh>;
 180                         big-endian;
 181
 182                         status = "disabled";
 183                 };
 184
 185                 usbh: usb-phy@fffe1500 {
 186                         compatible = "brcm,bcm6358-usbh";
 187                         reg = <0xfffe1500 0x28>;
 188                         #phy-cells = <0>;
 189                         resets = <&periph_rst BCM6358_RST_USBH>;
 190
 191                         status = "disabled";
 192                 };
 193         };
 194 };