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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2009-2013 Freescale Semiconductor, Inc.
4  */
5
6 #include <common.h>
7 #include <command.h>
8 #include <i2c.h>
9 #include <netdev.h>
10 #include <linux/compiler.h>
11 #include <asm/mmu.h>
12 #include <asm/processor.h>
13 #include <asm/immap_85xx.h>
14 #include <asm/fsl_law.h>
15 #include <asm/fsl_serdes.h>
16 #include <asm/fsl_liodn.h>
17 #include <fm_eth.h>
18 #include "t208xrdb.h"
19 #include "cpld.h"
20 #include "../common/vid.h"
21
22 DECLARE_GLOBAL_DATA_PTR;
23
24 int checkboard(void)
25 {
26         struct cpu_type *cpu = gd->arch.cpu;
27         static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"};
28
29         printf("Board: %sRDB, ", cpu->name);
30         printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ",
31                CPLD_READ(hw_ver), CPLD_READ(sw_ver));
32
33 #ifdef CONFIG_SDCARD
34         puts("SD/MMC\n");
35 #elif CONFIG_SPIFLASH
36         puts("SPI\n");
37 #else
38         u8 reg;
39
40         reg = CPLD_READ(flash_csr);
41
42         if (reg & CPLD_BOOT_SEL) {
43                 puts("NAND\n");
44         } else {
45                 reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
46                 printf("NOR vBank%d\n", reg);
47         }
48 #endif
49
50         puts("SERDES Reference Clocks:\n");
51         printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[2], freq[0]);
52         printf("SD2_CLK1=%s, SD2_CLK2=%s\n", freq[0], freq[0]);
53
54         return 0;
55 }
56
57 int board_early_init_r(void)
58 {
59         const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
60         int flash_esel = find_tlb_idx((void *)flashbase, 1);
61         /*
62          * Remap Boot flash + PROMJET region to caching-inhibited
63          * so that flash can be erased properly.
64          */
65
66         /* Flush d-cache and invalidate i-cache of any FLASH data */
67         flush_dcache();
68         invalidate_icache();
69         if (flash_esel == -1) {
70                 /* very unlikely unless something is messed up */
71                 puts("Error: Could not find TLB for FLASH BASE\n");
72                 flash_esel = 2; /* give our best effort to continue */
73         } else {
74                 /* invalidate existing TLB entry for flash + promjet */
75                 disable_tlb(flash_esel);
76         }
77
78         set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
79                 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
80                 0, flash_esel, BOOKE_PAGESZ_256M, 1);
81
82         /*
83          * Adjust core voltage according to voltage ID
84          * This function changes I2C mux to channel 2.
85          */
86         if (adjust_vdd(0))
87                 printf("Warning: Adjusting core voltage failed.\n");
88         return 0;
89 }
90
91 unsigned long get_board_sys_clk(void)
92 {
93         return CONFIG_SYS_CLK_FREQ;
94 }
95
96 unsigned long get_board_ddr_clk(void)
97 {
98         return CONFIG_DDR_CLK_FREQ;
99 }
100
101 int misc_init_r(void)
102 {
103         u8 reg;
104
105         /* Reset CS4315 PHY */
106         reg = CPLD_READ(reset_ctl);
107         reg |= CPLD_RSTCON_EDC_RST;
108         CPLD_WRITE(reset_ctl, reg);
109
110         return 0;
111 }
112
113 int ft_board_setup(void *blob, bd_t *bd)
114 {
115         phys_addr_t base;
116         phys_size_t size;
117
118         ft_cpu_setup(blob, bd);
119
120         base = env_get_bootm_low();
121         size = env_get_bootm_size();
122
123         fdt_fixup_memory(blob, (u64)base, (u64)size);
124
125 #ifdef CONFIG_PCI
126         pci_of_setup(blob, bd);
127 #endif
128
129         fdt_fixup_liodn(blob);
130         fsl_fdt_fixup_dr_usb(blob, bd);
131
132 #ifdef CONFIG_SYS_DPAA_FMAN
133         fdt_fixup_fman_ethernet(blob);
134         fdt_fixup_board_enet(blob);
135 #endif
136
137         return 0;
138 }