2 * armboot - Startup Code for ARM720 CPU-core
4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 *************************************************************************
34 * Jump vector table as in table 3.1 in [1]
36 *************************************************************************
42 ldr pc, _undefined_instruction
43 ldr pc, _software_interrupt
44 ldr pc, _prefetch_abort
50 _undefined_instruction: .word undefined_instruction
51 _software_interrupt: .word software_interrupt
52 _prefetch_abort: .word prefetch_abort
53 _data_abort: .word data_abort
54 _not_used: .word not_used
58 .balignl 16,0xdeadbeef
62 *************************************************************************
64 * Startup Code (reset vector)
66 * do important init only if we don't start from memory!
67 * relocate armboot to ram
69 * jump to second stage
71 *************************************************************************
82 * These are defined in the board-specific linker script.
93 /* IRQ stack memory (calculated at run-time) */
94 .globl IRQ_STACK_START
98 /* IRQ stack memory (calculated at run-time) */
99 .globl FIQ_STACK_START
106 * the actual reset code
111 * set the cpu to SVC32 mode
115 orr r0,r0,#0xd3 /* was 13 */
118 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
120 /**** ldr r1, =0x00204000 ****/
121 /* Insure word alignment */
122 /**** bic r1, r1, #3 ****/
124 /**** mov sp, r1 ****/
126 * This does a lot more than just set up the memory, which
127 * is why it's called lowlevel_init
129 bl lowlevel_init /* in lowlevel.S */
132 * Read/modify/write CP15 control register
133 * disable MMU, enable I-Cache, select Asychronous Clocking Mode
136 mrc p15, 0, r0, c1, c0, 0 @ read cp15 control register (cp15 r1) in r0
137 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
138 bic r0, r0, #0x0000008f @ clear bits 7, 3:0 (B--- WCAM)
139 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
140 orr r0, r0, #0x00000004 @ set bit 3 (C) D-Cache
141 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
142 orr r0, r0, #0xC0000000 @ set bits 31:30 (iA, nF)
143 mcr p15, 0, r0, c1, c0, 0 @ write r0 in cp15 control register (cp15 r1)
144 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
146 * relocate exeception table
158 * we do sys-critical inits only at reboot,
159 * not when booting from ram!
161 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
163 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
165 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
166 relocate: /* relocate U-Boot to RAM */
167 adr r0, _start /* r0 <- current position of code */
168 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
169 cmp r0, r1 /* don't reloc during debug */
172 ldr r2, _armboot_start
174 sub r2, r3, r2 /* r2 <- size of armboot */
175 add r2, r0, r2 /* r2 <- source end address */
178 ldmia r0!, {r3-r10} /* copy from source address [r0] */
179 stmia r1!, {r3-r10} /* copy to target address [r1] */
180 cmp r0, r2 /* until source end addreee [r2] */
182 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
184 /* Set up the stack */
186 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
187 sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
188 sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
189 #ifdef CONFIG_USE_IRQ
190 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
192 sub sp, r0, #12 /* leave 3 words for abort-stack */
195 ldr r0, _bss_start /* find start of bss segment */
196 ldr r1, _bss_end /* stop here */
197 mov r2, #0x00000000 /* clear */
199 clbss_l:str r2, [r0] /* clear loop... */
204 ldr pc,_start_armboot
206 _start_armboot: .word start_armboot
209 *************************************************************************
211 * CPU_init_critical registers
213 *************************************************************************
217 /* do nothing for now */
222 *************************************************************************
226 *************************************************************************
232 #define S_FRAME_SIZE 72
254 #define MODE_SVC 0x13
258 * use bad_save_user_regs for abort/prefetch/undef/swi ...
259 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
262 .macro bad_save_user_regs
263 sub sp, sp, #S_FRAME_SIZE
264 stmia sp, {r0 - r12} @ Calling r0-r12
267 ldr r2, _armboot_start
268 sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
269 sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
270 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
271 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
275 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
279 .macro irq_save_user_regs
280 sub sp, sp, #S_FRAME_SIZE
281 stmia sp, {r0 - r12} @ Calling r0-r12
283 stmdb r8, {sp, lr}^ @ Calling SP, LR
284 str lr, [r8, #0] @ Save calling PC
286 str r6, [r8, #4] @ Save CPSR
287 str r0, [r8, #8] @ Save OLD_R0
291 .macro irq_restore_user_regs
292 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
294 ldr lr, [sp, #S_PC] @ Get PC
295 add sp, sp, #S_FRAME_SIZE
296 subs pc, lr, #4 @ return & move spsr_svc into cpsr
300 ldr r13, _armboot_start @ setup our mode stack
301 sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
302 sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
304 str lr, [r13] @ save caller lr / spsr
308 mov r13, #MODE_SVC @ prepare SVC-Mode
314 .macro get_irq_stack @ setup IRQ stack
315 ldr sp, IRQ_STACK_START
318 .macro get_fiq_stack @ setup FIQ stack
319 ldr sp, FIQ_STACK_START
326 undefined_instruction:
329 bl do_undefined_instruction
335 bl do_software_interrupt
355 #ifdef CONFIG_USE_IRQ
362 irq_restore_user_regs
367 /* someone ought to write a more effiction fiq_save_user_regs */
370 irq_restore_user_regs