git.sur5r.net Git - u-boot/blob - cpu/mpc83xx/fdt.c

   1 /*
   2  * Copyright 2007 Freescale Semiconductor, Inc.
   3  *
   4  * (C) Copyright 2000
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #include <common.h>
  27 #include <libfdt.h>
  28 #include <fdt_support.h>
  29
  30 extern void ft_qe_setup(void *blob);
  31
  32 DECLARE_GLOBAL_DATA_PTR;
  33
  34 void ft_cpu_setup(void *blob, bd_t *bd)
  35 {
  36 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
  37     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
  38         fdt_fixup_ethernet(blob, bd);
  39 #endif
  40
  41         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  42                 "timebase-frequency", (bd->bi_busfreq / 4), 1);
  43         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  44                 "bus-frequency", bd->bi_busfreq, 1);
  45         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  46                 "clock-frequency", gd->core_clk, 1);
  47         do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
  48                 "bus-frequency", bd->bi_busfreq, 1);
  49         do_fixup_by_compat_u32(blob, "fsl,soc",
  50                 "bus-frequency", bd->bi_busfreq, 1);
  51         do_fixup_by_compat_u32(blob, "fsl,soc",
  52                 "clock-frequency", bd->bi_busfreq, 1);
  53         do_fixup_by_compat_u32(blob, "fsl,immr",
  54                 "bus-frequency", bd->bi_busfreq, 1);
  55         do_fixup_by_compat_u32(blob, "fsl,immr",
  56                 "clock-frequency", bd->bi_busfreq, 1);
  57 #ifdef CONFIG_QE
  58         ft_qe_setup(blob);
  59 #endif
  60
  61 #ifdef CFG_NS16550
  62         do_fixup_by_compat_u32(blob, "ns16550",
  63                 "clock-frequency", bd->bi_busfreq, 1);
  64 #endif
  65
  66 #ifdef CONFIG_CPM2
  67         do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
  68                 "current-speed", bd->bi_baudrate, 1);
  69
  70         do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
  71                 "clock-frequency", bd->bi_brgfreq, 1);
  72 #endif
  73
  74         fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
  75 }