git.sur5r.net Git - u-boot/blob - drivers/cpu/bmips_cpu.c

   1 /*
   2  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
   3  *
   4  * Derived from linux/arch/mips/bcm63xx/cpu.c:
   5  *      Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
   6  *      Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <cpu.h>
  13 #include <dm.h>
  14 #include <errno.h>
  15 #include <asm/io.h>
  16
  17 DECLARE_GLOBAL_DATA_PTR;
  18
  19 #define REV_CHIPID_SHIFT                16
  20 #define REV_CHIPID_MASK                 (0xffff << REV_CHIPID_SHIFT)
  21 #define REV_LONG_CHIPID_SHIFT           12
  22 #define REV_LONG_CHIPID_MASK            (0xfffff << REV_LONG_CHIPID_SHIFT)
  23 #define REV_REVID_SHIFT                 0
  24 #define REV_REVID_MASK                  (0xff << REV_REVID_SHIFT)
  25
  26 #define REG_BCM6328_OTP                 0x62c
  27 #define BCM6328_TP1_DISABLED            BIT(9)
  28
  29 #define REG_BCM6328_MISC_STRAPBUS       0x1a40
  30 #define STRAPBUS_6328_FCVO_SHIFT        7
  31 #define STRAPBUS_6328_FCVO_MASK         (0x1f << STRAPBUS_6328_FCVO_SHIFT)
  32
  33 #define REG_BCM6358_DDR_DMIPSPLLCFG     0x12b8
  34 #define DMIPSPLLCFG_6358_M1_SHIFT       0
  35 #define DMIPSPLLCFG_6358_M1_MASK        (0xff << DMIPSPLLCFG_6358_M1_SHIFT)
  36 #define DMIPSPLLCFG_6358_N1_SHIFT       23
  37 #define DMIPSPLLCFG_6358_N1_MASK        (0x3f << DMIPSPLLCFG_6358_N1_SHIFT)
  38 #define DMIPSPLLCFG_6358_N2_SHIFT       29
  39 #define DMIPSPLLCFG_6358_N2_MASK        (0x7 << DMIPSPLLCFG_6358_N2_SHIFT)
  40
  41 #define REG_BCM63268_MISC_STRAPBUS      0x1814
  42 #define STRAPBUS_63268_FCVO_SHIFT       21
  43 #define STRAPBUS_63268_FCVO_MASK        (0xf << STRAPBUS_63268_FCVO_SHIFT)
  44
  45 struct bmips_cpu_priv;
  46
  47 struct bmips_cpu_hw {
  48         int (*get_cpu_desc)(struct bmips_cpu_priv *priv, char *buf, int size);
  49         ulong (*get_cpu_freq)(struct bmips_cpu_priv *);
  50         int (*get_cpu_count)(struct bmips_cpu_priv *);
  51 };
  52
  53 struct bmips_cpu_priv {
  54         void __iomem *regs;
  55         const struct bmips_cpu_hw *hw;
  56 };
  57
  58 /* Specific CPU Ops */
  59 static int bcm6358_get_cpu_desc(struct bmips_cpu_priv *priv, char *buf,
  60                                 int size)
  61 {
  62         unsigned short cpu_id;
  63         unsigned char cpu_rev;
  64         u32 val;
  65
  66         val = readl_be(priv->regs);
  67         cpu_id = (val & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
  68         cpu_rev = (val & REV_REVID_MASK) >> REV_REVID_SHIFT;
  69
  70         snprintf(buf, size, "BCM%04X%02X", cpu_id, cpu_rev);
  71
  72         return 0;
  73 }
  74
  75 static int bcm6328_get_cpu_desc(struct bmips_cpu_priv *priv, char *buf,
  76                                 int size)
  77 {
  78         unsigned int cpu_id;
  79         unsigned char cpu_rev;
  80         u32 val;
  81
  82         val = readl_be(priv->regs);
  83         cpu_id = (val & REV_LONG_CHIPID_MASK) >> REV_LONG_CHIPID_SHIFT;
  84         cpu_rev = (val & REV_REVID_MASK) >> REV_REVID_SHIFT;
  85
  86         snprintf(buf, size, "BCM%05X%02X", cpu_id, cpu_rev);
  87
  88         return 0;
  89 }
  90
  91 static ulong bcm6328_get_cpu_freq(struct bmips_cpu_priv *priv)
  92 {
  93         unsigned int mips_pll_fcvo;
  94
  95         mips_pll_fcvo = readl_be(priv->regs + REG_BCM6328_MISC_STRAPBUS);
  96         mips_pll_fcvo = (mips_pll_fcvo & STRAPBUS_6328_FCVO_MASK)
  97                         >> STRAPBUS_6328_FCVO_SHIFT;
  98
  99         switch (mips_pll_fcvo) {
 100         case 0x12:
 101         case 0x14:
 102         case 0x19:
 103                 return 160000000;
 104         case 0x1c:
 105                 return 192000000;
 106         case 0x13:
 107         case 0x15:
 108                 return 200000000;
 109         case 0x1a:
 110                 return 384000000;
 111         case 0x16:
 112                 return 400000000;
 113         default:
 114                 return 320000000;
 115         }
 116 }
 117
 118 static ulong bcm6358_get_cpu_freq(struct bmips_cpu_priv *priv)
 119 {
 120         unsigned int tmp, n1, n2, m1;
 121
 122         tmp = readl_be(priv->regs + REG_BCM6358_DDR_DMIPSPLLCFG);
 123         n1 = (tmp & DMIPSPLLCFG_6358_N1_MASK) >> DMIPSPLLCFG_6358_N1_SHIFT;
 124         n2 = (tmp & DMIPSPLLCFG_6358_N2_MASK) >> DMIPSPLLCFG_6358_N2_SHIFT;
 125         m1 = (tmp & DMIPSPLLCFG_6358_M1_MASK) >> DMIPSPLLCFG_6358_M1_SHIFT;
 126
 127         return (16 * 1000000 * n1 * n2) / m1;
 128 }
 129
 130 static ulong bcm63268_get_cpu_freq(struct bmips_cpu_priv *priv)
 131 {
 132         unsigned int mips_pll_fcvo;
 133
 134         mips_pll_fcvo = readl_be(priv->regs + REG_BCM63268_MISC_STRAPBUS);
 135         mips_pll_fcvo = (mips_pll_fcvo & STRAPBUS_63268_FCVO_MASK)
 136                         >> STRAPBUS_63268_FCVO_SHIFT;
 137
 138         switch (mips_pll_fcvo) {
 139         case 0x3:
 140         case 0xe:
 141                 return 320000000;
 142         case 0xa:
 143                 return 333000000;
 144         case 0x2:
 145         case 0xb:
 146         case 0xf:
 147                 return 400000000;
 148         default:
 149                 return 0;
 150         }
 151 }
 152
 153 static int bcm6328_get_cpu_count(struct bmips_cpu_priv *priv)
 154 {
 155         u32 val = readl_be(priv->regs + REG_BCM6328_OTP);
 156
 157         if (val & BCM6328_TP1_DISABLED)
 158                 return 1;
 159         else
 160                 return 2;
 161 }
 162
 163 static int bcm6358_get_cpu_count(struct bmips_cpu_priv *priv)
 164 {
 165         return 2;
 166 }
 167
 168 static const struct bmips_cpu_hw bmips_cpu_bcm6328 = {
 169         .get_cpu_desc = bcm6328_get_cpu_desc,
 170         .get_cpu_freq = bcm6328_get_cpu_freq,
 171         .get_cpu_count = bcm6328_get_cpu_count,
 172 };
 173
 174 static const struct bmips_cpu_hw bmips_cpu_bcm6358 = {
 175         .get_cpu_desc = bcm6358_get_cpu_desc,
 176         .get_cpu_freq = bcm6358_get_cpu_freq,
 177         .get_cpu_count = bcm6358_get_cpu_count,
 178 };
 179
 180 static const struct bmips_cpu_hw bmips_cpu_bcm63268 = {
 181         .get_cpu_desc = bcm6328_get_cpu_desc,
 182         .get_cpu_freq = bcm63268_get_cpu_freq,
 183         .get_cpu_count = bcm6358_get_cpu_count,
 184 };
 185
 186 /* Generic CPU Ops */
 187 static int bmips_cpu_get_desc(struct udevice *dev, char *buf, int size)
 188 {
 189         struct bmips_cpu_priv *priv = dev_get_priv(dev);
 190         const struct bmips_cpu_hw *hw = priv->hw;
 191
 192         return hw->get_cpu_desc(priv, buf, size);
 193 }
 194
 195 static int bmips_cpu_get_info(struct udevice *dev, struct cpu_info *info)
 196 {
 197         struct bmips_cpu_priv *priv = dev_get_priv(dev);
 198         const struct bmips_cpu_hw *hw = priv->hw;
 199
 200         info->cpu_freq = hw->get_cpu_freq(priv);
 201         info->features = BIT(CPU_FEAT_L1_CACHE);
 202         info->features |= BIT(CPU_FEAT_MMU);
 203         info->features |= BIT(CPU_FEAT_DEVICE_ID);
 204
 205         return 0;
 206 }
 207
 208 static int bmips_cpu_get_count(struct udevice *dev)
 209 {
 210         struct bmips_cpu_priv *priv = dev_get_priv(dev);
 211         const struct bmips_cpu_hw *hw = priv->hw;
 212
 213         return hw->get_cpu_count(priv);
 214 }
 215
 216 static int bmips_cpu_get_vendor(struct udevice *dev, char *buf, int size)
 217 {
 218         snprintf(buf, size, "Broadcom");
 219
 220         return 0;
 221 }
 222
 223 static const struct cpu_ops bmips_cpu_ops = {
 224         .get_desc = bmips_cpu_get_desc,
 225         .get_info = bmips_cpu_get_info,
 226         .get_count = bmips_cpu_get_count,
 227         .get_vendor = bmips_cpu_get_vendor,
 228 };
 229
 230 /* BMIPS CPU driver */
 231 int bmips_cpu_bind(struct udevice *dev)
 232 {
 233         struct cpu_platdata *plat = dev_get_parent_platdata(dev);
 234
 235         plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 236                 "reg", -1);
 237         plat->device_id = read_c0_prid();
 238
 239         return 0;
 240 }
 241
 242 int bmips_cpu_probe(struct udevice *dev)
 243 {
 244         struct bmips_cpu_priv *priv = dev_get_priv(dev);
 245         const struct bmips_cpu_hw *hw =
 246                 (const struct bmips_cpu_hw *)dev_get_driver_data(dev);
 247         fdt_addr_t addr;
 248         fdt_size_t size;
 249
 250         addr = dev_get_addr_size_index(dev_get_parent(dev), 0, &size);
 251         if (addr == FDT_ADDR_T_NONE)
 252                 return -EINVAL;
 253
 254         priv->regs = ioremap(addr, size);
 255         priv->hw = hw;
 256
 257         return 0;
 258 }
 259
 260 static const struct udevice_id bmips_cpu_ids[] = {
 261         {
 262                 .compatible = "brcm,bcm6328-cpu",
 263                 .data = (ulong)&bmips_cpu_bcm6328,
 264         }, {
 265                 .compatible = "brcm,bcm6358-cpu",
 266                 .data = (ulong)&bmips_cpu_bcm6358,
 267         }, {
 268                 .compatible = "brcm,bcm63268-cpu",
 269                 .data = (ulong)&bmips_cpu_bcm63268,
 270         },
 271         { /* sentinel */ }
 272 };
 273
 274 U_BOOT_DRIVER(bmips_cpu_drv) = {
 275         .name = "bmips_cpu",
 276         .id = UCLASS_CPU,
 277         .of_match = bmips_cpu_ids,
 278         .bind = bmips_cpu_bind,
 279         .probe = bmips_cpu_probe,
 280         .priv_auto_alloc_size = sizeof(struct bmips_cpu_priv),
 281         .ops = &bmips_cpu_ops,
 282         .flags = DM_FLAG_PRE_RELOC,
 283 };
 284
 285 #ifdef CONFIG_DISPLAY_CPUINFO
 286 int print_cpuinfo(void)
 287 {
 288         struct cpu_info cpu;
 289         struct udevice *dev;
 290         int err;
 291         char desc[100];
 292
 293         err = uclass_get_device(UCLASS_CPU, 0, &dev);
 294         if (err)
 295                 return 0;
 296
 297         err = cpu_get_info(dev, &cpu);
 298         if (err)
 299                 return 0;
 300
 301         err = cpu_get_desc(dev, desc, sizeof(desc));
 302         if (err)
 303                 return 0;
 304
 305         printf("Chip ID: %s, MIPS: ", desc);
 306         print_freq(cpu.cpu_freq, "\n");
 307
 308         return 0;
 309 }
 310 #endif