git.sur5r.net Git - u-boot/blob - drivers/ddr/fsl/Makefile

   1 #
   2 # Copyright 2008-2014 Freescale Semiconductor, Inc.
   3 #
   4 # SPDX-License-Identifier:      GPL-2.0
   5 #
   6
   7 obj-$(CONFIG_SYS_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \
   8                                 lc_common_dimm_params.o
   9 obj-$(CONFIG_SYS_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \
  10                                 lc_common_dimm_params.o
  11 obj-$(CONFIG_SYS_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \
  12                                 lc_common_dimm_params.o
  13 obj-$(CONFIG_SYS_FSL_DDR4) += main.o util.o ctrl_regs.o options.o \
  14                                 lc_common_dimm_params.o
  15
  16 ifdef CONFIG_DDR_SPD
  17 SPD := y
  18 endif
  19 ifdef CONFIG_SPD_EEPROM
  20 SPD := y
  21 endif
  22 ifdef SPD
  23 obj-$(CONFIG_SYS_FSL_DDR1)      += ddr1_dimm_params.o
  24 obj-$(CONFIG_SYS_FSL_DDR2)      += ddr2_dimm_params.o
  25 obj-$(CONFIG_SYS_FSL_DDR3)      += ddr3_dimm_params.o
  26 obj-$(CONFIG_SYS_FSL_DDR4)      += ddr4_dimm_params.o
  27 endif
  28
  29 obj-$(CONFIG_FSL_DDR_INTERACTIVE)       += interactive.o
  30 obj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o
  31 obj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o
  32 obj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o
  33 obj-$(CONFIG_SYS_FSL_DDR_86XX)          += mpc86xx_ddr.o
  34 obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3)     += arm_ddr_gen3.o
  35 obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o