git.sur5r.net Git - u-boot/blob - include/configs/UCP1020.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2013-2015 Arcturus Networks, Inc.
   4  *           http://www.arcturusnetworks.com/products/ucp1020/
   5  * based on include/configs/p1_p2_rdb_pc.h
   6  * original copyright follows:
   7  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   8  */
   9
  10 /*
  11  * QorIQ uCP1020-xx boards configuration file
  12  */
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  17 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  18 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  19 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  20 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  21 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  22
  23 #if defined(CONFIG_TARTGET_UCP1020T1)
  24
  25 #define CONFIG_UCP1020_REV_1_3
  26
  27 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  28
  29 #define CONFIG_TSEC1
  30 #define CONFIG_TSEC3
  31 #define CONFIG_HAS_ETH0
  32 #define CONFIG_HAS_ETH1
  33 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  34 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  35 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  36 #define CONFIG_IPADDR           10.80.41.229
  37 #define CONFIG_SERVERIP         10.80.41.227
  38 #define CONFIG_NETMASK          255.255.252.0
  39 #define CONFIG_ETHPRIME         "eTSEC3"
  40
  41 #ifndef CONFIG_SPI_FLASH
  42 #endif
  43 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  44
  45 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  46
  47 #endif
  48
  49 #if defined(CONFIG_TARGET_UCP1020)
  50
  51 #define CONFIG_UCP1020
  52 #define CONFIG_UCP1020_REV_1_3
  53
  54 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  55
  56 #define CONFIG_TSEC1
  57 #define CONFIG_TSEC2
  58 #define CONFIG_TSEC3
  59 #define CONFIG_HAS_ETH0
  60 #define CONFIG_HAS_ETH1
  61 #define CONFIG_HAS_ETH2
  62 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  63 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  64 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  65 #define CONFIG_IPADDR           192.168.1.81
  66 #define CONFIG_IPADDR1          192.168.1.82
  67 #define CONFIG_IPADDR2          192.168.1.83
  68 #define CONFIG_SERVERIP         192.168.1.80
  69 #define CONFIG_GATEWAYIP        102.168.1.1
  70 #define CONFIG_NETMASK          255.255.255.0
  71 #define CONFIG_ETHPRIME         "eTSEC1"
  72
  73 #ifndef CONFIG_SPI_FLASH
  74 #endif
  75 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  76
  77 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  78
  79 #endif
  80
  81 #ifdef CONFIG_SDCARD
  82 #define CONFIG_RAMBOOT_SDCARD
  83 #define CONFIG_SYS_RAMBOOT
  84 #define CONFIG_SYS_EXTRA_ENV_RELOC
  85 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  86 #endif
  87
  88 #ifdef CONFIG_SPIFLASH
  89 #define CONFIG_RAMBOOT_SPIFLASH
  90 #define CONFIG_SYS_RAMBOOT
  91 #define CONFIG_SYS_EXTRA_ENV_RELOC
  92 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  93 #endif
  94
  95 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
  96
  97 #ifndef CONFIG_RESET_VECTOR_ADDRESS
  98 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
  99 #endif
 100
 101 #ifndef CONFIG_SYS_MONITOR_BASE
 102 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 103 #endif
 104
 105 #define CONFIG_MP
 106
 107 #define CONFIG_ENV_OVERWRITE
 108
 109 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 110 #define CONFIG_LBA48
 111
 112 #define CONFIG_SYS_CLK_FREQ     66666666
 113 #define CONFIG_DDR_CLK_FREQ     66666666
 114
 115 #define CONFIG_HWCONFIG
 116
 117 /*
 118  * These can be toggled for performance analysis, otherwise use default.
 119  */
 120 #define CONFIG_L2_CACHE
 121 #define CONFIG_BTB
 122
 123 #define CONFIG_ENABLE_36BIT_PHYS
 124
 125 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 126 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 127
 128 #define CONFIG_SYS_CCSRBAR              0xffe00000
 129 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 130
 131 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 132        SPL code*/
 133 #ifdef CONFIG_SPL_BUILD
 134 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 135 #endif
 136
 137 /* DDR Setup */
 138 #define CONFIG_DDR_ECC_ENABLE
 139 #ifndef CONFIG_DDR_ECC_ENABLE
 140 #define CONFIG_SYS_DDR_RAW_TIMING
 141 #define CONFIG_DDR_SPD
 142 #endif
 143 #define CONFIG_SYS_SPD_BUS_NUM 1
 144 #undef CONFIG_FSL_DDR_INTERACTIVE
 145
 146 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 147 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 148 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 149 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 150 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 151
 152 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 153
 154 /* Default settings for DDR3 */
 155 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 156 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 157 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 158 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 159 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 160 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 161
 162 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 163 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 164 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 165 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 166
 167 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 168 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 169 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 170 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 171 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 172 #ifdef CONFIG_DDR_ECC_ENABLE
 173 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 174 #else
 175 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 176 #endif
 177 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 178 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 179 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 180
 181 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 182 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 183 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 184 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 185 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 186 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 187 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 188 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 189
 190 #undef CONFIG_CLOCKS_IN_MHZ
 191
 192 /*
 193  * Memory map
 194  *
 195  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 196  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 197  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 198  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 199  *   (early boot only)
 200  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 201  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 202  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 203  */
 204
 205 /*
 206  * Local Bus Definitions
 207  */
 208 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 209 #define CONFIG_SYS_FLASH_BASE           0xec000000
 210
 211 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 212
 213 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 214         | BR_PS_16 | BR_V)
 215
 216 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 217
 218 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 219 #define CONFIG_SYS_FLASH_QUIET_TEST
 220 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 221
 222 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 223
 224 #undef CONFIG_SYS_FLASH_CHECKSUM
 225 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 226 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 227
 228 #define CONFIG_FLASH_CFI_DRIVER
 229 #define CONFIG_SYS_FLASH_CFI
 230 #define CONFIG_SYS_FLASH_EMPTY_INFO
 231 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 232
 233 #define CONFIG_SYS_INIT_RAM_LOCK
 234 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 235 /* Initial L1 address */
 236 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 237 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 238 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 239 /* Size of used area in RAM */
 240 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 241
 242 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 243                                         GENERATED_GBL_DATA_SIZE)
 244 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 245
 246 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 247 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 248
 249 #define CONFIG_SYS_PMC_BASE     0xff980000
 250 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 251 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 252                                         BR_PS_8 | BR_V)
 253 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 254                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 255                                  OR_GPCM_EAD)
 256
 257 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 258 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 259 #ifdef CONFIG_NAND_FSL_ELBC
 260 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 261 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 262 #endif
 263
 264 /* Serial Port - controlled on board with jumper J8
 265  * open - index 2
 266  * shorted - index 1
 267  */
 268 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 269 #define CONFIG_SYS_NS16550_SERIAL
 270 #define CONFIG_SYS_NS16550_REG_SIZE     1
 271 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 272 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 273 #define CONFIG_NS16550_MIN_FUNCTIONS
 274 #endif
 275
 276 #define CONFIG_SYS_BAUDRATE_TABLE       \
 277         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 278
 279 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 280 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 281
 282 /* I2C */
 283 #define CONFIG_SYS_I2C
 284 #define CONFIG_SYS_I2C_FSL
 285 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 286 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 287 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 288 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 289 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 290 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 291 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 292 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 293
 294 #define CONFIG_RTC_DS1337
 295 #define CONFIG_RTC_DS1337_NOOSC
 296 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 297 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 298 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 299 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 300
 301 /*
 302  * eSPI - Enhanced SPI
 303  */
 304 #define CONFIG_HARD_SPI
 305
 306 #define CONFIG_SF_DEFAULT_SPEED         10000000
 307 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 308
 309 #if defined(CONFIG_PCI)
 310 /*
 311  * General PCI
 312  * Memory space is mapped 1-1, but I/O space must start from 0.
 313  */
 314
 315 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 316 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 317 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 318 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 319 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 320 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 321 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 322 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 323 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 324 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 325
 326 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 327 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 328 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 329 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 330 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 331 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 332 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 333 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 334 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 335 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 336
 337 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 338 #endif /* CONFIG_PCI */
 339
 340 /*
 341  * Environment
 342  */
 343 #ifdef CONFIG_ENV_FIT_UCBOOT
 344
 345 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 346 #define CONFIG_ENV_SIZE         0x20000
 347 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 348
 349 #else
 350
 351 #define CONFIG_ENV_SPI_BUS      0
 352 #define CONFIG_ENV_SPI_CS       0
 353 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 354 #define CONFIG_ENV_SPI_MODE     0
 355
 356 #ifdef CONFIG_RAMBOOT_SPIFLASH
 357
 358 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 359 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 360 #define CONFIG_ENV_SECT_SIZE    0x1000
 361
 362 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 363 /* Address and size of Redundant Environment Sector     */
 364 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 365 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 366 #endif
 367
 368 #elif defined(CONFIG_RAMBOOT_SDCARD)
 369 #define CONFIG_FSL_FIXED_MMC_LOCATION
 370 #define CONFIG_ENV_SIZE         0x2000
 371 #define CONFIG_SYS_MMC_ENV_DEV  0
 372
 373 #elif defined(CONFIG_SYS_RAMBOOT)
 374 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 375 #define CONFIG_ENV_SIZE         0x2000
 376
 377 #else
 378 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 379 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 380 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 381 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 382 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 383 /* Address and size of Redundant Environment Sector     */
 384 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 385 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 386 #endif
 387
 388 #endif
 389
 390 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 391
 392 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 393 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 394
 395 /*
 396  * USB
 397  */
 398 #define CONFIG_HAS_FSL_DR_USB
 399
 400 #if defined(CONFIG_HAS_FSL_DR_USB)
 401 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 402
 403 #ifdef CONFIG_USB_EHCI_HCD
 404 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 405 #define CONFIG_USB_EHCI_FSL
 406 #endif
 407 #endif
 408
 409 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 410
 411 #ifdef CONFIG_MMC
 412 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 413 #define CONFIG_MMC_SPI
 414 #endif
 415
 416 /* Misc Extra Settings */
 417 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 418
 419 /*
 420  * Miscellaneous configurable options
 421  */
 422 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 423 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 424
 425 /*
 426  * For booting Linux, the board info and command line data
 427  * have to be in the first 64 MB of memory, since this is
 428  * the maximum mapped by the Linux kernel during initialization.
 429  */
 430 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 431 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 432
 433 #if defined(CONFIG_CMD_KGDB)
 434 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 435 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 436 #endif
 437
 438 /*
 439  * Environment Configuration
 440  */
 441
 442 #if defined(CONFIG_TSEC_ENET)
 443
 444 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
 445 #else
 446 #error "UCP1020 module revision is not defined !!!"
 447 #endif
 448
 449 #define CONFIG_BOOTP_SERVERIP
 450
 451 #define CONFIG_MII              /* MII PHY management */
 452 #define CONFIG_TSEC1_NAME       "eTSEC1"
 453 #define CONFIG_TSEC2_NAME       "eTSEC2"
 454 #define CONFIG_TSEC3_NAME       "eTSEC3"
 455
 456 #define TSEC1_PHY_ADDR  4
 457 #define TSEC2_PHY_ADDR  0
 458 #define TSEC2_PHY_ADDR_SGMII    0x00
 459 #define TSEC3_PHY_ADDR  6
 460
 461 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 462 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 463 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 464
 465 #define TSEC1_PHYIDX    0
 466 #define TSEC2_PHYIDX    0
 467 #define TSEC3_PHYIDX    0
 468
 469 #endif
 470
 471 #define CONFIG_HOSTNAME         "UCP1020"
 472 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 473 #define CONFIG_BOOTFILE         "uImage"
 474 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 475
 476 /* default location for tftp and bootm */
 477 #define CONFIG_LOADADDR         1000000
 478
 479 #if defined(CONFIG_DONGLE)
 480
 481 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 482 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 483 "bootfile=uImage\0"                                                     \
 484 "consoledev=ttyS0\0"                                                    \
 485 "cramfsfile=image.cramfs\0"                                             \
 486 "dtbaddr=0x00c00000\0"                                                  \
 487 "dtbfile=image.dtb\0"                                                   \
 488 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 489 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 490 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 491 "fileaddr=0x01000000\0"                                                 \
 492 "filesize=0x00080000\0"                                                 \
 493 "flashmbr=sf probe 0; "                                                 \
 494         "tftp $loadaddr $mbr; "                                         \
 495         "sf erase $mbr_offset +$filesize; "                             \
 496         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 497 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 498         "protect off $nor_recoveryaddr +$filesize; "                    \
 499         "erase $nor_recoveryaddr +$filesize; "                          \
 500         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 501         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 502 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 503         "protect off $nor_ubootaddr +$filesize; "                       \
 504         "erase $nor_ubootaddr +$filesize; "                             \
 505         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 506         "protect on $nor_ubootaddr +$filesize\0 "                       \
 507 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 508         "protect off $nor_workingaddr +$filesize; "                     \
 509         "erase $nor_workingaddr +$filesize; "                           \
 510         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 511         "protect on $nor_workingaddr +$filesize\0 "                     \
 512 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 513 "kerneladdr=0x01100000\0"                                               \
 514 "kernelfile=uImage\0"                                                   \
 515 "loadaddr=0x01000000\0"                                                 \
 516 "mbr=uCP1020d.mbr\0"                                                    \
 517 "mbr_offset=0x00000000\0"                                               \
 518 "mmbr=uCP1020Quiet.mbr\0"                                               \
 519 "mmcpart=0:2\0"                                                         \
 520 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 521         "mmc erase 1 1; "                                               \
 522         "mmc write $loadaddr 1 1\0"                                     \
 523 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 524         "mmc erase 0x40 0x400; "                                        \
 525         "mmc write $loadaddr 0x40 0x400\0"                              \
 526 "netdev=eth0\0"                                                         \
 527 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 528 "nor_ubootaddr=0xEFF80000\0"                                            \
 529 "nor_workingaddr=0xECFA0000\0"                                          \
 530 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 531         " console=$consoledev,$baudrate $othbootargs; "                 \
 532         "run norloadrecovery; "                                         \
 533         "bootm $kerneladdr - $dtbaddr\0"                                \
 534 "norbootworking=setenv bootargs $workingbootargs"                       \
 535         " console=$consoledev,$baudrate $othbootargs; "                 \
 536         "run norloadworking; "                                          \
 537         "bootm $kerneladdr - $dtbaddr\0"                                \
 538 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 539         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 540         "cramfsload $dtbaddr $dtbfile; "                                \
 541         "cramfsload $kerneladdr $kernelfile\0"                          \
 542 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 543         "setenv cramfsaddr $nor_workingaddr; "                          \
 544         "cramfsload $dtbaddr $dtbfile; "                                \
 545         "cramfsload $kerneladdr $kernelfile\0"                          \
 546 "prog_spi_mbr=run spi__mbr\0"                                           \
 547 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 548 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 549         "run spi__cramfs\0"                                             \
 550 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 551         " console=$consoledev,$baudrate $othbootargs; "                 \
 552         "tftp $rootfsaddr $rootfsfile; "                                \
 553         "tftp $loadaddr $kernelfile; "                                  \
 554         "tftp $dtbaddr $dtbfile; "                                      \
 555         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 556 "ramdisk_size=120000\0"                                                 \
 557 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 558 "recoveryaddr=0x02F00000\0"                                             \
 559 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 560 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 561         "mw.l 0xffe0f008 0x00400000\0"                                  \
 562 "rootfsaddr=0x02F00000\0"                                               \
 563 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 564 "rootpath=/opt/nfsroot\0"                                               \
 565 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 566         "protect off 0xeC000000 +$filesize; "                           \
 567         "erase 0xEC000000 +$filesize; "                                 \
 568         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 569         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 570         "protect on 0xeC000000 +$filesize\0"                            \
 571 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 572         "protect off 0xeFF80000 +$filesize; "                           \
 573         "erase 0xEFF80000 +$filesize; "                                 \
 574         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 575         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 576         "protect on 0xeFF80000 +$filesize\0"                            \
 577 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 578         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 579         "sf write $loadaddr 0x8000 $filesize\0"                         \
 580 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 581         "protect off 0xec0a0000 +$filesize; "                           \
 582         "erase 0xeC0A0000 +$filesize; "                                 \
 583         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 584         "protect on 0xec0a0000 +$filesize\0"                            \
 585 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 586         "sf probe 1; sf erase 0 +$filesize; "                           \
 587         "sf write $loadaddr 0 $filesize\0"                              \
 588 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 589         "sf probe 0; sf erase 0 +$filesize; "                           \
 590         "sf write $loadaddr 0 $filesize\0"                              \
 591 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 592         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 593         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 594         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 595         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 596         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 597 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 598 "ubootaddr=0x01000000\0"                                                \
 599 "ubootfile=u-boot.bin\0"                                                \
 600 "ubootd=u-boot4dongle.bin\0"                                            \
 601 "upgrade=run flashworking\0"                                            \
 602 "usb_phy_type=ulpi\0 "                                                  \
 603 "workingaddr=0x02F00000\0"                                              \
 604 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 605
 606 #else
 607
 608 #if defined(CONFIG_UCP1020T1)
 609
 610 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 611 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 612 "bootfile=uImage\0"                                                     \
 613 "consoledev=ttyS0\0"                                                    \
 614 "cramfsfile=image.cramfs\0"                                             \
 615 "dtbaddr=0x00c00000\0"                                                  \
 616 "dtbfile=image.dtb\0"                                                   \
 617 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 618 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 619 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 620 "fileaddr=0x01000000\0"                                                 \
 621 "filesize=0x00080000\0"                                                 \
 622 "flashmbr=sf probe 0; "                                                 \
 623         "tftp $loadaddr $mbr; "                                         \
 624         "sf erase $mbr_offset +$filesize; "                             \
 625         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 626 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 627         "protect off $nor_recoveryaddr +$filesize; "                    \
 628         "erase $nor_recoveryaddr +$filesize; "                          \
 629         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 630         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 631 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 632         "protect off $nor_ubootaddr +$filesize; "                       \
 633         "erase $nor_ubootaddr +$filesize; "                             \
 634         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 635         "protect on $nor_ubootaddr +$filesize\0 "                       \
 636 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 637         "protect off $nor_workingaddr +$filesize; "                     \
 638         "erase $nor_workingaddr +$filesize; "                           \
 639         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 640         "protect on $nor_workingaddr +$filesize\0 "                     \
 641 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 642 "kerneladdr=0x01100000\0"                                               \
 643 "kernelfile=uImage\0"                                                   \
 644 "loadaddr=0x01000000\0"                                                 \
 645 "mbr=uCP1020.mbr\0"                                                     \
 646 "mbr_offset=0x00000000\0"                                               \
 647 "netdev=eth0\0"                                                         \
 648 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 649 "nor_ubootaddr=0xEFF80000\0"                                            \
 650 "nor_workingaddr=0xECFA0000\0"                                          \
 651 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 652         " console=$consoledev,$baudrate $othbootargs; "                 \
 653         "run norloadrecovery; "                                         \
 654         "bootm $kerneladdr - $dtbaddr\0"                                \
 655 "norbootworking=setenv bootargs $workingbootargs"                       \
 656         " console=$consoledev,$baudrate $othbootargs; "                 \
 657         "run norloadworking; "                                          \
 658         "bootm $kerneladdr - $dtbaddr\0"                                \
 659 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 660         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 661         "cramfsload $dtbaddr $dtbfile; "                                \
 662         "cramfsload $kerneladdr $kernelfile\0"                          \
 663 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 664         "setenv cramfsaddr $nor_workingaddr; "                          \
 665         "cramfsload $dtbaddr $dtbfile; "                                \
 666         "cramfsload $kerneladdr $kernelfile\0"                          \
 667 "othbootargs=quiet\0"                                                   \
 668 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 669         " console=$consoledev,$baudrate $othbootargs; "                 \
 670         "tftp $rootfsaddr $rootfsfile; "                                \
 671         "tftp $loadaddr $kernelfile; "                                  \
 672         "tftp $dtbaddr $dtbfile; "                                      \
 673         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 674 "ramdisk_size=120000\0"                                                 \
 675 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 676 "recoveryaddr=0x02F00000\0"                                             \
 677 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 678 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 679         "mw.l 0xffe0f008 0x00400000\0"                                  \
 680 "rootfsaddr=0x02F00000\0"                                               \
 681 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 682 "rootpath=/opt/nfsroot\0"                                               \
 683 "silent=1\0"                                                            \
 684 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 685         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 686         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 687         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 688         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 689         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 690 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 691 "ubootaddr=0x01000000\0"                                                \
 692 "ubootfile=u-boot.bin\0"                                                \
 693 "upgrade=run flashworking\0"                                            \
 694 "workingaddr=0x02F00000\0"                                              \
 695 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 696
 697 #else /* For Arcturus Modules */
 698
 699 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 700 "bootcmd=run norkernel\0"                                               \
 701 "bootfile=uImage\0"                                                     \
 702 "consoledev=ttyS0\0"                                                    \
 703 "dtbaddr=0x00c00000\0"                                                  \
 704 "dtbfile=image.dtb\0"                                                   \
 705 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 706 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 707 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 708 "fileaddr=0x01000000\0"                                                 \
 709 "filesize=0x00080000\0"                                                 \
 710 "flashmbr=sf probe 0; "                                                 \
 711         "tftp $loadaddr $mbr; "                                         \
 712         "sf erase $mbr_offset +$filesize; "                             \
 713         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 714 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 715         "protect off $nor_ubootaddr0 +$filesize; "                      \
 716         "erase $nor_ubootaddr0 +$filesize; "                            \
 717         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 718         "protect on $nor_ubootaddr0 +$filesize; "                       \
 719         "protect off $nor_ubootaddr1 +$filesize; "                      \
 720         "erase $nor_ubootaddr1 +$filesize; "                            \
 721         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 722         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 723 "format0=protect off $part0base +$part0size; "                          \
 724         "erase $part0base +$part0size\0"                                \
 725 "format1=protect off $part1base +$part1size; "                          \
 726         "erase $part1base +$part1size\0"                                \
 727 "format2=protect off $part2base +$part2size; "                          \
 728         "erase $part2base +$part2size\0"                                \
 729 "format3=protect off $part3base +$part3size; "                          \
 730         "erase $part3base +$part3size\0"                                \
 731 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 732 "kerneladdr=0x01100000\0"                                               \
 733 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 734 "kernelfile=uImage\0"                                                   \
 735 "loadaddr=0x01000000\0"                                                 \
 736 "mbr=uCP1020.mbr\0"                                                     \
 737 "mbr_offset=0x00000000\0"                                               \
 738 "netdev=eth0\0"                                                         \
 739 "nor_ubootaddr0=0xEC000000\0"                                           \
 740 "nor_ubootaddr1=0xEFF80000\0"                                           \
 741 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 742         "run norkernelload; "                                           \
 743         "bootm $kerneladdr - $dtbaddr\0"                                \
 744 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 745         "setenv cramfsaddr $part0base; "                                \
 746         "cramfsload $dtbaddr $dtbfile; "                                \
 747         "cramfsload $kerneladdr $kernelfile\0"                          \
 748 "part0base=0xEC100000\0"                                                \
 749 "part0size=0x00700000\0"                                                \
 750 "part1base=0xEC800000\0"                                                \
 751 "part1size=0x02000000\0"                                                \
 752 "part2base=0xEE800000\0"                                                \
 753 "part2size=0x00800000\0"                                                \
 754 "part3base=0xEF000000\0"                                                \
 755 "part3size=0x00F80000\0"                                                \
 756 "partENVbase=0xEC080000\0"                                              \
 757 "partENVsize=0x00080000\0"                                              \
 758 "program0=tftp part0-000000.bin; "                                      \
 759         "protect off $part0base +$filesize; "                           \
 760         "erase $part0base +$filesize; "                                 \
 761         "cp.b $loadaddr $part0base $filesize; "                         \
 762         "echo Verifying...; "                                           \
 763         "cmp.b $loadaddr $part0base $filesize\0"                        \
 764 "program1=tftp part1-000000.bin; "                                      \
 765         "protect off $part1base +$filesize; "                           \
 766         "erase $part1base +$filesize; "                                 \
 767         "cp.b $loadaddr $part1base $filesize; "                         \
 768         "echo Verifying...; "                                           \
 769         "cmp.b $loadaddr $part1base $filesize\0"                        \
 770 "program2=tftp part2-000000.bin; "                                      \
 771         "protect off $part2base +$filesize; "                           \
 772         "erase $part2base +$filesize; "                                 \
 773         "cp.b $loadaddr $part2base $filesize; "                         \
 774         "echo Verifying...; "                                           \
 775         "cmp.b $loadaddr $part2base $filesize\0"                        \
 776 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 777         "  console=$consoledev,$baudrate $othbootargs; "                \
 778         "tftp $rootfsaddr $rootfsfile; "                                \
 779         "tftp $loadaddr $kernelfile; "                                  \
 780         "tftp $dtbaddr $dtbfile; "                                      \
 781         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 782 "ramdisk_size=120000\0"                                                 \
 783 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 784 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 785         "mw.l 0xffe0f008 0x00400000\0"                                  \
 786 "rootfsaddr=0x02F00000\0"                                               \
 787 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 788 "rootpath=/opt/nfsroot\0"                                               \
 789 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 790         "sf probe 0; sf erase 0 +$filesize; "                           \
 791         "sf write $loadaddr 0 $filesize\0"                              \
 792 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 793         "protect off 0xeC000000 +$filesize; "                           \
 794         "erase 0xEC000000 +$filesize; "                                 \
 795         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 796         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 797         "protect on 0xeC000000 +$filesize\0"                            \
 798 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 799         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 800         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 801         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 802         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 803         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 804 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 805 "ubootfile=u-boot.bin\0"                                                \
 806 "upgrade=run flashuboot\0"                                              \
 807 "usb_phy_type=ulpi\0 "                                                  \
 808 "boot_nfs= "                                                            \
 809         "setenv bootargs root=/dev/nfs rw "                             \
 810         "nfsroot=$serverip:$rootpath "                                  \
 811         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 812         "console=$consoledev,$baudrate $othbootargs;"                   \
 813         "tftp $loadaddr $bootfile;"                                     \
 814         "tftp $fdtaddr $fdtfile;"                                       \
 815         "bootm $loadaddr - $fdtaddr\0"                                  \
 816 "boot_hd = "                                                            \
 817         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 818         "console=$consoledev,$baudrate $othbootargs;"                   \
 819         "usb start;"                                                    \
 820         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 821         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 822         "bootm $loadaddr - $fdtaddr\0"                                  \
 823 "boot_usb_fat = "                                                       \
 824         "setenv bootargs root=/dev/ram rw "                             \
 825         "console=$consoledev,$baudrate $othbootargs "                   \
 826         "ramdisk_size=$ramdisk_size;"                                   \
 827         "usb start;"                                                    \
 828         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 829         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 830         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 831         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 832 "boot_usb_ext2 = "                                                      \
 833         "setenv bootargs root=/dev/ram rw "                             \
 834         "console=$consoledev,$baudrate $othbootargs "                   \
 835         "ramdisk_size=$ramdisk_size;"                                   \
 836         "usb start;"                                                    \
 837         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 838         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 839         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 840         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 841 "boot_nor = "                                                           \
 842         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 843         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 844         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 845 "boot_ram = "                                                           \
 846         "setenv bootargs root=/dev/ram rw "                             \
 847         "console=$consoledev,$baudrate $othbootargs "                   \
 848         "ramdisk_size=$ramdisk_size;"                                   \
 849         "tftp $ramdiskaddr $ramdiskfile;"                               \
 850         "tftp $loadaddr $bootfile;"                                     \
 851         "tftp $fdtaddr $fdtfile;"                                       \
 852         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 853
 854 #endif
 855 #endif
 856
 857 #endif /* __CONFIG_H */