git.sur5r.net Git - u-boot/blob - include/configs/at91sam9261ek.h

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * Configuation settings for the AT91SAM9261EK board.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /* ARM asynchronous clock */
  15 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  16 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* 18.432 MHz crystal */
  17
  18 #ifdef CONFIG_AT91SAM9G10
  19 #define CONFIG_AT91SAM9G10EK            /* It's an Atmel AT91SAM9G10 EK*/
  20 #else
  21 #define CONFIG_AT91SAM9261EK            /* It's an Atmel AT91SAM9261 EK*/
  22 #endif
  23
  24 #include <asm/hardware.h>
  25
  26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  27 #define CONFIG_SETUP_MEMORY_TAGS
  28 #define CONFIG_INITRD_TAG
  29
  30 #define CONFIG_SKIP_LOWLEVEL_INIT
  31
  32 #define CONFIG_ATMEL_LEGACY
  33
  34 /*
  35  * Hardware drivers
  36  */
  37
  38 /* LCD */
  39 #define LCD_BPP                         LCD_COLOR8
  40 #define CONFIG_LCD_LOGO
  41 #undef LCD_TEST_PATTERN
  42 #define CONFIG_LCD_INFO
  43 #define CONFIG_LCD_INFO_BELOW_LOGO
  44 #define CONFIG_ATMEL_LCD
  45 #ifdef CONFIG_AT91SAM9261EK
  46 #define CONFIG_ATMEL_LCD_BGR555
  47 #endif
  48
  49 /*
  50  * BOOTP options
  51  */
  52 #define CONFIG_BOOTP_BOOTFILESIZE
  53
  54 /* SDRAM */
  55 #define CONFIG_NR_DRAM_BANKS            1
  56 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  57 #define CONFIG_SYS_SDRAM_SIZE           0x04000000
  58 #define CONFIG_SYS_INIT_SP_ADDR \
  59         (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  60
  61 /* NAND flash */
  62 #ifdef CONFIG_CMD_NAND
  63 #define CONFIG_NAND_ATMEL
  64 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  65 #define CONFIG_SYS_NAND_BASE                    0x40000000
  66 #define CONFIG_SYS_NAND_DBW_8
  67 /* our ALE is AD22 */
  68 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 22)
  69 /* our CLE is AD21 */
  70 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 21)
  71 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
  72 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC15
  73
  74 #endif
  75
  76 /* Ethernet */
  77 #define CONFIG_DRIVER_DM9000
  78 #define CONFIG_DM9000_BASE              0x30000000
  79 #define DM9000_IO                       CONFIG_DM9000_BASE
  80 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
  81 #define CONFIG_DM9000_USE_16BIT
  82 #define CONFIG_DM9000_NO_SROM
  83 #define CONFIG_NET_RETRY_COUNT          20
  84 #define CONFIG_RESET_PHY_R
  85
  86 /* USB */
  87 #define CONFIG_USB_ATMEL
  88 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  89 #define CONFIG_USB_OHCI_NEW
  90 #define CONFIG_SYS_USB_OHCI_CPU_INIT
  91 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x00500000      /* AT91SAM9261_UHP_BASE */
  92 #ifdef CONFIG_AT91SAM9G10EK
  93 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9g10"
  94 #else
  95 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9261"
  96 #endif
  97 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
  98
  99 #define CONFIG_SYS_LOAD_ADDR                    0x22000000      /* load address */
 100
 101 #define CONFIG_SYS_MEMTEST_START                CONFIG_SYS_SDRAM_BASE
 102 #define CONFIG_SYS_MEMTEST_END                  0x23e00000
 103
 104 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 105
 106 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
 107 #define CONFIG_ENV_OFFSET       0x4200
 108 #define CONFIG_ENV_SIZE         0x4200
 109 #define CONFIG_ENV_SECT_SIZE    0x210
 110 #define CONFIG_ENV_SPI_MAX_HZ   15000000
 111 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
 112                                 "sf read 0x22000000 0x84000 0x294000; " \
 113                                 "bootm 0x22000000"
 114
 115 #elif CONFIG_SYS_USE_DATAFLASH_CS3
 116
 117 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
 118 #define CONFIG_ENV_OFFSET       0x4200
 119 #define CONFIG_ENV_SIZE         0x4200
 120 #define CONFIG_ENV_SECT_SIZE    0x210
 121 #define CONFIG_ENV_SPI_MAX_HZ   15000000
 122 #define CONFIG_BOOTCOMMAND      "sf probe 0:3; " \
 123                                 "sf read 0x22000000 0x84000 0x294000; " \
 124                                 "bootm 0x22000000"
 125
 126 #else /* CONFIG_SYS_USE_NANDFLASH */
 127
 128 /* bootstrap + u-boot + env + linux in nandflash */
 129 #define CONFIG_ENV_OFFSET               0x120000
 130 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 131 #define CONFIG_ENV_SIZE         0x20000         /* 1 sector = 128 kB */
 132 #define CONFIG_BOOTCOMMAND      "nand read 0x22000000 0x200000 0x300000; bootm"
 133 #endif
 134
 135 /*
 136  * Size of malloc() pool
 137  */
 138 #define CONFIG_SYS_MALLOC_LEN           ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 139
 140 #endif