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1 /*
2  * (C) Copyright 2007-2008
3  * Stelian Pop <stelian@popies.net>
4  * Lead Tech Design <www.leadtechdesign.com>
5  *
6  * Configuation settings for the AT91SAM9RLEK board.
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 #include <asm/hardware.h>
15
16 /* ARM asynchronous clock */
17 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
18 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000        /* main clock xtal */
19
20 #define CONFIG_AT91SAM9RLEK             1       /* It's an AT91SAM9RLEK Board */
21
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_SKIP_LOWLEVEL_INIT
24
25 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
26 #define CONFIG_SETUP_MEMORY_TAGS        1
27 #define CONFIG_INITRD_TAG               1
28
29 #define CONFIG_ATMEL_LEGACY
30
31 /*
32  * Hardware drivers
33  */
34
35 /* LCD */
36 #define LCD_BPP                         LCD_COLOR8
37 #define CONFIG_LCD_LOGO                 1
38 #undef LCD_TEST_PATTERN
39 #define CONFIG_LCD_INFO                 1
40 #define CONFIG_LCD_INFO_BELOW_LOGO      1
41 #define CONFIG_ATMEL_LCD                1
42 #define CONFIG_ATMEL_LCD_RGB565         1
43 /* Let board_init_f handle the framebuffer allocation */
44 #undef CONFIG_FB_ADDR
45
46 /* SDRAM */
47 #define CONFIG_NR_DRAM_BANKS            1
48 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS1
49 #define CONFIG_SYS_SDRAM_SIZE           0x04000000
50
51 #define CONFIG_SYS_INIT_SP_ADDR \
52         (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
53
54 /* NAND flash */
55 #ifdef CONFIG_CMD_NAND
56 #define CONFIG_NAND_ATMEL
57 #define CONFIG_SYS_MAX_NAND_DEVICE              1
58 #define CONFIG_SYS_NAND_BASE                    ATMEL_BASE_CS3
59 #define CONFIG_SYS_NAND_DBW_8                   1
60 /* our ALE is AD21 */
61 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 21)
62 /* our CLE is AD22 */
63 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 22)
64 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PB6
65 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PD17
66
67 #endif
68
69 /* Ethernet - not present */
70
71 /* USB - not supported */
72
73 #define CONFIG_SYS_LOAD_ADDR                    0x22000000      /* load address */
74
75 #define CONFIG_SYS_MEMTEST_START                CONFIG_SYS_SDRAM_BASE
76 #define CONFIG_SYS_MEMTEST_END                  0x23e00000
77
78 #ifdef CONFIG_SYS_USE_DATAFLASH
79
80 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
81 #define CONFIG_ENV_OFFSET       0x4200
82 #define CONFIG_ENV_SIZE         0x4200
83 #define CONFIG_ENV_SECT_SIZE    0x210
84 #define CONFIG_ENV_SPI_MAX_HZ   15000000
85 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
86                                 "sf read 0x22000000 0x84000 0x294000; " \
87                                 "bootm 0x22000000"
88
89 #elif CONFIG_SYS_USE_NANDFLASH
90
91 /* bootstrap + u-boot + env + linux in nandflash */
92 #define CONFIG_ENV_OFFSET               0x120000
93 #define CONFIG_ENV_OFFSET_REDUND        0x100000
94 #define CONFIG_ENV_SIZE         0x20000         /* 1 sector = 128 kB */
95 #define CONFIG_BOOTCOMMAND      "nand read 0x22000000 0x200000 0x600000; "      \
96                                 "nand read 0x21000000 0x180000 0x80000; "       \
97                                 "bootz 0x22000000 - 0x21000000"
98
99 #else /* CONFIG_SYS_USE_MMC */
100
101 /* bootstrap + u-boot + env + linux in mmc */
102 #define CONFIG_ENV_SIZE         0x4000
103 #define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
104                                 "fatload mmc 0:1 0x22000000 zImage; " \
105                                 "bootz 0x22000000 - 0x21000000"
106 #endif
107
108 #define CONFIG_SYS_LONGHELP             1
109 #define CONFIG_CMDLINE_EDITING          1
110 #define CONFIG_AUTO_COMPLETE
111
112 /*
113  * Size of malloc() pool
114  */
115 #define CONFIG_SYS_MALLOC_LEN   ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
116
117 #endif