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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2016 Freescale Semiconductor
4  */
5
6 #ifndef __LS1046A_COMMON_H
7 #define __LS1046A_COMMON_H
8
9 /* SPL build */
10 #ifdef CONFIG_SPL_BUILD
11 #define SPL_NO_QBMAN
12 #define SPL_NO_FMAN
13 #define SPL_NO_ENV
14 #define SPL_NO_MISC
15 #define SPL_NO_QSPI
16 #define SPL_NO_USB
17 #define SPL_NO_SATA
18 #endif
19 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
20 #define SPL_NO_MMC
21 #endif
22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
23 #define SPL_NO_IFC
24 #endif
25
26 #define CONFIG_REMAKE_ELF
27 #define CONFIG_FSL_LAYERSCAPE
28 #define CONFIG_GICV2
29
30 #include <asm/arch/config.h>
31 #include <asm/arch/stream_id_lsch2.h>
32
33 /* Link Definitions */
34 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
35
36 #define CONFIG_SKIP_LOWLEVEL_INIT
37
38 #define CONFIG_VERY_BIG_RAM
39 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
40 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
41 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
42 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
43
44 #define CPU_RELEASE_ADDR               secondary_boot_func
45
46 /* Generic Timer Definitions */
47 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
48
49 /* Size of malloc() pool */
50 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
51
52 /* Serial Port */
53 #define CONFIG_SYS_NS16550_SERIAL
54 #define CONFIG_SYS_NS16550_REG_SIZE     1
55 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
56
57 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
58
59 /* SD boot SPL */
60 #ifdef CONFIG_SD_BOOT
61 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
62 #define CONFIG_SPL_LIBCOMMON_SUPPORT
63 #define CONFIG_SPL_LIBGENERIC_SUPPORT
64 #define CONFIG_SPL_ENV_SUPPORT
65 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
66 #define CONFIG_SPL_WATCHDOG_SUPPORT
67 #define CONFIG_SPL_I2C_SUPPORT
68 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
69
70 #define CONFIG_SPL_MMC_SUPPORT
71 #define CONFIG_SPL_TEXT_BASE            0x10000000
72 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
73 #define CONFIG_SPL_STACK                0x10020000
74 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
75 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
76 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
77 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
78                                         CONFIG_SPL_BSS_MAX_SIZE)
79 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
80
81 #ifdef CONFIG_SECURE_BOOT
82 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
83 /*
84  * HDR would be appended at end of image and copied to DDR along
85  * with U-Boot image. Here u-boot max. size is 512K. So if binary
86  * size increases then increase this size in case of secure boot as
87  * it uses raw u-boot image instead of fit image.
88  */
89 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
90 #else
91 #define CONFIG_SYS_MONITOR_LEN          0x100000
92 #endif /* ifdef CONFIG_SECURE_BOOT */
93 #endif
94
95 /* NAND SPL */
96 #ifdef CONFIG_NAND_BOOT
97 #define CONFIG_SPL_PBL_PAD
98 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
99 #define CONFIG_SPL_LIBCOMMON_SUPPORT
100 #define CONFIG_SPL_LIBGENERIC_SUPPORT
101 #define CONFIG_SPL_ENV_SUPPORT
102 #define CONFIG_SPL_WATCHDOG_SUPPORT
103 #define CONFIG_SPL_I2C_SUPPORT
104 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
105
106 #define CONFIG_SPL_NAND_SUPPORT
107 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
108 #define CONFIG_SPL_TEXT_BASE            0x10000000
109 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
110 #define CONFIG_SPL_STACK                0x1001f000
111 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
112 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
113
114 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
115 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
116 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
117                                         CONFIG_SPL_BSS_MAX_SIZE)
118 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
119 #define CONFIG_SYS_MONITOR_LEN          0xa0000
120 #endif
121
122 /* I2C */
123 #define CONFIG_SYS_I2C
124
125 /* PCIe */
126 #define CONFIG_PCIE1            /* PCIE controller 1 */
127 #define CONFIG_PCIE2            /* PCIE controller 2 */
128 #define CONFIG_PCIE3            /* PCIE controller 3 */
129
130 #ifdef CONFIG_PCI
131 #define CONFIG_PCI_SCAN_SHOW
132 #endif
133
134 /* SATA */
135 #ifndef SPL_NO_SATA
136 #define CONFIG_SCSI_AHCI_PLAT
137
138 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
139
140 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
141 #define CONFIG_SYS_SCSI_MAX_LUN                 1
142 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
143                                                 CONFIG_SYS_SCSI_MAX_LUN)
144 #endif
145
146 /* Command line configuration */
147
148 /* MMC */
149 #ifndef SPL_NO_MMC
150 #ifdef CONFIG_MMC
151 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
152 #endif
153 #endif
154
155 /* FMan ucode */
156 #ifndef SPL_NO_FMAN
157 #define CONFIG_SYS_DPAA_FMAN
158 #ifdef CONFIG_SYS_DPAA_FMAN
159 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
160 #endif
161
162 #ifdef CONFIG_SD_BOOT
163 /*
164  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
165  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
166  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
167  */
168 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
169 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
170 #elif defined(CONFIG_QSPI_BOOT)
171 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
172 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
173 #define CONFIG_ENV_SPI_BUS              0
174 #define CONFIG_ENV_SPI_CS               0
175 #define CONFIG_ENV_SPI_MAX_HZ           1000000
176 #define CONFIG_ENV_SPI_MODE             0x03
177 #elif defined(CONFIG_NAND_BOOT)
178 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
179 #define CONFIG_SYS_FMAN_FW_ADDR         (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
180 #else
181 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
182 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
183 #endif
184 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
185 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
186 #endif
187
188 /* Miscellaneous configurable options */
189 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
190
191 #define CONFIG_HWCONFIG
192 #define HWCONFIG_BUFFER_SIZE            128
193
194 #ifndef CONFIG_SPL_BUILD
195 #define BOOT_TARGET_DEVICES(func) \
196         func(SCSI, scsi, 0) \
197         func(MMC, mmc, 0) \
198         func(USB, usb, 0)
199 #include <config_distro_bootcmd.h>
200 #endif
201
202 #ifndef SPL_NO_MISC
203 /* Initial environment variables */
204 #define CONFIG_EXTRA_ENV_SETTINGS               \
205         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
206         "ramdisk_addr=0x800000\0"               \
207         "ramdisk_size=0x2000000\0"              \
208         "fdt_high=0xffffffffffffffff\0"         \
209         "initrd_high=0xffffffffffffffff\0"      \
210         "fdt_addr=0x64f00000\0"                 \
211         "kernel_addr=0x65000000\0"              \
212         "scriptaddr=0x80000000\0"               \
213         "scripthdraddr=0x80080000\0"            \
214         "fdtheader_addr_r=0x80100000\0"         \
215         "kernelheader_addr_r=0x80200000\0"      \
216         "load_addr=0xa0000000\0"            \
217         "kernel_addr_r=0x81000000\0"            \
218         "fdt_addr_r=0x90000000\0"               \
219         "ramdisk_addr_r=0xa0000000\0"           \
220         "kernel_start=0x1000000\0"              \
221         "kernelheader_start=0x800000\0"         \
222         "kernel_load=0xa0000000\0"              \
223         "kernel_size=0x2800000\0"               \
224         "kernelheader_size=0x40000\0"           \
225         "kernel_addr_sd=0x8000\0"               \
226         "kernel_size_sd=0x14000\0"              \
227         "kernelhdr_addr_sd=0x4000\0"            \
228         "kernelhdr_size_sd=0x10\0"              \
229         "console=ttyS0,115200\0"                \
230          CONFIG_MTDPARTS_DEFAULT "\0"           \
231         BOOTENV                                 \
232         "boot_scripts=ls1046ardb_boot.scr\0"    \
233         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"       \
234         "scan_dev_for_boot_part="               \
235                 "part list ${devtype} ${devnum} devplist; "   \
236                 "env exists devplist || setenv devplist 1; "  \
237                 "for distro_bootpart in ${devplist}; do "     \
238                   "if fstype ${devtype} "                  \
239                         "${devnum}:${distro_bootpart} "      \
240                         "bootfstype; then "                  \
241                         "run scan_dev_for_boot; "            \
242                   "fi; "                                   \
243                 "done\0"                                   \
244         "scan_dev_for_boot="                              \
245                 "echo Scanning ${devtype} "               \
246                                 "${devnum}:${distro_bootpart}...; "  \
247                 "for prefix in ${boot_prefixes}; do "     \
248                         "run scan_dev_for_scripts; "      \
249                 "done;"                                   \
250                 "\0"                                      \
251         "boot_a_script="                                  \
252                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
253                         "${scriptaddr} ${prefix}${script}; "    \
254                 "env exists secureboot && load ${devtype} "     \
255                         "${devnum}:${distro_bootpart} "         \
256                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
257                         "&& esbc_validate ${scripthdraddr};"    \
258                 "source ${scriptaddr}\0"          \
259         "qspi_bootcmd=echo Trying load from qspi..;"      \
260                 "sf probe && sf read $load_addr "         \
261                 "$kernel_start $kernel_size; env exists secureboot "    \
262                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
263                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
264                 "bootm $load_addr#$board\0"             \
265         "sd_bootcmd=echo Trying load from SD ..;"       \
266                 "mmcinfo; mmc read $load_addr "         \
267                 "$kernel_addr_sd $kernel_size_sd && "   \
268                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
269                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
270                 " && esbc_validate ${kernelheader_addr_r};"     \
271                 "bootm $load_addr#$board\0"
272
273 #endif
274
275 /* Monitor Command Prompt */
276 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
277
278 #define CONFIG_SYS_MAXARGS              64      /* max command args */
279
280 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
281
282 #include <asm/arch/soc.h>
283
284 #endif /* __LS1046A_COMMON_H */