git.sur5r.net Git - u-boot/blob - include/configs/ls1046a_common.h

   1 /*
   2  * Copyright 2016 Freescale Semiconductor
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __LS1046A_COMMON_H
   8 #define __LS1046A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_QBMAN
  13 #define SPL_NO_FMAN
  14 #define SPL_NO_ENV
  15 #define SPL_NO_MISC
  16 #define SPL_NO_QSPI
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #endif
  20 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
  21 #define SPL_NO_MMC
  22 #endif
  23 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
  24 #define SPL_NO_IFC
  25 #endif
  26
  27 #define CONFIG_REMAKE_ELF
  28 #define CONFIG_FSL_LAYERSCAPE
  29 #define CONFIG_MP
  30 #define CONFIG_GICV2
  31
  32 #include <asm/arch/config.h>
  33 #include <asm/arch/stream_id_lsch2.h>
  34
  35 /* Link Definitions */
  36 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  37
  38 #define CONFIG_SKIP_LOWLEVEL_INIT
  39
  40 #define CONFIG_VERY_BIG_RAM
  41 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  42 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  43 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  44 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  45
  46 #define CPU_RELEASE_ADDR               secondary_boot_func
  47
  48 /* Generic Timer Definitions */
  49 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  50
  51 /* Size of malloc() pool */
  52 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  53
  54 /* Serial Port */
  55 #define CONFIG_CONS_INDEX               1
  56 #define CONFIG_SYS_NS16550_SERIAL
  57 #define CONFIG_SYS_NS16550_REG_SIZE     1
  58 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  59
  60 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  61
  62 /* SD boot SPL */
  63 #ifdef CONFIG_SD_BOOT
  64 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
  65 #define CONFIG_SPL_LIBCOMMON_SUPPORT
  66 #define CONFIG_SPL_LIBGENERIC_SUPPORT
  67 #define CONFIG_SPL_ENV_SUPPORT
  68 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
  69 #define CONFIG_SPL_WATCHDOG_SUPPORT
  70 #define CONFIG_SPL_I2C_SUPPORT
  71 #define CONFIG_SPL_SERIAL_SUPPORT
  72 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  73
  74 #define CONFIG_SPL_MMC_SUPPORT
  75 #define CONFIG_SPL_TEXT_BASE            0x10000000
  76 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
  77 #define CONFIG_SPL_STACK                0x10020000
  78 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
  79 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  80 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  81 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  82                                         CONFIG_SPL_BSS_MAX_SIZE)
  83 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  84
  85 #ifdef CONFIG_SECURE_BOOT
  86 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  87 /*
  88  * HDR would be appended at end of image and copied to DDR along
  89  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  90  * size increases then increase this size in case of secure boot as
  91  * it uses raw u-boot image instead of fit image.
  92  */
  93 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  94 #else
  95 #define CONFIG_SYS_MONITOR_LEN          0x100000
  96 #endif /* ifdef CONFIG_SECURE_BOOT */
  97 #endif
  98
  99 /* NAND SPL */
 100 #ifdef CONFIG_NAND_BOOT
 101 #define CONFIG_SPL_PBL_PAD
 102 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
 103 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 104 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 105 #define CONFIG_SPL_ENV_SUPPORT
 106 #define CONFIG_SPL_WATCHDOG_SUPPORT
 107 #define CONFIG_SPL_I2C_SUPPORT
 108 #define CONFIG_SPL_SERIAL_SUPPORT
 109 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 110
 111 #define CONFIG_SPL_NAND_SUPPORT
 112 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 113 #define CONFIG_SPL_TEXT_BASE            0x10000000
 114 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
 115 #define CONFIG_SPL_STACK                0x1001f000
 116 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 117 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 118
 119 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
 120 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 121 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
 122                                         CONFIG_SPL_BSS_MAX_SIZE)
 123 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 124 #define CONFIG_SYS_MONITOR_LEN          0xa0000
 125 #endif
 126
 127 /* I2C */
 128 #define CONFIG_SYS_I2C
 129 #define CONFIG_SYS_I2C_MXC
 130 #define CONFIG_SYS_I2C_MXC_I2C1
 131 #define CONFIG_SYS_I2C_MXC_I2C2
 132 #define CONFIG_SYS_I2C_MXC_I2C3
 133 #define CONFIG_SYS_I2C_MXC_I2C4
 134
 135 /* PCIe */
 136 #define CONFIG_PCIE1            /* PCIE controller 1 */
 137 #define CONFIG_PCIE2            /* PCIE controller 2 */
 138 #define CONFIG_PCIE3            /* PCIE controller 3 */
 139
 140 #ifdef CONFIG_PCI
 141 #define CONFIG_PCI_SCAN_SHOW
 142 #endif
 143
 144 /* SATA */
 145 #ifndef SPL_NO_SATA
 146 #define CONFIG_SCSI_AHCI_PLAT
 147
 148 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
 149
 150 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
 151 #define CONFIG_SYS_SCSI_MAX_LUN                 1
 152 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 153                                                 CONFIG_SYS_SCSI_MAX_LUN)
 154 #endif
 155
 156 /* Command line configuration */
 157
 158 /* MMC */
 159 #ifndef SPL_NO_MMC
 160 #ifdef CONFIG_MMC
 161 #define CONFIG_FSL_ESDHC
 162 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 163 #endif
 164 #endif
 165
 166 /* FMan ucode */
 167 #ifndef SPL_NO_FMAN
 168 #define CONFIG_SYS_DPAA_FMAN
 169 #ifdef CONFIG_SYS_DPAA_FMAN
 170 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 171 #endif
 172
 173 #ifdef CONFIG_SD_BOOT
 174 /*
 175  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
 176  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
 177  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
 178  */
 179 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
 180 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
 181 #elif defined(CONFIG_QSPI_BOOT)
 182 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 183 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
 184 #define CONFIG_ENV_SPI_BUS              0
 185 #define CONFIG_ENV_SPI_CS               0
 186 #define CONFIG_ENV_SPI_MAX_HZ           1000000
 187 #define CONFIG_ENV_SPI_MODE             0x03
 188 #elif defined(CONFIG_NAND_BOOT)
 189 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
 190 #define CONFIG_SYS_FMAN_FW_ADDR         (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
 191 #else
 192 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 193 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
 194 #endif
 195 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
 196 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 197 #endif
 198
 199 /* Miscellaneous configurable options */
 200 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
 201
 202 #define CONFIG_HWCONFIG
 203 #define HWCONFIG_BUFFER_SIZE            128
 204
 205 #ifndef CONFIG_SPL_BUILD
 206 #define BOOT_TARGET_DEVICES(func) \
 207         func(SCSI, scsi, 0) \
 208         func(MMC, mmc, 0) \
 209         func(USB, usb, 0)
 210 #include <config_distro_bootcmd.h>
 211 #endif
 212
 213 #ifndef SPL_NO_MISC
 214 /* Initial environment variables */
 215 #define CONFIG_EXTRA_ENV_SETTINGS               \
 216         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 217         "ramdisk_addr=0x800000\0"               \
 218         "ramdisk_size=0x2000000\0"              \
 219         "fdt_high=0xffffffffffffffff\0"         \
 220         "initrd_high=0xffffffffffffffff\0"      \
 221         "fdt_addr=0x64f00000\0"                 \
 222         "kernel_addr=0x65000000\0"              \
 223         "scriptaddr=0x80000000\0"               \
 224         "scripthdraddr=0x80080000\0"            \
 225         "fdtheader_addr_r=0x80100000\0"         \
 226         "kernelheader_addr_r=0x80200000\0"      \
 227         "load_addr=0xa0000000\0"            \
 228         "kernel_addr_r=0x81000000\0"            \
 229         "fdt_addr_r=0x90000000\0"               \
 230         "ramdisk_addr_r=0xa0000000\0"           \
 231         "kernel_start=0x1000000\0"              \
 232         "kernelheader_start=0x800000\0"         \
 233         "kernel_load=0xa0000000\0"              \
 234         "kernel_size=0x2800000\0"               \
 235         "kernelheader_size=0x40000\0"           \
 236         "kernel_addr_sd=0x8000\0"               \
 237         "kernel_size_sd=0x14000\0"              \
 238         "kernelhdr_addr_sd=0x4000\0"            \
 239         "kernelhdr_size_sd=0x10\0"              \
 240         "console=ttyS0,115200\0"                \
 241          CONFIG_MTDPARTS_DEFAULT "\0"           \
 242         BOOTENV                                 \
 243         "boot_scripts=ls1046ardb_boot.scr\0"    \
 244         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"       \
 245         "scan_dev_for_boot_part="               \
 246                 "part list ${devtype} ${devnum} devplist; "   \
 247                 "env exists devplist || setenv devplist 1; "  \
 248                 "for distro_bootpart in ${devplist}; do "     \
 249                   "if fstype ${devtype} "                  \
 250                         "${devnum}:${distro_bootpart} "      \
 251                         "bootfstype; then "                  \
 252                         "run scan_dev_for_boot; "            \
 253                   "fi; "                                   \
 254                 "done\0"                                   \
 255         "scan_dev_for_boot="                              \
 256                 "echo Scanning ${devtype} "               \
 257                                 "${devnum}:${distro_bootpart}...; "  \
 258                 "for prefix in ${boot_prefixes}; do "     \
 259                         "run scan_dev_for_scripts; "      \
 260                 "done;"                                   \
 261                 "\0"                                      \
 262         "boot_a_script="                                  \
 263                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
 264                         "${scriptaddr} ${prefix}${script}; "    \
 265                 "env exists secureboot && load ${devtype} "     \
 266                         "${devnum}:${distro_bootpart} "         \
 267                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
 268                         "&& esbc_validate ${scripthdraddr};"    \
 269                 "source ${scriptaddr}\0"          \
 270         "qspi_bootcmd=echo Trying load from qspi..;"      \
 271                 "sf probe && sf read $load_addr "         \
 272                 "$kernel_start $kernel_size; env exists secureboot "    \
 273                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 274                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 275                 "bootm $load_addr#$board\0"             \
 276         "sd_bootcmd=echo Trying load from SD ..;"       \
 277                 "mmcinfo; mmc read $load_addr "         \
 278                 "$kernel_addr_sd $kernel_size_sd && "   \
 279                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 280                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 281                 " && esbc_validate ${kernelheader_addr_r};"     \
 282                 "bootm $load_addr#$board\0"
 283
 284 #endif
 285
 286 /* Monitor Command Prompt */
 287 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 288
 289 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 290
 291 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 292
 293 #include <asm/arch/soc.h>
 294
 295 #endif /* __LS1046A_COMMON_H */